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0001 /*
0002  * Copyright 2012-17 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025 
0026 #ifndef __DC_MEM_INPUT_DCN201_H__
0027 #define __DC_MEM_INPUT_DCN201_H__
0028 
0029 #include "../dcn10/dcn10_hubp.h"
0030 #include "../dcn20/dcn20_hubp.h"
0031 
0032 #define TO_DCN201_HUBP(hubp)\
0033     container_of(hubp, struct dcn201_hubp, base)
0034 
0035 #define HUBP_REG_LIST_DCN201(id)\
0036     HUBP_REG_LIST_DCN(id),\
0037     SRI(PREFETCH_SETTINGS, HUBPREQ, id),\
0038     SRI(PREFETCH_SETTINGS_C, HUBPREQ, id),\
0039     SRI(DCSURF_FLIP_CONTROL2, HUBPREQ, id), \
0040     SRI(CURSOR_SETTINGS, HUBPREQ, id), \
0041     SRI(CURSOR_SURFACE_ADDRESS_HIGH, CURSOR0_, id), \
0042     SRI(CURSOR_SURFACE_ADDRESS, CURSOR0_, id), \
0043     SRI(CURSOR_SIZE, CURSOR0_, id), \
0044     SRI(CURSOR_CONTROL, CURSOR0_, id), \
0045     SRI(CURSOR_POSITION, CURSOR0_, id), \
0046     SRI(CURSOR_HOT_SPOT, CURSOR0_, id), \
0047     SRI(CURSOR_DST_OFFSET, CURSOR0_, id), \
0048     SRI(DMDATA_ADDRESS_HIGH, CURSOR0_, id), \
0049     SRI(DMDATA_ADDRESS_LOW, CURSOR0_, id), \
0050     SRI(DMDATA_CNTL, CURSOR0_, id), \
0051     SRI(DMDATA_SW_CNTL, CURSOR0_, id), \
0052     SRI(DMDATA_QOS_CNTL, CURSOR0_, id), \
0053     SRI(DMDATA_SW_DATA, CURSOR0_, id), \
0054     SRI(DMDATA_STATUS, CURSOR0_, id),\
0055     SRI(FLIP_PARAMETERS_0, HUBPREQ, id),\
0056     SRI(FLIP_PARAMETERS_2, HUBPREQ, id)
0057 
0058 #define HUBP_MASK_SH_LIST_DCN201(mask_sh)\
0059     HUBP_MASK_SH_LIST_DCN(mask_sh),\
0060     HUBP_SF(HUBPREQ0_PREFETCH_SETTINGS, DST_Y_PREFETCH, mask_sh),\
0061     HUBP_SF(HUBPREQ0_PREFETCH_SETTINGS, VRATIO_PREFETCH, mask_sh),\
0062     HUBP_SF(HUBPREQ0_PREFETCH_SETTINGS_C, VRATIO_PREFETCH_C, mask_sh),\
0063     HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL2, SURFACE_TRIPLE_BUFFER_ENABLE, mask_sh),\
0064     HUBP_SF(HUBPREQ0_CURSOR_SETTINGS, CURSOR0_DST_Y_OFFSET, mask_sh), \
0065     HUBP_SF(HUBPREQ0_CURSOR_SETTINGS, CURSOR0_CHUNK_HDL_ADJUST, mask_sh), \
0066     HUBP_SF(CURSOR0_0_CURSOR_SURFACE_ADDRESS_HIGH, CURSOR_SURFACE_ADDRESS_HIGH, mask_sh), \
0067     HUBP_SF(CURSOR0_0_CURSOR_SURFACE_ADDRESS, CURSOR_SURFACE_ADDRESS, mask_sh), \
0068     HUBP_SF(CURSOR0_0_CURSOR_SIZE, CURSOR_WIDTH, mask_sh), \
0069     HUBP_SF(CURSOR0_0_CURSOR_SIZE, CURSOR_HEIGHT, mask_sh), \
0070     HUBP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_MODE, mask_sh), \
0071     HUBP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_2X_MAGNIFY, mask_sh), \
0072     HUBP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_PITCH, mask_sh), \
0073     HUBP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_LINES_PER_CHUNK, mask_sh), \
0074     HUBP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
0075     HUBP_SF(CURSOR0_0_CURSOR_POSITION, CURSOR_X_POSITION, mask_sh), \
0076     HUBP_SF(CURSOR0_0_CURSOR_POSITION, CURSOR_Y_POSITION, mask_sh), \
0077     HUBP_SF(CURSOR0_0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_X, mask_sh), \
0078     HUBP_SF(CURSOR0_0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \
0079     HUBP_SF(CURSOR0_0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh), \
0080     HUBP_SF(CURSOR0_0_DMDATA_ADDRESS_HIGH, DMDATA_ADDRESS_HIGH, mask_sh), \
0081     HUBP_SF(CURSOR0_0_DMDATA_CNTL, DMDATA_MODE, mask_sh), \
0082     HUBP_SF(CURSOR0_0_DMDATA_CNTL, DMDATA_UPDATED, mask_sh), \
0083     HUBP_SF(CURSOR0_0_DMDATA_CNTL, DMDATA_REPEAT, mask_sh), \
0084     HUBP_SF(CURSOR0_0_DMDATA_CNTL, DMDATA_SIZE, mask_sh), \
0085     HUBP_SF(CURSOR0_0_DMDATA_SW_CNTL, DMDATA_SW_UPDATED, mask_sh), \
0086     HUBP_SF(CURSOR0_0_DMDATA_SW_CNTL, DMDATA_SW_REPEAT, mask_sh), \
0087     HUBP_SF(CURSOR0_0_DMDATA_SW_CNTL, DMDATA_SW_SIZE, mask_sh), \
0088     HUBP_SF(CURSOR0_0_DMDATA_QOS_CNTL, DMDATA_QOS_MODE, mask_sh), \
0089     HUBP_SF(CURSOR0_0_DMDATA_QOS_CNTL, DMDATA_QOS_LEVEL, mask_sh), \
0090     HUBP_SF(CURSOR0_0_DMDATA_QOS_CNTL, DMDATA_DL_DELTA, mask_sh),\
0091     HUBP_SF(HUBPREQ0_FLIP_PARAMETERS_0, DST_Y_PER_VM_FLIP, mask_sh),\
0092     HUBP_SF(HUBPREQ0_FLIP_PARAMETERS_0, DST_Y_PER_ROW_FLIP, mask_sh),\
0093     HUBP_SF(HUBPREQ0_FLIP_PARAMETERS_2, REFCYC_PER_META_CHUNK_FLIP_L, mask_sh),\
0094     HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_VREADY_AT_OR_AFTER_VSYNC, mask_sh),\
0095     HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_DISABLE_STOP_DATA_DURING_VM, mask_sh),\
0096     HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, HUBPREQ_MASTER_UPDATE_LOCK_STATUS, mask_sh)
0097 
0098 #define DCN201_HUBP_REG_VARIABLE_LIST \
0099     DCN2_HUBP_REG_COMMON_VARIABLE_LIST
0100 
0101 #define DCN201_HUBP_REG_FIELD_VARIABLE_LIST(type) \
0102     DCN2_HUBP_REG_FIELD_VARIABLE_LIST(type)
0103 
0104 struct dcn201_hubp_registers {
0105     DCN201_HUBP_REG_VARIABLE_LIST;
0106 };
0107 
0108 struct dcn201_hubp_shift {
0109     DCN201_HUBP_REG_FIELD_VARIABLE_LIST(uint8_t);
0110 };
0111 
0112 struct dcn201_hubp_mask {
0113     DCN201_HUBP_REG_FIELD_VARIABLE_LIST(uint32_t);
0114 };
0115 
0116 struct dcn201_hubp {
0117     struct hubp base;
0118     struct dcn_hubp_state state;
0119     const struct dcn201_hubp_registers *hubp_regs;
0120     const struct dcn201_hubp_shift *hubp_shift;
0121     const struct dcn201_hubp_mask *hubp_mask;
0122 };
0123 
0124 bool dcn201_hubp_construct(
0125     struct dcn201_hubp *hubp201,
0126     struct dc_context *ctx,
0127     uint32_t inst,
0128     const struct dcn201_hubp_registers *hubp_regs,
0129     const struct dcn201_hubp_shift *hubp_shift,
0130     const struct dcn201_hubp_mask *hubp_mask);
0131 
0132 #endif /* __DC_HWSS_DCN20_H__ */