dc/dcn201/dcn201_dpp.c

0001 /*
0002  * Copyright 2016 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #include "dm_services.h"
0027
0028 #include "core_types.h"
0029
0030 #include "reg_helper.h"
0031 #include "dcn201_dpp.h"
0032 #include "basics/conversion.h"
0033
0034 #define REG(reg)\
0035     dpp->tf_regs->reg
0036
0037 #define CTX \
0038     dpp->base.ctx
0039
0040 #undef FN
0041 #define FN(reg_name, field_name) \
0042     dpp->tf_shift->field_name, dpp->tf_mask->field_name
0043
0044 static void dpp201_cnv_setup(
0045         struct dpp *dpp_base,
0046         enum surface_pixel_format format,
0047         enum expansion_mode mode,
0048         struct dc_csc_transform input_csc_color_matrix,
0049         enum dc_color_space input_color_space,
0050         struct cnv_alpha_2bit_lut *alpha_2bit_lut)
0051 {
0052     struct dcn201_dpp *dpp = TO_DCN201_DPP(dpp_base);
0053     uint32_t pixel_format = 0;
0054     uint32_t alpha_en = 1;
0055     enum dc_color_space color_space = COLOR_SPACE_SRGB;
0056     enum dcn10_input_csc_select select = INPUT_CSC_SELECT_BYPASS;
0057     bool force_disable_cursor = false;
0058     uint32_t is_2bit = 0;
0059
0060     REG_SET_2(FORMAT_CONTROL, 0,
0061         CNVC_BYPASS, 0,
0062         FORMAT_EXPANSION_MODE, mode);
0063
0064     REG_UPDATE(FORMAT_CONTROL, FORMAT_CNV16, 0);
0065     REG_UPDATE(FORMAT_CONTROL, CNVC_BYPASS_MSB_ALIGN, 0);
0066     REG_UPDATE(FORMAT_CONTROL, CLAMP_POSITIVE, 0);
0067     REG_UPDATE(FORMAT_CONTROL, CLAMP_POSITIVE_C, 0);
0068
0069     switch (format) {
0070     case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555:
0071         pixel_format = 1;
0072         break;
0073     case SURFACE_PIXEL_FORMAT_GRPH_RGB565:
0074         pixel_format = 3;
0075         alpha_en = 0;
0076         break;
0077     case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888:
0078     case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888:
0079         pixel_format = 8;
0080         break;
0081     case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010:
0082     case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010:
0083         pixel_format = 10;
0084         is_2bit = 1;
0085         break;
0086     case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr:
0087         force_disable_cursor = false;
0088         pixel_format = 65;
0089         color_space = COLOR_SPACE_YCBCR709;
0090         select = INPUT_CSC_SELECT_ICSC;
0091         break;
0092     case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb:
0093         force_disable_cursor = true;
0094         pixel_format = 64;
0095         color_space = COLOR_SPACE_YCBCR709;
0096         select = INPUT_CSC_SELECT_ICSC;
0097         break;
0098     case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr:
0099         force_disable_cursor = true;
0100         pixel_format = 67;
0101         color_space = COLOR_SPACE_YCBCR709;
0102         select = INPUT_CSC_SELECT_ICSC;
0103         break;
0104     case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb:
0105         force_disable_cursor = true;
0106         pixel_format = 66;
0107         color_space = COLOR_SPACE_YCBCR709;
0108         select = INPUT_CSC_SELECT_ICSC;
0109         break;
0110     case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
0111         pixel_format = 22;
0112         break;
0113     case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F:
0114         pixel_format = 24;
0115         break;
0116     case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F:
0117         pixel_format = 25;
0118         break;
0119     case SURFACE_PIXEL_FORMAT_VIDEO_AYCrCb8888:
0120         pixel_format = 12;
0121         color_space = COLOR_SPACE_YCBCR709;
0122         select = INPUT_CSC_SELECT_ICSC;
0123         break;
0124     case SURFACE_PIXEL_FORMAT_GRPH_RGB111110_FIX:
0125         pixel_format = 112;
0126         alpha_en = 0;
0127         break;
0128     case SURFACE_PIXEL_FORMAT_GRPH_BGR101111_FIX:
0129         pixel_format = 113;
0130         alpha_en = 0;
0131         break;
0132     case SURFACE_PIXEL_FORMAT_VIDEO_ACrYCb2101010:
0133         pixel_format = 114;
0134         color_space = COLOR_SPACE_YCBCR709;
0135         select = INPUT_CSC_SELECT_ICSC;
0136         is_2bit = 1;
0137         break;
0138     case SURFACE_PIXEL_FORMAT_VIDEO_CrYCbA1010102:
0139         pixel_format = 115;
0140         color_space = COLOR_SPACE_YCBCR709;
0141         select = INPUT_CSC_SELECT_ICSC;
0142         is_2bit = 1;
0143         break;
0144     case SURFACE_PIXEL_FORMAT_GRPH_RGB111110_FLOAT:
0145         pixel_format = 118;
0146         alpha_en = 0;
0147         break;
0148     case SURFACE_PIXEL_FORMAT_GRPH_BGR101111_FLOAT:
0149         pixel_format = 119;
0150         alpha_en = 0;
0151         break;
0152     default:
0153         break;
0154     }
0155
0156     /* Set default color space based on format if none is given. */
0157     color_space = input_color_space ? input_color_space : color_space;
0158
0159     if (is_2bit == 1 && alpha_2bit_lut != NULL) {
0160         REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0);
0161         REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT1, alpha_2bit_lut->lut1);
0162         REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT2, alpha_2bit_lut->lut2);
0163         REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT3, alpha_2bit_lut->lut3);
0164     }
0165
0166     REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0,
0167             CNVC_SURFACE_PIXEL_FORMAT, pixel_format);
0168     REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en);
0169
0170     dpp1_program_input_csc(dpp_base, color_space, select, NULL);
0171
0172     if (force_disable_cursor) {
0173         REG_UPDATE(CURSOR_CONTROL,
0174                 CURSOR_ENABLE, 0);
0175         REG_UPDATE(CURSOR0_CONTROL,
0176                 CUR0_ENABLE, 0);
0177     }
0178     dpp2_power_on_obuf(dpp_base, true);
0179 }
0180
0181 #define IDENTITY_RATIO(ratio) (dc_fixpt_u3d19(ratio) == (1 << 19))
0182
0183 static bool dpp201_get_optimal_number_of_taps(
0184         struct dpp *dpp,
0185         struct scaler_data *scl_data,
0186         const struct scaling_taps *in_taps)
0187 {
0188     uint32_t pixel_width;
0189
0190     if (scl_data->viewport.width > scl_data->recout.width)
0191         pixel_width = scl_data->recout.width;
0192     else
0193         pixel_width = scl_data->viewport.width;
0194
0195     if (scl_data->viewport.width  != scl_data->h_active &&
0196         scl_data->viewport.height != scl_data->v_active &&
0197         dpp->caps->dscl_data_proc_format == DSCL_DATA_PRCESSING_FIXED_FORMAT &&
0198         scl_data->format == PIXEL_FORMAT_FP16)
0199         return false;
0200
0201     if (scl_data->viewport.width > scl_data->h_active &&
0202         dpp->ctx->dc->debug.max_downscale_src_width != 0 &&
0203         scl_data->viewport.width > dpp->ctx->dc->debug.max_downscale_src_width)
0204         return false;
0205
0206     if (scl_data->ratios.horz.value == (8ll << 32))
0207         scl_data->ratios.horz.value--;
0208     if (scl_data->ratios.vert.value == (8ll << 32))
0209         scl_data->ratios.vert.value--;
0210     if (scl_data->ratios.horz_c.value == (8ll << 32))
0211         scl_data->ratios.horz_c.value--;
0212     if (scl_data->ratios.vert_c.value == (8ll << 32))
0213         scl_data->ratios.vert_c.value--;
0214
0215     if (in_taps->h_taps == 0) {
0216         if (dc_fixpt_ceil(scl_data->ratios.horz) > 4)
0217             scl_data->taps.h_taps = 8;
0218         else
0219             scl_data->taps.h_taps = 4;
0220     } else
0221         scl_data->taps.h_taps = in_taps->h_taps;
0222
0223     if (in_taps->v_taps == 0) {
0224         if (dc_fixpt_ceil(scl_data->ratios.vert) > 4)
0225             scl_data->taps.v_taps = 8;
0226         else
0227             scl_data->taps.v_taps = 4;
0228     } else
0229         scl_data->taps.v_taps = in_taps->v_taps;
0230     if (in_taps->v_taps_c == 0) {
0231         if (dc_fixpt_ceil(scl_data->ratios.vert_c) > 4)
0232             scl_data->taps.v_taps_c = 4;
0233         else
0234             scl_data->taps.v_taps_c = 2;
0235     } else
0236         scl_data->taps.v_taps_c = in_taps->v_taps_c;
0237     if (in_taps->h_taps_c == 0) {
0238         if (dc_fixpt_ceil(scl_data->ratios.horz_c) > 4)
0239             scl_data->taps.h_taps_c = 4;
0240         else
0241             scl_data->taps.h_taps_c = 2;
0242     } else if ((in_taps->h_taps_c % 2) != 0 && in_taps->h_taps_c != 1)
0243         scl_data->taps.h_taps_c = in_taps->h_taps_c - 1;
0244     else
0245         scl_data->taps.h_taps_c = in_taps->h_taps_c;
0246
0247     if (!dpp->ctx->dc->debug.always_scale) {
0248         if (IDENTITY_RATIO(scl_data->ratios.horz))
0249             scl_data->taps.h_taps = 1;
0250         if (IDENTITY_RATIO(scl_data->ratios.vert))
0251             scl_data->taps.v_taps = 1;
0252         if (IDENTITY_RATIO(scl_data->ratios.horz_c))
0253             scl_data->taps.h_taps_c = 1;
0254         if (IDENTITY_RATIO(scl_data->ratios.vert_c))
0255             scl_data->taps.v_taps_c = 1;
0256     }
0257
0258     return true;
0259 }
0260
0261 static struct dpp_funcs dcn201_dpp_funcs = {
0262     .dpp_read_state = dpp20_read_state,
0263     .dpp_reset = dpp_reset,
0264     .dpp_set_scaler = dpp1_dscl_set_scaler_manual_scale,
0265     .dpp_get_optimal_number_of_taps = dpp201_get_optimal_number_of_taps,
0266     .dpp_set_gamut_remap = dpp1_cm_set_gamut_remap,
0267     .dpp_set_csc_adjustment = NULL,
0268     .dpp_set_csc_default = NULL,
0269     .dpp_program_regamma_pwl = oppn20_dummy_program_regamma_pwl,
0270     .dpp_set_degamma = dpp2_set_degamma,
0271     .dpp_program_input_lut = dpp2_dummy_program_input_lut,
0272     .dpp_full_bypass = dpp1_full_bypass,
0273     .dpp_setup = dpp201_cnv_setup,
0274     .dpp_program_degamma_pwl = dpp2_set_degamma_pwl,
0275     .dpp_program_blnd_lut = dpp20_program_blnd_lut,
0276     .dpp_program_shaper_lut = dpp20_program_shaper,
0277     .dpp_program_3dlut = dpp20_program_3dlut,
0278     .dpp_program_bias_and_scale = NULL,
0279     .dpp_cnv_set_alpha_keyer = dpp2_cnv_set_alpha_keyer,
0280     .set_cursor_attributes = dpp2_set_cursor_attributes,
0281     .set_cursor_position = dpp1_set_cursor_position,
0282     .set_optional_cursor_attributes = dpp1_cnv_set_optional_cursor_attributes,
0283     .dpp_dppclk_control = dpp1_dppclk_control,
0284     .dpp_set_hdr_multiplier = dpp2_set_hdr_multiplier,
0285 };
0286
0287 static struct dpp_caps dcn201_dpp_cap = {
0288     .dscl_data_proc_format = DSCL_DATA_PRCESSING_FLOAT_FORMAT,
0289     .dscl_calc_lb_num_partitions = dscl2_calc_lb_num_partitions,
0290 };
0291
0292 bool dpp201_construct(
0293     struct dcn201_dpp *dpp,
0294     struct dc_context *ctx,
0295     uint32_t inst,
0296     const struct dcn201_dpp_registers *tf_regs,
0297     const struct dcn201_dpp_shift *tf_shift,
0298     const struct dcn201_dpp_mask *tf_mask)
0299 {
0300     dpp->base.ctx = ctx;
0301
0302     dpp->base.inst = inst;
0303     dpp->base.funcs = &dcn201_dpp_funcs;
0304     dpp->base.caps = &dcn201_dpp_cap;
0305
0306     dpp->tf_regs = tf_regs;
0307     dpp->tf_shift = tf_shift;
0308     dpp->tf_mask = tf_mask;
0309
0310     dpp->lb_pixel_depth_supported =
0311         LB_PIXEL_DEPTH_18BPP |
0312         LB_PIXEL_DEPTH_24BPP |
0313         LB_PIXEL_DEPTH_30BPP;
0314
0315     dpp->lb_bits_per_entry = LB_BITS_PER_ENTRY;
0316     dpp->lb_memory_size = LB_TOTAL_NUMBER_OF_ENTRIES;
0317
0318     return true;
0319 }