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0001 /*
0002 * Copyright 2017 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025 
0026 #ifndef __DC_RESOURCE_DCN20_H__
0027 #define __DC_RESOURCE_DCN20_H__
0028 
0029 #include "core_types.h"
0030 #include "dml/dcn20/dcn20_fpu.h"
0031 
0032 #define TO_DCN20_RES_POOL(pool)\
0033     container_of(pool, struct dcn20_resource_pool, base)
0034 
0035 struct dc;
0036 struct resource_pool;
0037 struct _vcs_dpi_display_pipe_params_st;
0038 
0039 extern struct _vcs_dpi_ip_params_st dcn2_0_ip;
0040 extern struct _vcs_dpi_ip_params_st dcn2_0_nv14_ip;
0041 extern struct _vcs_dpi_soc_bounding_box_st dcn2_0_soc;
0042 extern struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv14_soc;
0043 extern struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc;
0044 
0045 struct dcn20_resource_pool {
0046     struct resource_pool base;
0047 };
0048 struct resource_pool *dcn20_create_resource_pool(
0049         const struct dc_init_data *init_data,
0050         struct dc *dc);
0051 
0052 struct link_encoder *dcn20_link_encoder_create(
0053     struct dc_context *ctx,
0054     const struct encoder_init_data *enc_init_data);
0055 
0056 unsigned int dcn20_calc_max_scaled_time(
0057         unsigned int time_per_pixel,
0058         enum mmhubbub_wbif_mode mode,
0059         unsigned int urgent_watermark);
0060 
0061 struct pipe_ctx *dcn20_acquire_idle_pipe_for_layer(
0062         struct dc_state *state,
0063         const struct resource_pool *pool,
0064         struct dc_stream_state *stream);
0065 
0066 struct stream_encoder *dcn20_stream_encoder_create(
0067     enum engine_id eng_id,
0068     struct dc_context *ctx);
0069 
0070 struct dce_hwseq *dcn20_hwseq_create(
0071     struct dc_context *ctx);
0072 
0073 bool dcn20_get_dcc_compression_cap(const struct dc *dc,
0074         const struct dc_dcc_surface_param *input,
0075         struct dc_surface_dcc_cap *output);
0076 
0077 void dcn20_dpp_destroy(struct dpp **dpp);
0078 
0079 struct dpp *dcn20_dpp_create(
0080     struct dc_context *ctx,
0081     uint32_t inst);
0082 
0083 struct input_pixel_processor *dcn20_ipp_create(
0084     struct dc_context *ctx, uint32_t inst);
0085 
0086 struct output_pixel_processor *dcn20_opp_create(
0087     struct dc_context *ctx, uint32_t inst);
0088 
0089 struct dce_aux *dcn20_aux_engine_create(
0090     struct dc_context *ctx, uint32_t inst);
0091 
0092 struct dce_i2c_hw *dcn20_i2c_hw_create(
0093     struct dc_context *ctx,
0094     uint32_t inst);
0095 
0096 void dcn20_clock_source_destroy(struct clock_source **clk_src);
0097 
0098 struct display_stream_compressor *dcn20_dsc_create(
0099     struct dc_context *ctx, uint32_t inst);
0100 void dcn20_dsc_destroy(struct display_stream_compressor **dsc);
0101 
0102 struct hubp *dcn20_hubp_create(
0103     struct dc_context *ctx,
0104     uint32_t inst);
0105 struct timing_generator *dcn20_timing_generator_create(
0106         struct dc_context *ctx,
0107         uint32_t instance);
0108 struct mpc *dcn20_mpc_create(struct dc_context *ctx);
0109 struct hubbub *dcn20_hubbub_create(struct dc_context *ctx);
0110 
0111 bool dcn20_dwbc_create(struct dc_context *ctx, struct resource_pool *pool);
0112 bool dcn20_mmhubbub_create(struct dc_context *ctx, struct resource_pool *pool);
0113 
0114 void dcn20_set_mcif_arb_params(
0115         struct dc *dc,
0116         struct dc_state *context,
0117         display_e2e_pipe_params_st *pipes,
0118         int pipe_cnt);
0119 bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate);
0120 void dcn20_merge_pipes_for_validate(
0121         struct dc *dc,
0122         struct dc_state *context);
0123 int dcn20_validate_apply_pipe_split_flags(
0124         struct dc *dc,
0125         struct dc_state *context,
0126         int vlevel,
0127         int *split,
0128         bool *merge);
0129 void dcn20_release_dsc(struct resource_context *res_ctx,
0130             const struct resource_pool *pool,
0131             struct display_stream_compressor **dsc);
0132 bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx);
0133 void dcn20_split_stream_for_mpc(
0134         struct resource_context *res_ctx,
0135         const struct resource_pool *pool,
0136         struct pipe_ctx *primary_pipe,
0137         struct pipe_ctx *secondary_pipe);
0138 bool dcn20_split_stream_for_odm(
0139         const struct dc *dc,
0140         struct resource_context *res_ctx,
0141         struct pipe_ctx *prev_odm_pipe,
0142         struct pipe_ctx *next_odm_pipe);
0143 void dcn20_acquire_dsc(const struct dc *dc,
0144             struct resource_context *res_ctx,
0145             struct display_stream_compressor **dsc,
0146             int pipe_idx);
0147 struct pipe_ctx *dcn20_find_secondary_pipe(struct dc *dc,
0148         struct resource_context *res_ctx,
0149         const struct resource_pool *pool,
0150         const struct pipe_ctx *primary_pipe);
0151 bool dcn20_fast_validate_bw(
0152         struct dc *dc,
0153         struct dc_state *context,
0154         display_e2e_pipe_params_st *pipes,
0155         int *pipe_cnt_out,
0156         int *pipe_split_from,
0157         int *vlevel_out,
0158         bool fast_validate);
0159 
0160 enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);
0161 enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
0162 enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc, struct dc_state *dc_ctx, struct dc_stream_state *dc_stream);
0163 enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
0164 enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state);
0165 
0166 #endif /* __DC_RESOURCE_DCN20_H__ */
0167