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0001 /*
0002  * Copyright 2017 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025 
0026 #ifndef _DCN10_IPP_H_
0027 #define _DCN10_IPP_H_
0028 
0029 #include "ipp.h"
0030 
0031 #define TO_DCN10_IPP(ipp)\
0032     container_of(ipp, struct dcn10_ipp, base)
0033 
0034 #define IPP_REG_LIST_DCN(id) \
0035     SRI(FORMAT_CONTROL, CNVC_CFG, id), \
0036     SRI(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \
0037     SRI(CURSOR0_CONTROL, CNVC_CUR, id), \
0038     SRI(CURSOR0_COLOR0, CNVC_CUR, id), \
0039     SRI(CURSOR0_COLOR1, CNVC_CUR, id)
0040 
0041 #define IPP_REG_LIST_DCN10(id) \
0042     IPP_REG_LIST_DCN(id), \
0043     SRI(CURSOR_SETTINS, HUBPREQ, id), \
0044     SRI(CURSOR_SURFACE_ADDRESS_HIGH, CURSOR, id), \
0045     SRI(CURSOR_SURFACE_ADDRESS, CURSOR, id), \
0046     SRI(CURSOR_SIZE, CURSOR, id), \
0047     SRI(CURSOR_CONTROL, CURSOR, id), \
0048     SRI(CURSOR_POSITION, CURSOR, id), \
0049     SRI(CURSOR_HOT_SPOT, CURSOR, id), \
0050     SRI(CURSOR_DST_OFFSET, CURSOR, id)
0051 
0052 #define IPP_REG_LIST_DCN20(id) \
0053     IPP_REG_LIST_DCN(id), \
0054     SRI(CURSOR_SETTINGS, HUBPREQ, id), \
0055     SRI(CURSOR_SURFACE_ADDRESS_HIGH, CURSOR0_, id), \
0056     SRI(CURSOR_SURFACE_ADDRESS, CURSOR0_, id), \
0057     SRI(CURSOR_SIZE, CURSOR0_, id), \
0058     SRI(CURSOR_CONTROL, CURSOR0_, id), \
0059     SRI(CURSOR_POSITION, CURSOR0_, id), \
0060     SRI(CURSOR_HOT_SPOT, CURSOR0_, id), \
0061     SRI(CURSOR_DST_OFFSET, CURSOR0_, id)
0062 
0063 #define IPP_REG_LIST_DCN201(id) \
0064     IPP_REG_LIST_DCN(id), \
0065     SRI(CURSOR_SURFACE_ADDRESS_HIGH, CURSOR0_, id), \
0066     SRI(CURSOR_SURFACE_ADDRESS, CURSOR0_, id), \
0067     SRI(CURSOR_SIZE, CURSOR0_, id), \
0068     SRI(CURSOR_CONTROL, CURSOR0_, id), \
0069     SRI(CURSOR_POSITION, CURSOR0_, id), \
0070     SRI(CURSOR_HOT_SPOT, CURSOR0_, id), \
0071     SRI(CURSOR_DST_OFFSET, CURSOR0_, id)
0072 
0073 #define CURSOR0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT    0x4
0074 #define CURSOR0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK      0x00000010L
0075 
0076 #define IPP_SF(reg_name, field_name, post_fix)\
0077     .field_name = reg_name ## __ ## field_name ## post_fix
0078 
0079 #define IPP_MASK_SH_LIST_DCN(mask_sh) \
0080     IPP_SF(CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT, CNVC_SURFACE_PIXEL_FORMAT, mask_sh), \
0081     IPP_SF(CNVC_CFG0_FORMAT_CONTROL, CNVC_BYPASS, mask_sh), \
0082     IPP_SF(CNVC_CFG0_FORMAT_CONTROL, ALPHA_EN, mask_sh), \
0083     IPP_SF(CNVC_CFG0_FORMAT_CONTROL, FORMAT_EXPANSION_MODE, mask_sh), \
0084     IPP_SF(CNVC_CUR0_CURSOR0_CONTROL, CUR0_MODE, mask_sh), \
0085     IPP_SF(CNVC_CUR0_CURSOR0_COLOR0, CUR0_COLOR0, mask_sh), \
0086     IPP_SF(CNVC_CUR0_CURSOR0_COLOR1, CUR0_COLOR1, mask_sh), \
0087     IPP_SF(CNVC_CUR0_CURSOR0_CONTROL, CUR0_EXPANSION_MODE, mask_sh), \
0088     IPP_SF(CNVC_CUR0_CURSOR0_CONTROL, CUR0_ENABLE, mask_sh)
0089 
0090 #define IPP_MASK_SH_LIST_DCN10(mask_sh) \
0091     IPP_MASK_SH_LIST_DCN(mask_sh),\
0092     IPP_SF(HUBPREQ0_CURSOR_SETTINS, CURSOR0_DST_Y_OFFSET, mask_sh), \
0093     IPP_SF(HUBPREQ0_CURSOR_SETTINS, CURSOR0_CHUNK_HDL_ADJUST, mask_sh), \
0094     IPP_SF(CURSOR0_CURSOR_SURFACE_ADDRESS_HIGH, CURSOR_SURFACE_ADDRESS_HIGH, mask_sh), \
0095     IPP_SF(CURSOR0_CURSOR_SURFACE_ADDRESS, CURSOR_SURFACE_ADDRESS, mask_sh), \
0096     IPP_SF(CURSOR0_CURSOR_SIZE, CURSOR_WIDTH, mask_sh), \
0097     IPP_SF(CURSOR0_CURSOR_SIZE, CURSOR_HEIGHT, mask_sh), \
0098     IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_MODE, mask_sh), \
0099     IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_2X_MAGNIFY, mask_sh), \
0100     IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_PITCH, mask_sh), \
0101     IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_LINES_PER_CHUNK, mask_sh), \
0102     IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
0103     IPP_SF(CURSOR0_CURSOR_POSITION, CURSOR_X_POSITION, mask_sh), \
0104     IPP_SF(CURSOR0_CURSOR_POSITION, CURSOR_Y_POSITION, mask_sh), \
0105     IPP_SF(CURSOR0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_X, mask_sh), \
0106     IPP_SF(CURSOR0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \
0107     IPP_SF(CURSOR0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh), \
0108     IPP_SF(CNVC_CFG0_FORMAT_CONTROL, OUTPUT_FP, mask_sh)
0109 
0110 #define IPP_MASK_SH_LIST_DCN20(mask_sh) \
0111     IPP_MASK_SH_LIST_DCN(mask_sh), \
0112     IPP_SF(HUBPREQ0_CURSOR_SETTINGS, CURSOR0_DST_Y_OFFSET, mask_sh), \
0113     IPP_SF(HUBPREQ0_CURSOR_SETTINGS, CURSOR0_CHUNK_HDL_ADJUST, mask_sh), \
0114     IPP_SF(CURSOR0_0_CURSOR_SURFACE_ADDRESS_HIGH, CURSOR_SURFACE_ADDRESS_HIGH, mask_sh), \
0115     IPP_SF(CURSOR0_0_CURSOR_SURFACE_ADDRESS, CURSOR_SURFACE_ADDRESS, mask_sh), \
0116     IPP_SF(CURSOR0_0_CURSOR_SIZE, CURSOR_WIDTH, mask_sh), \
0117     IPP_SF(CURSOR0_0_CURSOR_SIZE, CURSOR_HEIGHT, mask_sh), \
0118     IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_MODE, mask_sh), \
0119     IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_2X_MAGNIFY, mask_sh), \
0120     IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_PITCH, mask_sh), \
0121     IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_LINES_PER_CHUNK, mask_sh), \
0122     IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
0123     IPP_SF(CURSOR0_0_CURSOR_POSITION, CURSOR_X_POSITION, mask_sh), \
0124     IPP_SF(CURSOR0_0_CURSOR_POSITION, CURSOR_Y_POSITION, mask_sh), \
0125     IPP_SF(CURSOR0_0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_X, mask_sh), \
0126     IPP_SF(CURSOR0_0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \
0127     IPP_SF(CURSOR0_0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh)
0128 
0129 #define IPP_MASK_SH_LIST_DCN201(mask_sh) \
0130     IPP_MASK_SH_LIST_DCN(mask_sh), \
0131     IPP_SF(CURSOR0_0_CURSOR_SURFACE_ADDRESS_HIGH, CURSOR_SURFACE_ADDRESS_HIGH, mask_sh), \
0132     IPP_SF(CURSOR0_0_CURSOR_SURFACE_ADDRESS, CURSOR_SURFACE_ADDRESS, mask_sh), \
0133     IPP_SF(CURSOR0_0_CURSOR_SIZE, CURSOR_WIDTH, mask_sh), \
0134     IPP_SF(CURSOR0_0_CURSOR_SIZE, CURSOR_HEIGHT, mask_sh), \
0135     IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_MODE, mask_sh), \
0136     IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_2X_MAGNIFY, mask_sh), \
0137     IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_PITCH, mask_sh), \
0138     IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_LINES_PER_CHUNK, mask_sh), \
0139     IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
0140     IPP_SF(CURSOR0_0_CURSOR_POSITION, CURSOR_X_POSITION, mask_sh), \
0141     IPP_SF(CURSOR0_0_CURSOR_POSITION, CURSOR_Y_POSITION, mask_sh), \
0142     IPP_SF(CURSOR0_0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_X, mask_sh), \
0143     IPP_SF(CURSOR0_0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \
0144     IPP_SF(CURSOR0_0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh)
0145 
0146 #define IPP_DCN10_REG_FIELD_LIST(type) \
0147     type CNVC_SURFACE_PIXEL_FORMAT; \
0148     type CNVC_BYPASS; \
0149     type ALPHA_EN; \
0150     type FORMAT_EXPANSION_MODE; \
0151     type CURSOR0_DST_Y_OFFSET; \
0152     type CURSOR0_CHUNK_HDL_ADJUST; \
0153     type CUR0_MODE; \
0154     type CUR0_COLOR0; \
0155     type CUR0_COLOR1; \
0156     type CUR0_EXPANSION_MODE; \
0157     type CURSOR_SURFACE_ADDRESS_HIGH; \
0158     type CURSOR_SURFACE_ADDRESS; \
0159     type CURSOR_WIDTH; \
0160     type CURSOR_HEIGHT; \
0161     type CURSOR_MODE; \
0162     type CURSOR_2X_MAGNIFY; \
0163     type CURSOR_PITCH; \
0164     type CURSOR_LINES_PER_CHUNK; \
0165     type CURSOR_ENABLE; \
0166     type CUR0_ENABLE; \
0167     type CURSOR_X_POSITION; \
0168     type CURSOR_Y_POSITION; \
0169     type CURSOR_HOT_SPOT_X; \
0170     type CURSOR_HOT_SPOT_Y; \
0171     type CURSOR_DST_X_OFFSET; \
0172     type OUTPUT_FP
0173 
0174 struct dcn10_ipp_shift {
0175     IPP_DCN10_REG_FIELD_LIST(uint8_t);
0176 };
0177 
0178 struct dcn10_ipp_mask {
0179     IPP_DCN10_REG_FIELD_LIST(uint32_t);
0180 };
0181 
0182 struct dcn10_ipp_registers {
0183     uint32_t CURSOR_SETTINS;
0184     uint32_t CURSOR_SETTINGS;
0185     uint32_t CNVC_SURFACE_PIXEL_FORMAT;
0186     uint32_t CURSOR0_CONTROL;
0187     uint32_t CURSOR0_COLOR0;
0188     uint32_t CURSOR0_COLOR1;
0189     uint32_t FORMAT_CONTROL;
0190     uint32_t CURSOR_SURFACE_ADDRESS_HIGH;
0191     uint32_t CURSOR_SURFACE_ADDRESS;
0192     uint32_t CURSOR_SIZE;
0193     uint32_t CURSOR_CONTROL;
0194     uint32_t CURSOR_POSITION;
0195     uint32_t CURSOR_HOT_SPOT;
0196     uint32_t CURSOR_DST_OFFSET;
0197 };
0198 
0199 struct dcn10_ipp {
0200     struct input_pixel_processor base;
0201 
0202     const struct dcn10_ipp_registers *regs;
0203     const struct dcn10_ipp_shift *ipp_shift;
0204     const struct dcn10_ipp_mask *ipp_mask;
0205 
0206     struct dc_cursor_attributes curs_attr;
0207 };
0208 
0209 void dcn10_ipp_construct(struct dcn10_ipp *ippn10,
0210     struct dc_context *ctx,
0211     int inst,
0212     const struct dcn10_ipp_registers *regs,
0213     const struct dcn10_ipp_shift *ipp_shift,
0214     const struct dcn10_ipp_mask *ipp_mask);
0215 
0216 void dcn20_ipp_construct(struct dcn10_ipp *ippn10,
0217     struct dc_context *ctx,
0218     int inst,
0219     const struct dcn10_ipp_registers *regs,
0220     const struct dcn10_ipp_shift *ipp_shift,
0221     const struct dcn10_ipp_mask *ipp_mask);
0222 
0223 #endif /* _DCN10_IPP_H_ */