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0001 /*
0002  * Copyright 2016-2020 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025 
0026 #include "hw_sequencer_private.h"
0027 #include "dce110/dce110_hw_sequencer.h"
0028 #include "dcn10_hw_sequencer.h"
0029 #include "dcn20/dcn20_hwseq.h"
0030 
0031 static const struct hw_sequencer_funcs dcn10_funcs = {
0032     .program_gamut_remap = dcn10_program_gamut_remap,
0033     .init_hw = dcn10_init_hw,
0034     .power_down_on_boot = dcn10_power_down_on_boot,
0035     .apply_ctx_to_hw = dce110_apply_ctx_to_hw,
0036     .apply_ctx_for_surface = NULL,
0037     .program_front_end_for_ctx = dcn20_program_front_end_for_ctx,
0038     .post_unlock_program_front_end = dcn10_post_unlock_program_front_end,
0039     .wait_for_pending_cleared = dcn10_wait_for_pending_cleared,
0040     .update_plane_addr = dcn10_update_plane_addr,
0041     .update_dchub = dcn10_update_dchub,
0042     .update_pending_status = dcn10_update_pending_status,
0043     .program_output_csc = dcn10_program_output_csc,
0044     .enable_accelerated_mode = dce110_enable_accelerated_mode,
0045     .enable_timing_synchronization = dcn10_enable_timing_synchronization,
0046     .enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,
0047     .update_info_frame = dce110_update_info_frame,
0048     .send_immediate_sdp_message = dcn10_send_immediate_sdp_message,
0049     .enable_stream = dce110_enable_stream,
0050     .disable_stream = dce110_disable_stream,
0051     .unblank_stream = dcn10_unblank_stream,
0052     .blank_stream = dce110_blank_stream,
0053     .enable_audio_stream = dce110_enable_audio_stream,
0054     .disable_audio_stream = dce110_disable_audio_stream,
0055     .disable_plane = dcn10_disable_plane,
0056     .pipe_control_lock = dcn10_pipe_control_lock,
0057     .cursor_lock = dcn10_cursor_lock,
0058     .interdependent_update_lock = dcn10_lock_all_pipes,
0059     .prepare_bandwidth = dcn10_prepare_bandwidth,
0060     .optimize_bandwidth = dcn10_optimize_bandwidth,
0061     .set_drr = dcn10_set_drr,
0062     .get_position = dcn10_get_position,
0063     .set_static_screen_control = dcn10_set_static_screen_control,
0064     .setup_stereo = dcn10_setup_stereo,
0065     .set_avmute = dce110_set_avmute,
0066     .log_hw_state = dcn10_log_hw_state,
0067     .get_hw_state = dcn10_get_hw_state,
0068     .clear_status_bits = dcn10_clear_status_bits,
0069     .wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
0070     .edp_backlight_control = dce110_edp_backlight_control,
0071     .edp_power_control = dce110_edp_power_control,
0072     .edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,
0073     .set_cursor_position = dcn10_set_cursor_position,
0074     .set_cursor_attribute = dcn10_set_cursor_attribute,
0075     .set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,
0076     .setup_periodic_interrupt = dcn10_setup_periodic_interrupt,
0077     .set_clock = dcn10_set_clock,
0078     .get_clock = dcn10_get_clock,
0079     .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
0080     .calc_vupdate_position = dcn10_calc_vupdate_position,
0081     .power_down = dce110_power_down,
0082     .set_backlight_level = dce110_set_backlight_level,
0083     .set_abm_immediate_disable = dce110_set_abm_immediate_disable,
0084     .set_pipe = dce110_set_pipe,
0085     .get_dcc_en_bits = dcn10_get_dcc_en_bits,
0086     .update_visual_confirm_color = dcn10_update_visual_confirm_color,
0087 };
0088 
0089 static const struct hwseq_private_funcs dcn10_private_funcs = {
0090     .init_pipes = dcn10_init_pipes,
0091     .update_plane_addr = dcn10_update_plane_addr,
0092     .plane_atomic_disconnect = dcn10_plane_atomic_disconnect,
0093     .program_pipe = dcn10_program_pipe,
0094     .update_mpcc = dcn10_update_mpcc,
0095     .set_input_transfer_func = dcn10_set_input_transfer_func,
0096     .set_output_transfer_func = dcn10_set_output_transfer_func,
0097     .power_down = dce110_power_down,
0098     .enable_display_power_gating = dcn10_dummy_display_power_gating,
0099     .blank_pixel_data = dcn10_blank_pixel_data,
0100     .reset_hw_ctx_wrap = dcn10_reset_hw_ctx_wrap,
0101     .enable_stream_timing = dcn10_enable_stream_timing,
0102     .edp_backlight_control = dce110_edp_backlight_control,
0103     .disable_stream_gating = NULL,
0104     .enable_stream_gating = NULL,
0105     .setup_vupdate_interrupt = dcn10_setup_vupdate_interrupt,
0106     .did_underflow_occur = dcn10_did_underflow_occur,
0107     .init_blank = NULL,
0108     .disable_vga = dcn10_disable_vga,
0109     .bios_golden_init = dcn10_bios_golden_init,
0110     .plane_atomic_disable = dcn10_plane_atomic_disable,
0111     .plane_atomic_power_down = dcn10_plane_atomic_power_down,
0112     .enable_power_gating_plane = dcn10_enable_power_gating_plane,
0113     .dpp_pg_control = dcn10_dpp_pg_control,
0114     .hubp_pg_control = dcn10_hubp_pg_control,
0115     .dsc_pg_control = NULL,
0116     .set_hdr_multiplier = dcn10_set_hdr_multiplier,
0117     .verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,
0118 };
0119 
0120 void dcn10_hw_sequencer_construct(struct dc *dc)
0121 {
0122     dc->hwss = dcn10_funcs;
0123     dc->hwseq->funcs = dcn10_private_funcs;
0124 }