dc/dcn10/dcn10_hw_sequencer.h

0001 /*
0002 * Copyright 2016-2020 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef __DC_HWSS_DCN10_H__
0027 #define __DC_HWSS_DCN10_H__
0028
0029 #include "core_types.h"
0030 #include "hw_sequencer_private.h"
0031
0032 struct dc;
0033
0034 void dcn10_hw_sequencer_construct(struct dc *dc);
0035
0036 int dcn10_get_vupdate_offset_from_vsync(struct pipe_ctx *pipe_ctx);
0037 void dcn10_calc_vupdate_position(
0038         struct dc *dc,
0039         struct pipe_ctx *pipe_ctx,
0040         uint32_t *start_line,
0041         uint32_t *end_line);
0042 void dcn10_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx);
0043 enum dc_status dcn10_enable_stream_timing(
0044         struct pipe_ctx *pipe_ctx,
0045         struct dc_state *context,
0046         struct dc *dc);
0047 void dcn10_optimize_bandwidth(
0048         struct dc *dc,
0049         struct dc_state *context);
0050 void dcn10_prepare_bandwidth(
0051         struct dc *dc,
0052         struct dc_state *context);
0053 void dcn10_pipe_control_lock(
0054     struct dc *dc,
0055     struct pipe_ctx *pipe,
0056     bool lock);
0057 void dcn10_cursor_lock(struct dc *dc, struct pipe_ctx *pipe, bool lock);
0058 void dcn10_blank_pixel_data(
0059         struct dc *dc,
0060         struct pipe_ctx *pipe_ctx,
0061         bool blank);
0062 void dcn10_unblank_stream(struct pipe_ctx *pipe_ctx,
0063         struct dc_link_settings *link_settings);
0064 void dcn10_program_output_csc(struct dc *dc,
0065         struct pipe_ctx *pipe_ctx,
0066         enum dc_color_space colorspace,
0067         uint16_t *matrix,
0068         int opp_id);
0069 bool dcn10_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
0070                 const struct dc_stream_state *stream);
0071 bool dcn10_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
0072             const struct dc_plane_state *plane_state);
0073 void dcn10_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx);
0074 void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx);
0075 void dcn10_reset_hw_ctx_wrap(
0076         struct dc *dc,
0077         struct dc_state *context);
0078 void dcn10_disable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx);
0079 void dcn10_lock_all_pipes(
0080         struct dc *dc,
0081         struct dc_state *context,
0082         bool lock);
0083 void dcn10_post_unlock_program_front_end(
0084         struct dc *dc,
0085         struct dc_state *context);
0086 void dcn10_hubp_pg_control(
0087         struct dce_hwseq *hws,
0088         unsigned int hubp_inst,
0089         bool power_on);
0090 void dcn10_dpp_pg_control(
0091         struct dce_hwseq *hws,
0092         unsigned int dpp_inst,
0093         bool power_on);
0094 void dcn10_enable_power_gating_plane(
0095     struct dce_hwseq *hws,
0096     bool enable);
0097 void dcn10_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx);
0098 void dcn10_disable_vga(
0099     struct dce_hwseq *hws);
0100 void dcn10_program_pipe(
0101         struct dc *dc,
0102         struct pipe_ctx *pipe_ctx,
0103         struct dc_state *context);
0104 void dcn10_program_gamut_remap(struct pipe_ctx *pipe_ctx);
0105 void dcn10_init_hw(struct dc *dc);
0106 void dcn10_init_pipes(struct dc *dc, struct dc_state *context);
0107 void dcn10_power_down_on_boot(struct dc *dc);
0108 enum dc_status dce110_apply_ctx_to_hw(
0109         struct dc *dc,
0110         struct dc_state *context);
0111 void dcn10_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx);
0112 void dcn10_update_dchub(struct dce_hwseq *hws, struct dchub_init_data *dh_data);
0113 void dcn10_update_pending_status(struct pipe_ctx *pipe_ctx);
0114 void dce110_power_down(struct dc *dc);
0115 void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context);
0116 void dcn10_enable_timing_synchronization(
0117         struct dc *dc,
0118         int group_index,
0119         int group_size,
0120         struct pipe_ctx *grouped_pipes[]);
0121 void dcn10_enable_vblanks_synchronization(
0122         struct dc *dc,
0123         int group_index,
0124         int group_size,
0125         struct pipe_ctx *grouped_pipes[]);
0126 void dcn10_enable_per_frame_crtc_position_reset(
0127         struct dc *dc,
0128         int group_size,
0129         struct pipe_ctx *grouped_pipes[]);
0130 void dce110_update_info_frame(struct pipe_ctx *pipe_ctx);
0131 void dcn10_send_immediate_sdp_message(struct pipe_ctx *pipe_ctx,
0132         const uint8_t *custom_sdp_message,
0133         unsigned int sdp_message_size);
0134 void dce110_blank_stream(struct pipe_ctx *pipe_ctx);
0135 void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx);
0136 void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx);
0137 bool dcn10_dummy_display_power_gating(
0138         struct dc *dc,
0139         uint8_t controller_id,
0140         struct dc_bios *dcb,
0141         enum pipe_gating_control power_gating);
0142 void dcn10_set_drr(struct pipe_ctx **pipe_ctx,
0143         int num_pipes, struct dc_crtc_timing_adjust adjust);
0144 void dcn10_get_position(struct pipe_ctx **pipe_ctx,
0145         int num_pipes,
0146         struct crtc_position *position);
0147 void dcn10_set_static_screen_control(struct pipe_ctx **pipe_ctx,
0148         int num_pipes, const struct dc_static_screen_params *params);
0149 void dcn10_setup_stereo(struct pipe_ctx *pipe_ctx, struct dc *dc);
0150 void dce110_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
0151 void dcn10_log_hw_state(struct dc *dc,
0152         struct dc_log_buffer_ctx *log_ctx);
0153 void dcn10_get_hw_state(struct dc *dc,
0154         char *pBuf,
0155         unsigned int bufSize,
0156         unsigned int mask);
0157 void dcn10_clear_status_bits(struct dc *dc, unsigned int mask);
0158 void dcn10_wait_for_mpcc_disconnect(
0159         struct dc *dc,
0160         struct resource_pool *res_pool,
0161         struct pipe_ctx *pipe_ctx);
0162 void dce110_edp_backlight_control(
0163         struct dc_link *link,
0164         bool enable);
0165 void dce110_edp_wait_for_T12(
0166         struct dc_link *link);
0167 void dce110_edp_power_control(
0168         struct dc_link *link,
0169         bool power_up);
0170 void dce110_edp_wait_for_hpd_ready(
0171         struct dc_link *link,
0172         bool power_up);
0173 void dcn10_set_cursor_position(struct pipe_ctx *pipe_ctx);
0174 void dcn10_set_cursor_attribute(struct pipe_ctx *pipe_ctx);
0175 void dcn10_set_cursor_sdr_white_level(struct pipe_ctx *pipe_ctx);
0176 void dcn10_setup_periodic_interrupt(
0177         struct dc *dc,
0178         struct pipe_ctx *pipe_ctx,
0179         enum vline_select vline);
0180 enum dc_status dcn10_set_clock(struct dc *dc,
0181         enum dc_clock_type clock_type,
0182         uint32_t clk_khz,
0183         uint32_t stepping);
0184 void dcn10_get_clock(struct dc *dc,
0185         enum dc_clock_type clock_type,
0186         struct dc_clock_config *clock_cfg);
0187 bool dcn10_did_underflow_occur(struct dc *dc, struct pipe_ctx *pipe_ctx);
0188 void dcn10_bios_golden_init(struct dc *dc);
0189 void dcn10_plane_atomic_power_down(struct dc *dc,
0190         struct dpp *dpp,
0191         struct hubp *hubp);
0192 bool dcn10_disconnect_pipes(
0193         struct dc *dc,
0194         struct dc_state *context);
0195
0196 void dcn10_wait_for_pending_cleared(struct dc *dc,
0197         struct dc_state *context);
0198 void dcn10_set_hdr_multiplier(struct pipe_ctx *pipe_ctx);
0199 void dcn10_verify_allow_pstate_change_high(struct dc *dc);
0200
0201 void dcn10_get_dcc_en_bits(struct dc *dc, int *dcc_en_bits);
0202
0203 void dcn10_update_visual_confirm_color(
0204         struct dc *dc,
0205         struct pipe_ctx *pipe_ctx,
0206         struct tg_color *color,
0207         int mpcc_id);
0208
0209 #endif /* __DC_HWSS_DCN10_H__ */