dc/dcn10/dcn10_hubbub.h

0001 /*
0002  * Copyright 2016 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef __DC_HUBBUB_DCN10_H__
0027 #define __DC_HUBBUB_DCN10_H__
0028
0029 #include "core_types.h"
0030 #include "dchubbub.h"
0031
0032 #define TO_DCN10_HUBBUB(hubbub)\
0033     container_of(hubbub, struct dcn10_hubbub, base)
0034
0035 #define HUBBUB_REG_LIST_DCN_COMMON()\
0036     SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A),\
0037     SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A),\
0038     SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B),\
0039     SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B),\
0040     SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C),\
0041     SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C),\
0042     SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D),\
0043     SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D),\
0044     SR(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL),\
0045     SR(DCHUBBUB_ARB_DRAM_STATE_CNTL),\
0046     SR(DCHUBBUB_ARB_SAT_LEVEL),\
0047     SR(DCHUBBUB_ARB_DF_REQ_OUTSTAND),\
0048     SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \
0049     SR(DCHUBBUB_TEST_DEBUG_INDEX), \
0050     SR(DCHUBBUB_TEST_DEBUG_DATA),\
0051     SR(DCHUBBUB_SOFT_RESET)
0052
0053 #define HUBBUB_VM_REG_LIST() \
0054     SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A),\
0055     SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B),\
0056     SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C),\
0057     SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D)
0058
0059 #define HUBBUB_SR_WATERMARK_REG_LIST()\
0060     SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A),\
0061     SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A),\
0062     SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B),\
0063     SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B),\
0064     SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C),\
0065     SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C),\
0066     SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D),\
0067     SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D)
0068
0069 #define HUBBUB_REG_LIST_DCN10(id)\
0070     HUBBUB_REG_LIST_DCN_COMMON(), \
0071     HUBBUB_VM_REG_LIST(), \
0072     HUBBUB_SR_WATERMARK_REG_LIST(), \
0073     SR(DCHUBBUB_SDPIF_FB_TOP),\
0074     SR(DCHUBBUB_SDPIF_FB_BASE),\
0075     SR(DCHUBBUB_SDPIF_FB_OFFSET),\
0076     SR(DCHUBBUB_SDPIF_AGP_BASE),\
0077     SR(DCHUBBUB_SDPIF_AGP_BOT),\
0078     SR(DCHUBBUB_SDPIF_AGP_TOP)
0079
0080 struct dcn_hubbub_registers {
0081     uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A;
0082     uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A;
0083     uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A;
0084     uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A;
0085     uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;
0086     uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B;
0087     uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B;
0088     uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B;
0089     uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B;
0090     uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;
0091     uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C;
0092     uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C;
0093     uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C;
0094     uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C;
0095     uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;
0096     uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D;
0097     uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D;
0098     uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D;
0099     uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D;
0100     uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;
0101     uint32_t DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL;
0102     uint32_t DCHUBBUB_ARB_SAT_LEVEL;
0103     uint32_t DCHUBBUB_ARB_DF_REQ_OUTSTAND;
0104     uint32_t DCHUBBUB_GLOBAL_TIMER_CNTL;
0105     uint32_t DCHUBBUB_ARB_DRAM_STATE_CNTL;
0106     uint32_t DCHUBBUB_TEST_DEBUG_INDEX;
0107     uint32_t DCHUBBUB_TEST_DEBUG_DATA;
0108     uint32_t DCHUBBUB_SDPIF_FB_TOP;
0109     uint32_t DCHUBBUB_SDPIF_FB_BASE;
0110     uint32_t DCHUBBUB_SDPIF_FB_OFFSET;
0111     uint32_t DCHUBBUB_SDPIF_AGP_BASE;
0112     uint32_t DCHUBBUB_SDPIF_AGP_BOT;
0113     uint32_t DCHUBBUB_SDPIF_AGP_TOP;
0114     uint32_t DCHUBBUB_CRC_CTRL;
0115     uint32_t DCHUBBUB_SOFT_RESET;
0116     uint32_t DCN_VM_FB_LOCATION_BASE;
0117     uint32_t DCN_VM_FB_LOCATION_TOP;
0118     uint32_t DCN_VM_FB_OFFSET;
0119     uint32_t DCN_VM_AGP_BOT;
0120     uint32_t DCN_VM_AGP_TOP;
0121     uint32_t DCN_VM_AGP_BASE;
0122     uint32_t DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB;
0123     uint32_t DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB;
0124     uint32_t DCN_VM_FAULT_ADDR_MSB;
0125     uint32_t DCN_VM_FAULT_ADDR_LSB;
0126     uint32_t DCN_VM_FAULT_CNTL;
0127     uint32_t DCN_VM_FAULT_STATUS;
0128     uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_A;
0129     uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_B;
0130     uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_C;
0131     uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_D;
0132     uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A;
0133     uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B;
0134     uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C;
0135     uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D;
0136     uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A;
0137     uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B;
0138     uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C;
0139     uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D;
0140     uint32_t DCHUBBUB_ARB_HOSTVM_CNTL;
0141     uint32_t DCHVM_CTRL0;
0142     uint32_t DCHVM_MEM_CTRL;
0143     uint32_t DCHVM_CLK_CTRL;
0144     uint32_t DCHVM_RIOMMU_CTRL0;
0145     uint32_t DCHVM_RIOMMU_STAT0;
0146     uint32_t DCHUBBUB_DET0_CTRL;
0147     uint32_t DCHUBBUB_DET1_CTRL;
0148     uint32_t DCHUBBUB_DET2_CTRL;
0149     uint32_t DCHUBBUB_DET3_CTRL;
0150     uint32_t DCHUBBUB_COMPBUF_CTRL;
0151     uint32_t COMPBUF_RESERVED_SPACE;
0152     uint32_t DCHUBBUB_DEBUG_CTRL_0;
0153     uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A;
0154     uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A;
0155     uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B;
0156     uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B;
0157     uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C;
0158     uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C;
0159     uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D;
0160     uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D;
0161     uint32_t DCHUBBUB_ARB_USR_RETRAINING_CNTL;
0162     uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_A;
0163     uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_B;
0164     uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_C;
0165     uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_D;
0166     uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_A;
0167     uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_B;
0168     uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_C;
0169     uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_D;
0170     uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_A;
0171     uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_B;
0172     uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_C;
0173     uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_D;
0174 };
0175
0176 #define HUBBUB_REG_FIELD_LIST_DCN32(type) \
0177         type DCHUBBUB_ARB_ALLOW_USR_RETRAINING_FORCE_VALUE;\
0178         type DCHUBBUB_ARB_ALLOW_USR_RETRAINING_FORCE_ENABLE;\
0179         type DCHUBBUB_ARB_DO_NOT_FORCE_ALLOW_USR_RETRAINING_DURING_PSTATE_CHANGE_REQUEST;\
0180         type DCHUBBUB_ARB_DO_NOT_FORCE_ALLOW_USR_RETRAINING_DURING_PRE_CSTATE;\
0181         type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_A;\
0182         type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_B;\
0183         type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_C;\
0184         type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_D;\
0185         type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_A;\
0186         type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_B;\
0187         type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_C;\
0188         type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_D;\
0189         type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_A;\
0190         type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_B;\
0191         type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_C;\
0192         type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_D
0193
0194 /* set field name */
0195 #define HUBBUB_SF(reg_name, field_name, post_fix)\
0196     .field_name = reg_name ## __ ## field_name ## post_fix
0197
0198 #define HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh)\
0199         HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \
0200         HUBBUB_SF(DCHUBBUB_SOFT_RESET, DCHUBBUB_GLOBAL_SOFT_RESET, mask_sh), \
0201         HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST, mask_sh), \
0202         HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE, mask_sh), \
0203         HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE, mask_sh), \
0204         HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE, mask_sh), \
0205         HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE, mask_sh), \
0206         HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE, mask_sh), \
0207         HUBBUB_SF(DCHUBBUB_ARB_SAT_LEVEL, DCHUBBUB_ARB_SAT_LEVEL, mask_sh), \
0208         HUBBUB_SF(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND, mask_sh), \
0209         HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, mask_sh), \
0210         HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, mask_sh), \
0211         HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, mask_sh), \
0212         HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, mask_sh), \
0213         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, mask_sh), \
0214         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, mask_sh), \
0215         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, mask_sh), \
0216         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, mask_sh)
0217
0218 #define HUBBUB_MASK_SH_LIST_STUTTER(mask_sh) \
0219         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, mask_sh), \
0220         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, mask_sh), \
0221         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, mask_sh), \
0222         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, mask_sh), \
0223         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, mask_sh), \
0224         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, mask_sh), \
0225         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, mask_sh), \
0226         HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, mask_sh)
0227
0228 #define HUBBUB_MASK_SH_LIST_DCN10(mask_sh)\
0229         HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh), \
0230         HUBBUB_MASK_SH_LIST_STUTTER(mask_sh), \
0231         HUBBUB_SF(DCHUBBUB_SDPIF_FB_TOP, SDPIF_FB_TOP, mask_sh), \
0232         HUBBUB_SF(DCHUBBUB_SDPIF_FB_BASE, SDPIF_FB_BASE, mask_sh), \
0233         HUBBUB_SF(DCHUBBUB_SDPIF_FB_OFFSET, SDPIF_FB_OFFSET, mask_sh), \
0234         HUBBUB_SF(DCHUBBUB_SDPIF_AGP_BASE, SDPIF_AGP_BASE, mask_sh), \
0235         HUBBUB_SF(DCHUBBUB_SDPIF_AGP_BOT, SDPIF_AGP_BOT, mask_sh), \
0236         HUBBUB_SF(DCHUBBUB_SDPIF_AGP_TOP, SDPIF_AGP_TOP, mask_sh)
0237
0238 #define DCN_HUBBUB_REG_FIELD_LIST(type) \
0239         type DCHUBBUB_GLOBAL_TIMER_ENABLE; \
0240         type DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST;\
0241         type DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE;\
0242         type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE;\
0243         type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE;\
0244         type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE;\
0245         type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE;\
0246         type DCHUBBUB_ARB_SAT_LEVEL;\
0247         type DCHUBBUB_ARB_MIN_REQ_OUTSTAND;\
0248         type DCHUBBUB_GLOBAL_TIMER_REFDIV;\
0249         type DCHUBBUB_GLOBAL_SOFT_RESET; \
0250         type SDPIF_FB_TOP;\
0251         type SDPIF_FB_BASE;\
0252         type SDPIF_FB_OFFSET;\
0253         type SDPIF_AGP_BASE;\
0254         type SDPIF_AGP_BOT;\
0255         type SDPIF_AGP_TOP;\
0256         type FB_BASE;\
0257         type FB_TOP;\
0258         type FB_OFFSET;\
0259         type AGP_BOT;\
0260         type AGP_TOP;\
0261         type AGP_BASE;\
0262         type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A;\
0263         type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B;\
0264         type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C;\
0265         type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D;\
0266         type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;\
0267         type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;\
0268         type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;\
0269         type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;\
0270         type DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB;\
0271         type DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB;\
0272         type DCN_VM_FAULT_ADDR_MSB;\
0273         type DCN_VM_FAULT_ADDR_LSB;\
0274         type DCN_VM_ERROR_STATUS_CLEAR;\
0275         type DCN_VM_ERROR_STATUS_MODE;\
0276         type DCN_VM_ERROR_INTERRUPT_ENABLE;\
0277         type DCN_VM_RANGE_FAULT_DISABLE;\
0278         type DCN_VM_PRQ_FAULT_DISABLE;\
0279         type DCN_VM_ERROR_STATUS;\
0280         type DCN_VM_ERROR_VMID;\
0281         type DCN_VM_ERROR_TABLE_LEVEL;\
0282         type DCN_VM_ERROR_PIPE;\
0283         type DCN_VM_ERROR_INTERRUPT_STATUS
0284
0285 #define HUBBUB_STUTTER_REG_FIELD_LIST(type) \
0286         type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A;\
0287         type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B;\
0288         type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C;\
0289         type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D;\
0290         type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A;\
0291         type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B;\
0292         type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C;\
0293         type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D
0294
0295 #define HUBBUB_HVM_REG_FIELD_LIST(type) \
0296         type DCHUBBUB_ARB_MIN_REQ_OUTSTAND_COMMIT_THRESHOLD;\
0297         type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_A;\
0298         type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_B;\
0299         type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_C;\
0300         type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_D;\
0301         type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_A;\
0302         type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_B;\
0303         type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_C;\
0304         type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_D;\
0305         type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_A;\
0306         type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_B;\
0307         type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_C;\
0308         type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_D;\
0309         type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;\
0310         type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;\
0311         type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;\
0312         type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;\
0313         type DCHUBBUB_ARB_FRAC_URG_BW_NOM_A;\
0314         type DCHUBBUB_ARB_FRAC_URG_BW_NOM_B;\
0315         type DCHUBBUB_ARB_FRAC_URG_BW_NOM_C;\
0316         type DCHUBBUB_ARB_FRAC_URG_BW_NOM_D;\
0317         type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A;\
0318         type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B;\
0319         type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C;\
0320         type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D;\
0321         type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A;\
0322         type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B;\
0323         type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C;\
0324         type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D;\
0325         type DCHUBBUB_ARB_MAX_QOS_COMMIT_THRESHOLD;\
0326         type HOSTVM_INIT_REQ; \
0327         type HVM_GPUVMRET_PWR_REQ_DIS; \
0328         type HVM_GPUVMRET_FORCE_REQ; \
0329         type HVM_GPUVMRET_POWER_STATUS; \
0330         type HVM_DISPCLK_R_GATE_DIS; \
0331         type HVM_DISPCLK_G_GATE_DIS; \
0332         type HVM_DCFCLK_R_GATE_DIS; \
0333         type HVM_DCFCLK_G_GATE_DIS; \
0334         type TR_REQ_REQCLKREQ_MODE; \
0335         type TW_RSP_COMPCLKREQ_MODE; \
0336         type HOSTVM_PREFETCH_REQ; \
0337         type HOSTVM_POWERSTATUS; \
0338         type RIOMMU_ACTIVE; \
0339         type HOSTVM_PREFETCH_DONE
0340
0341 #define HUBBUB_RET_REG_FIELD_LIST(type) \
0342         type DET_DEPTH;\
0343         type DET0_SIZE;\
0344         type DET1_SIZE;\
0345         type DET2_SIZE;\
0346         type DET3_SIZE;\
0347         type DET0_SIZE_CURRENT;\
0348         type DET1_SIZE_CURRENT;\
0349         type DET2_SIZE_CURRENT;\
0350         type DET3_SIZE_CURRENT;\
0351         type COMPBUF_SIZE;\
0352         type COMPBUF_SIZE_CURRENT;\
0353         type CONFIG_ERROR;\
0354         type COMPBUF_RESERVED_SPACE_64B;\
0355         type COMPBUF_RESERVED_SPACE_ZS;\
0356         type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A;\
0357         type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A;\
0358         type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B;\
0359         type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B;\
0360         type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C;\
0361         type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C;\
0362         type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D;\
0363         type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D
0364
0365
0366 struct dcn_hubbub_shift {
0367     DCN_HUBBUB_REG_FIELD_LIST(uint8_t);
0368     HUBBUB_STUTTER_REG_FIELD_LIST(uint8_t);
0369     HUBBUB_HVM_REG_FIELD_LIST(uint8_t);
0370     HUBBUB_RET_REG_FIELD_LIST(uint8_t);
0371     HUBBUB_REG_FIELD_LIST_DCN32(uint8_t);
0372 };
0373
0374 struct dcn_hubbub_mask {
0375     DCN_HUBBUB_REG_FIELD_LIST(uint32_t);
0376     HUBBUB_STUTTER_REG_FIELD_LIST(uint32_t);
0377     HUBBUB_HVM_REG_FIELD_LIST(uint32_t);
0378     HUBBUB_RET_REG_FIELD_LIST(uint32_t);
0379     HUBBUB_REG_FIELD_LIST_DCN32(uint32_t);
0380 };
0381
0382 struct dc;
0383
0384 struct dcn10_hubbub {
0385     struct hubbub base;
0386     const struct dcn_hubbub_registers *regs;
0387     const struct dcn_hubbub_shift *shifts;
0388     const struct dcn_hubbub_mask *masks;
0389     unsigned int debug_test_index_pstate;
0390     struct dcn_watermark_set watermarks;
0391 };
0392
0393 void hubbub1_update_dchub(
0394     struct hubbub *hubbub,
0395     struct dchub_init_data *dh_data);
0396
0397 bool hubbub1_verify_allow_pstate_change_high(
0398     struct hubbub *hubbub);
0399
0400 void hubbub1_wm_change_req_wa(struct hubbub *hubbub);
0401
0402 bool hubbub1_program_watermarks(
0403         struct hubbub *hubbub,
0404         struct dcn_watermark_set *watermarks,
0405         unsigned int refclk_mhz,
0406         bool safe_to_lower);
0407
0408 void hubbub1_allow_self_refresh_control(struct hubbub *hubbub, bool allow);
0409
0410 bool hubbub1_is_allow_self_refresh_enabled(struct hubbub *hubub);
0411
0412 void hubbub1_toggle_watermark_change_req(
0413         struct hubbub *hubbub);
0414
0415 void hubbub1_wm_read_state(struct hubbub *hubbub,
0416         struct dcn_hubbub_wm *wm);
0417
0418 void hubbub1_soft_reset(struct hubbub *hubbub, bool reset);
0419 void hubbub1_construct(struct hubbub *hubbub,
0420     struct dc_context *ctx,
0421     const struct dcn_hubbub_registers *hubbub_regs,
0422     const struct dcn_hubbub_shift *hubbub_shift,
0423     const struct dcn_hubbub_mask *hubbub_mask);
0424
0425 bool hubbub1_program_urgent_watermarks(
0426         struct hubbub *hubbub,
0427         struct dcn_watermark_set *watermarks,
0428         unsigned int refclk_mhz,
0429         bool safe_to_lower);
0430 bool hubbub1_program_stutter_watermarks(
0431         struct hubbub *hubbub,
0432         struct dcn_watermark_set *watermarks,
0433         unsigned int refclk_mhz,
0434         bool safe_to_lower);
0435 bool hubbub1_program_pstate_watermarks(
0436         struct hubbub *hubbub,
0437         struct dcn_watermark_set *watermarks,
0438         unsigned int refclk_mhz,
0439         bool safe_to_lower);
0440
0441 #endif