dc/dce80/dce80_hw_sequencer.c

0001 /*
0002  * Copyright 2015 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #include "dm_services.h"
0027 #include "dc.h"
0028 #include "core_types.h"
0029 #include "dce80_hw_sequencer.h"
0030
0031 #include "dce/dce_hwseq.h"
0032 #include "dce110/dce110_hw_sequencer.h"
0033 #include "dce100/dce100_hw_sequencer.h"
0034
0035 /* include DCE8 register header files */
0036 #include "dce/dce_8_0_d.h"
0037 #include "dce/dce_8_0_sh_mask.h"
0038
0039 /*******************************************************************************
0040  * Private definitions
0041  ******************************************************************************/
0042
0043 /***************************PIPE_CONTROL***********************************/
0044
0045 void dce80_hw_sequencer_construct(struct dc *dc)
0046 {
0047     dce110_hw_sequencer_construct(dc);
0048
0049     dc->hwseq->funcs.enable_display_power_gating = dce100_enable_display_power_gating;
0050     dc->hwss.pipe_control_lock = dce_pipe_control_lock;
0051     dc->hwss.prepare_bandwidth = dce100_prepare_bandwidth;
0052     dc->hwss.optimize_bandwidth = dce100_optimize_bandwidth;
0053 }
0054