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0001 /*
0002  * Copyright 2012-14 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025 
0026 #ifndef DC_LINK_H_
0027 #define DC_LINK_H_
0028 
0029 #include "dc.h"
0030 #include "dc_types.h"
0031 #include "grph_object_defs.h"
0032 
0033 struct link_resource;
0034 
0035 enum dc_link_fec_state {
0036     dc_link_fec_not_ready,
0037     dc_link_fec_ready,
0038     dc_link_fec_enabled
0039 };
0040 
0041 struct dc_link_status {
0042     bool link_active;
0043     struct dpcd_caps *dpcd_caps;
0044 };
0045 
0046 struct dprx_states {
0047     bool cable_id_written;
0048 };
0049 
0050 /* DP MST stream allocation (payload bandwidth number) */
0051 struct link_mst_stream_allocation {
0052     /* DIG front */
0053     const struct stream_encoder *stream_enc;
0054     /* HPO DP Stream Encoder */
0055     const struct hpo_dp_stream_encoder *hpo_dp_stream_enc;
0056     /* associate DRM payload table with DC stream encoder */
0057     uint8_t vcp_id;
0058     /* number of slots required for the DP stream in transport packet */
0059     uint8_t slot_count;
0060 };
0061 
0062 /* DP MST stream allocation table */
0063 struct link_mst_stream_allocation_table {
0064     /* number of DP video streams */
0065     int stream_count;
0066     /* array of stream allocations */
0067     struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
0068 };
0069 
0070 struct edp_trace_power_timestamps {
0071     uint64_t poweroff;
0072     uint64_t poweron;
0073 };
0074 
0075 struct dp_trace_lt_counts {
0076     unsigned int total;
0077     unsigned int fail;
0078 };
0079 
0080 struct dp_trace_lt {
0081     struct dp_trace_lt_counts counts;
0082     struct dp_trace_timestamps {
0083         unsigned long long start;
0084         unsigned long long end;
0085     } timestamps;
0086     enum link_training_result result;
0087     bool is_logged;
0088 };
0089 
0090 struct dp_trace {
0091     struct dp_trace_lt detect_lt_trace;
0092     struct dp_trace_lt commit_lt_trace;
0093     unsigned int link_loss_count;
0094     bool is_initialized;
0095     struct edp_trace_power_timestamps edp_trace_power_timestamps;
0096 };
0097 
0098 /* PSR feature flags */
0099 struct psr_settings {
0100     bool psr_feature_enabled;       // PSR is supported by sink
0101     bool psr_allow_active;          // PSR is currently active
0102     enum dc_psr_version psr_version;        // Internal PSR version, determined based on DPCD
0103     bool psr_vtotal_control_support;    // Vtotal control is supported by sink
0104 
0105     /* These parameters are calculated in Driver,
0106      * based on display timing and Sink capabilities.
0107      * If VBLANK region is too small and Sink takes a long time
0108      * to set up RFB, it may take an extra frame to enter PSR state.
0109      */
0110     bool psr_frame_capture_indication_req;
0111     unsigned int psr_sdp_transmit_line_num_deadline;
0112     uint8_t force_ffu_mode;
0113     unsigned int psr_power_opt;
0114 };
0115 
0116 /*
0117  * A link contains one or more sinks and their connected status.
0118  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
0119  */
0120 struct dc_link {
0121     struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
0122     unsigned int sink_count;
0123     struct dc_sink *local_sink;
0124     unsigned int link_index;
0125     enum dc_connection_type type;
0126     enum signal_type connector_signal;
0127     enum dc_irq_source irq_source_hpd;
0128     enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
0129     bool is_hpd_filter_disabled;
0130     bool dp_ss_off;
0131     bool link_state_valid;
0132     bool aux_access_disabled;
0133     bool sync_lt_in_progress;
0134     enum lttpr_mode lttpr_mode;
0135     bool is_internal_display;
0136 
0137     /* TODO: Rename. Flag an endpoint as having a programmable mapping to a
0138      * DIG encoder. */
0139     bool is_dig_mapping_flexible;
0140     bool hpd_status; /* HPD status of link without physical HPD pin. */
0141     bool is_hpd_pending; /* Indicates a new received hpd */
0142 
0143     bool edp_sink_present;
0144 
0145     struct dp_trace dp_trace;
0146 
0147     /* caps is the same as reported_link_cap. link_traing use
0148      * reported_link_cap. Will clean up.  TODO
0149      */
0150     struct dc_link_settings reported_link_cap;
0151     struct dc_link_settings verified_link_cap;
0152     struct dc_link_settings cur_link_settings;
0153     struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
0154     struct dc_link_settings preferred_link_setting;
0155     /* preferred_training_settings are override values that
0156      * come from DM. DM is responsible for the memory
0157      * management of the override pointers.
0158      */
0159     struct dc_link_training_overrides preferred_training_settings;
0160     struct dp_audio_test_data audio_test_data;
0161 
0162     uint8_t ddc_hw_inst;
0163 
0164     uint8_t hpd_src;
0165 
0166     uint8_t link_enc_hw_inst;
0167     /* DIG link encoder ID. Used as index in link encoder resource pool.
0168      * For links with fixed mapping to DIG, this is not changed after dc_link
0169      * object creation.
0170      */
0171     enum engine_id eng_id;
0172 
0173     bool test_pattern_enabled;
0174     union compliance_test_state compliance_test_state;
0175 
0176     void *priv;
0177 
0178     struct ddc_service *ddc;
0179 
0180     bool aux_mode;
0181 
0182     /* Private to DC core */
0183 
0184     const struct dc *dc;
0185 
0186     struct dc_context *ctx;
0187 
0188     struct panel_cntl *panel_cntl;
0189     struct link_encoder *link_enc;
0190     struct graphics_object_id link_id;
0191     /* Endpoint type distinguishes display endpoints which do not have entries
0192      * in the BIOS connector table from those that do. Helps when tracking link
0193      * encoder to display endpoint assignments.
0194      */
0195     enum display_endpoint_type ep_type;
0196     union ddi_channel_mapping ddi_channel_mapping;
0197     struct connector_device_tag_info device_tag;
0198     struct dpcd_caps dpcd_caps;
0199     uint32_t dongle_max_pix_clk;
0200     unsigned short chip_caps;
0201     unsigned int dpcd_sink_count;
0202 #if defined(CONFIG_DRM_AMD_DC_HDCP)
0203     struct hdcp_caps hdcp_caps;
0204 #endif
0205     enum edp_revision edp_revision;
0206     union dpcd_sink_ext_caps dpcd_sink_ext_caps;
0207 
0208     struct psr_settings psr_settings;
0209 
0210     /* Drive settings read from integrated info table */
0211     struct dc_lane_settings bios_forced_drive_settings;
0212 
0213     /* Vendor specific LTTPR workaround variables */
0214     uint8_t vendor_specific_lttpr_link_rate_wa;
0215     bool apply_vendor_specific_lttpr_link_rate_wa;
0216 
0217     /* MST record stream using this link */
0218     struct link_flags {
0219         bool dp_keep_receiver_powered;
0220         bool dp_skip_DID2;
0221         bool dp_skip_reset_segment;
0222         bool dp_mot_reset_segment;
0223         /* Some USB4 docks do not handle turning off MST DSC once it has been enabled. */
0224         bool dpia_mst_dsc_always_on;
0225         /* Forced DPIA into TBT3 compatibility mode. */
0226         bool dpia_forced_tbt3_mode;
0227     } wa_flags;
0228     struct link_mst_stream_allocation_table mst_stream_alloc_table;
0229 
0230     struct dc_link_status link_status;
0231     struct dprx_states dprx_states;
0232 
0233     struct gpio *hpd_gpio;
0234     enum dc_link_fec_state fec_state;
0235 };
0236 
0237 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
0238 
0239 /**
0240  * dc_get_link_at_index() - Return an enumerated dc_link.
0241  *
0242  * dc_link order is constant and determined at
0243  * boot time.  They cannot be created or destroyed.
0244  * Use dc_get_caps() to get number of links.
0245  */
0246 static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
0247 {
0248     return dc->links[link_index];
0249 }
0250 
0251 static inline void get_edp_links(const struct dc *dc,
0252         struct dc_link **edp_links,
0253         int *edp_num)
0254 {
0255     int i;
0256 
0257     *edp_num = 0;
0258     for (i = 0; i < dc->link_count; i++) {
0259         // report any eDP links, even unconnected DDI's
0260         if (!dc->links[i])
0261             continue;
0262         if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP) {
0263             edp_links[*edp_num] = dc->links[i];
0264             if (++(*edp_num) == MAX_NUM_EDP)
0265                 return;
0266         }
0267     }
0268 }
0269 
0270 static inline bool dc_get_edp_link_panel_inst(const struct dc *dc,
0271         const struct dc_link *link,
0272         unsigned int *inst_out)
0273 {
0274     struct dc_link *edp_links[MAX_NUM_EDP];
0275     int edp_num;
0276 
0277     if (link->connector_signal != SIGNAL_TYPE_EDP)
0278         return false;
0279     get_edp_links(dc, edp_links, &edp_num);
0280     if ((edp_num > 1) && (link->link_index > edp_links[0]->link_index))
0281         *inst_out = 1;
0282     else
0283         *inst_out = 0;
0284     return true;
0285 }
0286 
0287 /* Set backlight level of an embedded panel (eDP, LVDS).
0288  * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
0289  * and 16 bit fractional, where 1.0 is max backlight value.
0290  */
0291 bool dc_link_set_backlight_level(const struct dc_link *dc_link,
0292         uint32_t backlight_pwm_u16_16,
0293         uint32_t frame_ramp);
0294 
0295 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
0296 bool dc_link_set_backlight_level_nits(struct dc_link *link,
0297         bool isHDR,
0298         uint32_t backlight_millinits,
0299         uint32_t transition_time_in_ms);
0300 
0301 bool dc_link_get_backlight_level_nits(struct dc_link *link,
0302         uint32_t *backlight_millinits,
0303         uint32_t *backlight_millinits_peak);
0304 
0305 bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
0306 
0307 bool dc_link_read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits);
0308 bool dc_link_set_default_brightness_aux(struct dc_link *link);
0309 
0310 int dc_link_get_backlight_level(const struct dc_link *dc_link);
0311 
0312 int dc_link_get_target_backlight_pwm(const struct dc_link *link);
0313 
0314 bool dc_link_set_psr_allow_active(struct dc_link *dc_link, const bool *enable,
0315         bool wait, bool force_static, const unsigned int *power_opts);
0316 
0317 bool dc_link_get_psr_state(const struct dc_link *dc_link, enum dc_psr_state *state);
0318 
0319 bool dc_link_setup_psr(struct dc_link *dc_link,
0320         const struct dc_stream_state *stream, struct psr_config *psr_config,
0321         struct psr_context *psr_context);
0322 
0323 bool dc_power_alpm_dpcd_enable(struct dc_link *link, bool enable);
0324 
0325 void dc_link_get_psr_residency(const struct dc_link *link, uint32_t *residency);
0326 
0327 void dc_link_blank_all_dp_displays(struct dc *dc);
0328 void dc_link_blank_all_edp_displays(struct dc *dc);
0329 
0330 void dc_link_blank_dp_stream(struct dc_link *link, bool hw_init);
0331 bool dc_link_set_sink_vtotal_in_psr_active(const struct dc_link *link,
0332         uint16_t psr_vtotal_idle, uint16_t psr_vtotal_su);
0333 
0334 /* Request DC to detect if there is a Panel connected.
0335  * boot - If this call is during initial boot.
0336  * Return false for any type of detection failure or MST detection
0337  * true otherwise. True meaning further action is required (status update
0338  * and OS notification).
0339  */
0340 enum dc_detect_reason {
0341     DETECT_REASON_BOOT,
0342     DETECT_REASON_RESUMEFROMS3S4,
0343     DETECT_REASON_HPD,
0344     DETECT_REASON_HPDRX,
0345     DETECT_REASON_FALLBACK,
0346     DETECT_REASON_RETRAIN,
0347     DETECT_REASON_TDR,
0348 };
0349 
0350 bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
0351 bool dc_link_get_hpd_state(struct dc_link *dc_link);
0352 enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
0353 enum dc_status dc_link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
0354 enum dc_status dc_link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
0355 
0356 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
0357  * Return:
0358  * true - Downstream port status changed. DM should call DC to do the
0359  * detection.
0360  * false - no change in Downstream port status. No further action required
0361  * from DM. */
0362 bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
0363         union hpd_irq_data *hpd_irq_dpcd_data, bool *out_link_loss,
0364         bool defer_handling, bool *has_left_work);
0365 
0366 /*
0367  * On eDP links this function call will stall until T12 has elapsed.
0368  * If the panel is not in power off state, this function will return
0369  * immediately.
0370  */
0371 bool dc_link_wait_for_t12(struct dc_link *link);
0372 
0373 void dc_link_dp_handle_automated_test(struct dc_link *link);
0374 void dc_link_dp_handle_link_loss(struct dc_link *link);
0375 bool dc_link_dp_allow_hpd_rx_irq(const struct dc_link *link);
0376 
0377 struct dc_sink_init_data;
0378 
0379 struct dc_sink *dc_link_add_remote_sink(
0380         struct dc_link *dc_link,
0381         const uint8_t *edid,
0382         int len,
0383         struct dc_sink_init_data *init_data);
0384 
0385 void dc_link_remove_remote_sink(
0386     struct dc_link *link,
0387     struct dc_sink *sink);
0388 
0389 /* Used by diagnostics for virtual link at the moment */
0390 
0391 void dc_link_dp_set_drive_settings(
0392     struct dc_link *link,
0393     const struct link_resource *link_res,
0394     struct link_training_settings *lt_settings);
0395 
0396 bool dc_link_dp_perform_link_training_skip_aux(
0397     struct dc_link *link,
0398     const struct link_resource *link_res,
0399     const struct dc_link_settings *link_setting);
0400 
0401 enum link_training_result dc_link_dp_perform_link_training(
0402     struct dc_link *link,
0403     const struct link_resource *link_res,
0404     const struct dc_link_settings *link_settings,
0405     bool skip_video_pattern);
0406 
0407 bool dc_link_dp_sync_lt_begin(struct dc_link *link);
0408 
0409 enum link_training_result dc_link_dp_sync_lt_attempt(
0410     struct dc_link *link,
0411     const struct link_resource *link_res,
0412     struct dc_link_settings *link_setting,
0413     struct dc_link_training_overrides *lt_settings);
0414 
0415 bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
0416 
0417 void dc_link_dp_enable_hpd(const struct dc_link *link);
0418 
0419 void dc_link_dp_disable_hpd(const struct dc_link *link);
0420 
0421 bool dc_link_dp_set_test_pattern(
0422     struct dc_link *link,
0423     enum dp_test_pattern test_pattern,
0424     enum dp_test_pattern_color_space test_pattern_color_space,
0425     const struct link_training_settings *p_link_settings,
0426     const unsigned char *p_custom_pattern,
0427     unsigned int cust_pattern_size);
0428 
0429 bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct dc_link_settings *max_link_enc_cap);
0430 
0431 void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
0432 
0433 bool dc_link_is_dp_sink_present(struct dc_link *link);
0434 
0435 bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type);
0436 /*
0437  * DPCD access interfaces
0438  */
0439 
0440 #ifdef CONFIG_DRM_AMD_DC_HDCP
0441 bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
0442 bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
0443 #endif
0444 void dc_link_set_drive_settings(struct dc *dc,
0445                 struct link_training_settings *lt_settings,
0446                 const struct dc_link *link);
0447 void dc_link_set_preferred_link_settings(struct dc *dc,
0448                      struct dc_link_settings *link_setting,
0449                      struct dc_link *link);
0450 void dc_link_set_preferred_training_settings(struct dc *dc,
0451                     struct dc_link_settings *link_setting,
0452                     struct dc_link_training_overrides *lt_overrides,
0453                     struct dc_link *link,
0454                     bool skip_immediate_retrain);
0455 void dc_link_enable_hpd(const struct dc_link *link);
0456 void dc_link_disable_hpd(const struct dc_link *link);
0457 void dc_link_set_test_pattern(struct dc_link *link,
0458             enum dp_test_pattern test_pattern,
0459             enum dp_test_pattern_color_space test_pattern_color_space,
0460             const struct link_training_settings *p_link_settings,
0461             const unsigned char *p_custom_pattern,
0462             unsigned int cust_pattern_size);
0463 uint32_t dc_link_bandwidth_kbps(
0464     const struct dc_link *link,
0465     const struct dc_link_settings *link_setting);
0466 
0467 const struct dc_link_settings *dc_link_get_link_cap(
0468         const struct dc_link *link);
0469 
0470 void dc_link_overwrite_extended_receiver_cap(
0471         struct dc_link *link);
0472 
0473 bool dc_is_oem_i2c_device_present(
0474     struct dc *dc,
0475     size_t slave_address
0476 );
0477 
0478 bool dc_submit_i2c(
0479         struct dc *dc,
0480         uint32_t link_index,
0481         struct i2c_command *cmd);
0482 
0483 bool dc_submit_i2c_oem(
0484         struct dc *dc,
0485         struct i2c_command *cmd);
0486 
0487 uint32_t dc_bandwidth_in_kbps_from_timing(
0488     const struct dc_crtc_timing *timing);
0489 
0490 bool dc_link_is_fec_supported(const struct dc_link *link);
0491 bool dc_link_should_enable_fec(const struct dc_link *link);
0492 
0493 uint32_t dc_link_bw_kbps_from_raw_frl_link_rate_data(uint8_t bw);
0494 enum dp_link_encoding dc_link_dp_mst_decide_link_encoding_format(const struct dc_link *link);
0495 
0496 void dc_link_get_cur_link_res(const struct dc_link *link,
0497         struct link_resource *link_res);
0498 /* take a snapshot of current link resource allocation state */
0499 void dc_get_cur_link_res_map(const struct dc *dc, uint32_t *map);
0500 /* restore link resource allocation state from a snapshot */
0501 void dc_restore_link_res_map(const struct dc *dc, uint32_t *map);
0502 void dc_link_clear_dprx_states(struct dc_link *link);
0503 struct gpio *get_hpd_gpio(struct dc_bios *dcb,
0504         struct graphics_object_id link_id,
0505         struct gpio_service *gpio_service);
0506 void dp_trace_reset(struct dc_link *link);
0507 bool dc_dp_trace_is_initialized(struct dc_link *link);
0508 unsigned long long dc_dp_trace_get_lt_end_timestamp(struct dc_link *link,
0509         bool in_detection);
0510 void dc_dp_trace_set_is_logged_flag(struct dc_link *link,
0511         bool in_detection,
0512         bool is_logged);
0513 bool dc_dp_trace_is_logged(struct dc_link *link,
0514         bool in_detection);
0515 struct dp_trace_lt_counts *dc_dp_trace_get_lt_counts(struct dc_link *link,
0516         bool in_detection);
0517 unsigned int dc_dp_trace_get_link_loss_count(struct dc_link *link);
0518 
0519 /* Destruct the mst topology of the link and reset the allocated payload table */
0520 bool reset_cur_dp_mst_topology(struct dc_link *link);
0521 #endif /* DC_LINK_H_ */