display/dc/dc_dsc.h

0001 #ifndef DC_DSC_H_
0002 #define DC_DSC_H_
0003 /*
0004  * Copyright 2019 Advanced Micro Devices, Inc.
0005  *
0006  * Permission is hereby granted, free of charge, to any person obtaining a
0007  * copy of this software and associated documentation files (the "Software"),
0008  * to deal in the Software without restriction, including without limitation
0009  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0010  * and/or sell copies of the Software, and to permit persons to whom the
0011  * Software is furnished to do so, subject to the following conditions:
0012  *
0013  * The above copyright notice and this permission notice shall be included in
0014  * all copies or substantial portions of the Software.
0015  *
0016  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0017  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0018  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0019  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0020  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0021  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0022  * OTHER DEALINGS IN THE SOFTWARE.
0023  *
0024  * Author: AMD
0025  */
0026
0027 /* put it here temporarily until linux has the new addresses official defined */
0028 /* DP Extended DSC Capabilities */
0029 #define DP_DSC_BRANCH_OVERALL_THROUGHPUT_0  0x0a0   /* DP 1.4a SCR */
0030 #define DP_DSC_BRANCH_OVERALL_THROUGHPUT_1  0x0a1
0031 #define DP_DSC_BRANCH_MAX_LINE_WIDTH        0x0a2
0032 #include "dc_types.h"
0033
0034 struct dc_dsc_bw_range {
0035     uint32_t min_kbps; /* Bandwidth if min_target_bpp_x16 is used */
0036     uint32_t min_target_bpp_x16;
0037     uint32_t max_kbps; /* Bandwidth if max_target_bpp_x16 is used */
0038     uint32_t max_target_bpp_x16;
0039     uint32_t stream_kbps; /* Uncompressed stream bandwidth */
0040 };
0041
0042 struct display_stream_compressor {
0043     const struct dsc_funcs *funcs;
0044     struct dc_context *ctx;
0045     int inst;
0046 };
0047
0048 struct dc_dsc_policy {
0049     bool use_min_slices_h;
0050     int max_slices_h; // Maximum available if 0
0051     int min_slice_height; // Must not be less than 8
0052     uint32_t max_target_bpp;
0053     uint32_t min_target_bpp;
0054     bool enable_dsc_when_not_needed;
0055 };
0056
0057 bool dc_dsc_parse_dsc_dpcd(const struct dc *dc,
0058         const uint8_t *dpcd_dsc_basic_data,
0059         const uint8_t *dpcd_dsc_ext_data,
0060         struct dsc_dec_dpcd_caps *dsc_sink_caps);
0061
0062 bool dc_dsc_compute_bandwidth_range(
0063         const struct display_stream_compressor *dsc,
0064         uint32_t dsc_min_slice_height_override,
0065         uint32_t min_bpp_x16,
0066         uint32_t max_bpp_x16,
0067         const struct dsc_dec_dpcd_caps *dsc_sink_caps,
0068         const struct dc_crtc_timing *timing,
0069         struct dc_dsc_bw_range *range);
0070
0071 bool dc_dsc_compute_config(
0072         const struct display_stream_compressor *dsc,
0073         const struct dsc_dec_dpcd_caps *dsc_sink_caps,
0074         uint32_t dsc_min_slice_height_override,
0075         uint32_t max_target_bpp_limit_override,
0076         uint32_t target_bandwidth_kbps,
0077         const struct dc_crtc_timing *timing,
0078         struct dc_dsc_config *dsc_cfg);
0079
0080 uint32_t dc_dsc_stream_bandwidth_in_kbps(const struct dc_crtc_timing *timing,
0081         uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp);
0082
0083 uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps(
0084         const struct dc_crtc_timing *timing,
0085         const int num_slices_h,
0086         const bool is_dp);
0087
0088 /* TODO - Hardware/specs limitation should be owned by dc dsc and returned to DM,
0089  * and DM can choose to OVERRIDE the limitation on CASE BY CASE basis.
0090  * Hardware/specs limitation should not be writable by DM.
0091  * It should be decoupled from DM specific policy and named differently.
0092  */
0093 void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,
0094         uint32_t max_target_bpp_limit_override_x16,
0095         struct dc_dsc_policy *policy);
0096
0097 void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit);
0098
0099 void dc_dsc_policy_set_enable_dsc_when_not_needed(bool enable);
0100
0101 void dc_dsc_policy_set_disable_dsc_stream_overhead(bool disable);
0102
0103 #endif