display/dc/dc_dmub_srv.h

0001 /*
0002  * Copyright 2018 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef _DMUB_DC_SRV_H_
0027 #define _DMUB_DC_SRV_H_
0028
0029 #include "os_types.h"
0030 #include "dmub/dmub_srv.h"
0031
0032 struct dmub_srv;
0033 struct dc;
0034 struct pipe_ctx;
0035 struct dc_crtc_timing_adjust;
0036 struct dc_crtc_timing;
0037 struct dc_state;
0038
0039 struct dc_reg_helper_state {
0040     bool gather_in_progress;
0041     uint32_t same_addr_count;
0042     bool should_burst_write;
0043     union dmub_rb_cmd cmd_data;
0044     unsigned int reg_seq_count;
0045 };
0046
0047 struct dc_dmub_srv {
0048     struct dmub_srv *dmub;
0049     struct dc_reg_helper_state reg_helper_offload;
0050
0051     struct dc_context *ctx;
0052     void *dm;
0053 };
0054
0055 void dc_dmub_srv_cmd_queue(struct dc_dmub_srv *dc_dmub_srv,
0056                union dmub_rb_cmd *cmd);
0057
0058 void dc_dmub_srv_cmd_execute(struct dc_dmub_srv *dc_dmub_srv);
0059
0060 void dc_dmub_srv_wait_idle(struct dc_dmub_srv *dc_dmub_srv);
0061
0062 void dc_dmub_srv_wait_phy_init(struct dc_dmub_srv *dc_dmub_srv);
0063
0064 bool dc_dmub_srv_cmd_with_reply_data(struct dc_dmub_srv *dc_dmub_srv, union dmub_rb_cmd *cmd);
0065
0066 bool dc_dmub_srv_notify_stream_mask(struct dc_dmub_srv *dc_dmub_srv,
0067                     unsigned int stream_mask);
0068
0069 bool dc_dmub_srv_is_restore_required(struct dc_dmub_srv *dc_dmub_srv);
0070
0071 bool dc_dmub_srv_get_dmub_outbox0_msg(const struct dc *dc, struct dmcub_trace_buf_entry *entry);
0072
0073 void dc_dmub_trace_event_control(struct dc *dc, bool enable);
0074
0075 void dc_dmub_srv_drr_update_cmd(struct dc *dc, uint32_t tg_inst, uint32_t vtotal_min, uint32_t vtotal_max);
0076
0077 void dc_dmub_srv_set_drr_manual_trigger_cmd(struct dc *dc, uint32_t tg_inst);
0078 bool dc_dmub_srv_p_state_delegate(struct dc *dc, bool enable_pstate, struct dc_state *context);
0079
0080 void dc_dmub_srv_query_caps_cmd(struct dmub_srv *dmub);
0081 void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dmub_srv);
0082 void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dmub_srv);
0083 void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, union dmub_inbox0_data_register data);
0084
0085 bool dc_dmub_srv_get_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv, struct dmub_diagnostic_data *dmub_oca);
0086
0087 void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv);
0088
0089 #endif /* _DMUB_DC_SRV_H_ */