dc/bios/command_table_helper.c

0001 /*
0002  * Copyright 2012-15 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #include "dm_services.h"
0027
0028 #include "atom.h"
0029
0030 #include "include/bios_parser_types.h"
0031
0032 #include "command_table_helper.h"
0033
0034 bool dal_bios_parser_init_cmd_tbl_helper(
0035     const struct command_table_helper **h,
0036     enum dce_version dce)
0037 {
0038     switch (dce) {
0039 #if defined(CONFIG_DRM_AMD_DC_SI)
0040     case DCE_VERSION_6_0:
0041     case DCE_VERSION_6_1:
0042     case DCE_VERSION_6_4:
0043         *h = dal_cmd_tbl_helper_dce60_get_table();
0044         return true;
0045 #endif
0046
0047     case DCE_VERSION_8_0:
0048     case DCE_VERSION_8_1:
0049     case DCE_VERSION_8_3:
0050         *h = dal_cmd_tbl_helper_dce80_get_table();
0051         return true;
0052
0053     case DCE_VERSION_10_0:
0054         *h = dal_cmd_tbl_helper_dce110_get_table();
0055         return true;
0056
0057     case DCE_VERSION_11_0:
0058         *h = dal_cmd_tbl_helper_dce110_get_table();
0059         return true;
0060
0061     case DCE_VERSION_11_2:
0062     case DCE_VERSION_11_22:
0063         *h = dal_cmd_tbl_helper_dce112_get_table();
0064         return true;
0065
0066     default:
0067         /* Unsupported DCE */
0068         BREAK_TO_DEBUGGER();
0069         return false;
0070     }
0071 }
0072
0073 /* real implementations */
0074
0075 bool dal_cmd_table_helper_controller_id_to_atom(
0076     enum controller_id id,
0077     uint8_t *atom_id)
0078 {
0079     if (atom_id == NULL) {
0080         BREAK_TO_DEBUGGER();
0081         return false;
0082     }
0083
0084     switch (id) {
0085     case CONTROLLER_ID_D0:
0086         *atom_id = ATOM_CRTC1;
0087         return true;
0088     case CONTROLLER_ID_D1:
0089         *atom_id = ATOM_CRTC2;
0090         return true;
0091     case CONTROLLER_ID_D2:
0092         *atom_id = ATOM_CRTC3;
0093         return true;
0094     case CONTROLLER_ID_D3:
0095         *atom_id = ATOM_CRTC4;
0096         return true;
0097     case CONTROLLER_ID_D4:
0098         *atom_id = ATOM_CRTC5;
0099         return true;
0100     case CONTROLLER_ID_D5:
0101         *atom_id = ATOM_CRTC6;
0102         return true;
0103     case CONTROLLER_ID_UNDERLAY0:
0104         *atom_id = ATOM_UNDERLAY_PIPE0;
0105         return true;
0106     case CONTROLLER_ID_UNDEFINED:
0107         *atom_id = ATOM_CRTC_INVALID;
0108         return true;
0109     default:
0110         /* Wrong controller id */
0111         BREAK_TO_DEBUGGER();
0112         return false;
0113     }
0114 }
0115
0116 /**
0117  * dal_cmd_table_helper_transmitter_bp_to_atom - Translate the Transmitter to the
0118  *                                    corresponding ATOM BIOS value
0119  * @t: transmitter
0120  * returns: output digitalTransmitter
0121  *    // =00: Digital Transmitter1 ( UNIPHY linkAB )
0122  *    // =01: Digital Transmitter2 ( UNIPHY linkCD )
0123  *    // =02: Digital Transmitter3 ( UNIPHY linkEF )
0124  */
0125 uint8_t dal_cmd_table_helper_transmitter_bp_to_atom(
0126     enum transmitter t)
0127 {
0128     switch (t) {
0129     case TRANSMITTER_UNIPHY_A:
0130     case TRANSMITTER_UNIPHY_B:
0131     case TRANSMITTER_TRAVIS_LCD:
0132         return 0;
0133     case TRANSMITTER_UNIPHY_C:
0134     case TRANSMITTER_UNIPHY_D:
0135         return 1;
0136     case TRANSMITTER_UNIPHY_E:
0137     case TRANSMITTER_UNIPHY_F:
0138         return 2;
0139     default:
0140         /* Invalid Transmitter Type! */
0141         BREAK_TO_DEBUGGER();
0142         return 0;
0143     }
0144 }
0145
0146 uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom(
0147     enum signal_type s,
0148     bool enable_dp_audio)
0149 {
0150     switch (s) {
0151     case SIGNAL_TYPE_DVI_SINGLE_LINK:
0152     case SIGNAL_TYPE_DVI_DUAL_LINK:
0153         return ATOM_ENCODER_MODE_DVI;
0154     case SIGNAL_TYPE_HDMI_TYPE_A:
0155         return ATOM_ENCODER_MODE_HDMI;
0156     case SIGNAL_TYPE_LVDS:
0157         return ATOM_ENCODER_MODE_LVDS;
0158     case SIGNAL_TYPE_EDP:
0159     case SIGNAL_TYPE_DISPLAY_PORT_MST:
0160     case SIGNAL_TYPE_DISPLAY_PORT:
0161     case SIGNAL_TYPE_VIRTUAL:
0162         if (enable_dp_audio)
0163             return ATOM_ENCODER_MODE_DP_AUDIO;
0164         else
0165             return ATOM_ENCODER_MODE_DP;
0166     case SIGNAL_TYPE_RGB:
0167         return ATOM_ENCODER_MODE_CRT;
0168     default:
0169         return ATOM_ENCODER_MODE_CRT;
0170     }
0171 }
0172
0173 void dal_cmd_table_helper_assign_control_parameter(
0174     const struct command_table_helper *h,
0175     struct bp_encoder_control *control,
0176     DIG_ENCODER_CONTROL_PARAMETERS_V2 *ctrl_param)
0177 {
0178     /* there are three transmitter blocks, each one has two links 4-lanes
0179      * each, A+B, C+D, E+F, Uniphy A, C and E are enumerated as link 0 in
0180      * each transmitter block B, D and F as link 1, third transmitter block
0181      * has non splitable links (UniphyE and UniphyF can not be configured
0182      * separately to drive two different streams)
0183      */
0184     if ((control->transmitter == TRANSMITTER_UNIPHY_B) ||
0185         (control->transmitter == TRANSMITTER_UNIPHY_D) ||
0186         (control->transmitter == TRANSMITTER_UNIPHY_F)) {
0187         /* Bit2: Link Select
0188          * =0: PHY linkA/C/E
0189          * =1: PHY linkB/D/F
0190          */
0191         ctrl_param->acConfig.ucLinkSel = 1;
0192     }
0193
0194     /* Bit[4:3]: Transmitter Selection
0195      * =00: Digital Transmitter1 ( UNIPHY linkAB )
0196      * =01: Digital Transmitter2 ( UNIPHY linkCD )
0197      * =02: Digital Transmitter3 ( UNIPHY linkEF )
0198      * =03: Reserved
0199      */
0200     ctrl_param->acConfig.ucTransmitterSel =
0201         (uint8_t)(h->transmitter_bp_to_atom(control->transmitter));
0202
0203     /* We need to convert from KHz units into 10KHz units */
0204     ctrl_param->ucAction = h->encoder_action_to_atom(control->action);
0205     ctrl_param->usPixelClock = cpu_to_le16((uint16_t)(control->pixel_clock / 10));
0206     ctrl_param->ucEncoderMode =
0207         (uint8_t)(h->encoder_mode_bp_to_atom(
0208             control->signal, control->enable_dp_audio));
0209     ctrl_param->ucLaneNum = (uint8_t)(control->lanes_number);
0210 }
0211
0212 bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src(
0213     enum clock_source_id id,
0214     uint32_t *ref_clk_src_id)
0215 {
0216     if (ref_clk_src_id == NULL) {
0217         BREAK_TO_DEBUGGER();
0218         return false;
0219     }
0220
0221     switch (id) {
0222     case CLOCK_SOURCE_ID_PLL1:
0223         *ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL;
0224         return true;
0225     case CLOCK_SOURCE_ID_PLL2:
0226         *ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL;
0227         return true;
0228     case CLOCK_SOURCE_ID_DCPLL:
0229         *ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL;
0230         return true;
0231     case CLOCK_SOURCE_ID_EXTERNAL:
0232         *ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK;
0233         return true;
0234     case CLOCK_SOURCE_ID_UNDEFINED:
0235         *ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID;
0236         return true;
0237     default:
0238         /* Unsupported clock source id */
0239         BREAK_TO_DEBUGGER();
0240         return false;
0241     }
0242 }
0243
0244 uint8_t dal_cmd_table_helper_encoder_id_to_atom(
0245     enum encoder_id id)
0246 {
0247     switch (id) {
0248     case ENCODER_ID_INTERNAL_LVDS:
0249         return ENCODER_OBJECT_ID_INTERNAL_LVDS;
0250     case ENCODER_ID_INTERNAL_TMDS1:
0251         return ENCODER_OBJECT_ID_INTERNAL_TMDS1;
0252     case ENCODER_ID_INTERNAL_TMDS2:
0253         return ENCODER_OBJECT_ID_INTERNAL_TMDS2;
0254     case ENCODER_ID_INTERNAL_DAC1:
0255         return ENCODER_OBJECT_ID_INTERNAL_DAC1;
0256     case ENCODER_ID_INTERNAL_DAC2:
0257         return ENCODER_OBJECT_ID_INTERNAL_DAC2;
0258     case ENCODER_ID_INTERNAL_LVTM1:
0259         return ENCODER_OBJECT_ID_INTERNAL_LVTM1;
0260     case ENCODER_ID_INTERNAL_HDMI:
0261         return ENCODER_OBJECT_ID_HDMI_INTERNAL;
0262     case ENCODER_ID_EXTERNAL_TRAVIS:
0263         return ENCODER_OBJECT_ID_TRAVIS;
0264     case ENCODER_ID_EXTERNAL_NUTMEG:
0265         return ENCODER_OBJECT_ID_NUTMEG;
0266     case ENCODER_ID_INTERNAL_KLDSCP_TMDS1:
0267         return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1;
0268     case ENCODER_ID_INTERNAL_KLDSCP_DAC1:
0269         return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1;
0270     case ENCODER_ID_INTERNAL_KLDSCP_DAC2:
0271         return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2;
0272     case ENCODER_ID_EXTERNAL_MVPU_FPGA:
0273         return ENCODER_OBJECT_ID_MVPU_FPGA;
0274     case ENCODER_ID_INTERNAL_DDI:
0275         return ENCODER_OBJECT_ID_INTERNAL_DDI;
0276     case ENCODER_ID_INTERNAL_UNIPHY:
0277         return ENCODER_OBJECT_ID_INTERNAL_UNIPHY;
0278     case ENCODER_ID_INTERNAL_KLDSCP_LVTMA:
0279         return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA;
0280     case ENCODER_ID_INTERNAL_UNIPHY1:
0281         return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1;
0282     case ENCODER_ID_INTERNAL_UNIPHY2:
0283         return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2;
0284     case ENCODER_ID_INTERNAL_UNIPHY3:
0285         return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3;
0286     case ENCODER_ID_INTERNAL_WIRELESS:
0287         return ENCODER_OBJECT_ID_INTERNAL_VCE;
0288     case ENCODER_ID_UNKNOWN:
0289         return ENCODER_OBJECT_ID_NONE;
0290     default:
0291         /* Invalid encoder id */
0292         BREAK_TO_DEBUGGER();
0293         return ENCODER_OBJECT_ID_NONE;
0294     }
0295 }