display/amdgpu_dm/amdgpu_dm_hdcp.h

0001 /*
0002  * Copyright 2019 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: AMD
0023  *
0024  */
0025
0026 #ifndef AMDGPU_DM_AMDGPU_DM_HDCP_H_
0027 #define AMDGPU_DM_AMDGPU_DM_HDCP_H_
0028
0029 #include "mod_hdcp.h"
0030 #include "hdcp.h"
0031 #include "dc.h"
0032 #include "dm_cp_psp.h"
0033 #include "amdgpu.h"
0034
0035 struct mod_hdcp;
0036 struct mod_hdcp_link;
0037 struct mod_hdcp_display;
0038 struct cp_psp;
0039
0040 struct hdcp_workqueue {
0041     struct work_struct cpirq_work;
0042     struct work_struct property_update_work;
0043     struct delayed_work callback_dwork;
0044     struct delayed_work watchdog_timer_dwork;
0045     struct delayed_work property_validate_dwork;
0046     struct amdgpu_dm_connector *aconnector;
0047     struct mutex mutex;
0048
0049     struct mod_hdcp hdcp;
0050     struct mod_hdcp_output output;
0051     struct mod_hdcp_display display;
0052     struct mod_hdcp_link link;
0053
0054     enum mod_hdcp_encryption_status encryption_status;
0055     uint8_t max_link;
0056
0057     uint8_t *srm;
0058     uint8_t *srm_temp;
0059     uint32_t srm_version;
0060     uint32_t srm_size;
0061     struct bin_attribute attr;
0062 };
0063
0064 void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
0065              unsigned int link_index,
0066              struct amdgpu_dm_connector *aconnector,
0067              uint8_t content_type,
0068              bool enable_encryption);
0069
0070 void hdcp_reset_display(struct hdcp_workqueue *work, unsigned int link_index);
0071 void hdcp_handle_cpirq(struct hdcp_workqueue *work, unsigned int link_index);
0072 void hdcp_destroy(struct kobject *kobj, struct hdcp_workqueue *work);
0073
0074 struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev, struct cp_psp *cp_psp, struct dc *dc);
0075
0076 #endif /* AMDGPU_DM_AMDGPU_DM_HDCP_H_ */