amd/amdgpu/ta_xgmi_if.h

0001 /*
0002  * Copyright 2018 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef _TA_XGMI_IF_H
0025 #define _TA_XGMI_IF_H
0026
0027 /* Responses have bit 31 set */
0028 #define RSP_ID_MASK (1U << 31)
0029 #define RSP_ID(cmdId) (((uint32_t)(cmdId)) | RSP_ID_MASK)
0030
0031 enum ta_command_xgmi {
0032     TA_COMMAND_XGMI__INITIALIZE         = 0x00,
0033     TA_COMMAND_XGMI__GET_NODE_ID            = 0x01,
0034     TA_COMMAND_XGMI__GET_HIVE_ID            = 0x02,
0035     TA_COMMAND_XGMI__GET_GET_TOPOLOGY_INFO      = 0x03,
0036     TA_COMMAND_XGMI__SET_TOPOLOGY_INFO      = 0x04,
0037     TA_COMMAND_XGMI__GET_PEER_LINKS         = 0x0B
0038 };
0039
0040 /* XGMI related enumerations */
0041 /**********************************************************/;
0042 enum ta_xgmi_connected_nodes {
0043     TA_XGMI__MAX_CONNECTED_NODES            = 64
0044 };
0045
0046 enum ta_xgmi_status {
0047     TA_XGMI_STATUS__SUCCESS             = 0x00,
0048     TA_XGMI_STATUS__GENERIC_FAILURE         = 0x01,
0049     TA_XGMI_STATUS__NULL_POINTER            = 0x02,
0050     TA_XGMI_STATUS__INVALID_PARAMETER       = 0x03,
0051     TA_XGMI_STATUS__NOT_INITIALIZED         = 0x04,
0052     TA_XGMI_STATUS__INVALID_NODE_NUM        = 0x05,
0053     TA_XGMI_STATUS__INVALID_NODE_ID         = 0x06,
0054     TA_XGMI_STATUS__INVALID_TOPOLOGY        = 0x07,
0055     TA_XGMI_STATUS__FAILED_ID_GEN           = 0x08,
0056     TA_XGMI_STATUS__FAILED_TOPOLOGY_INIT        = 0x09,
0057     TA_XGMI_STATUS__SET_SHARING_ERROR       = 0x0A
0058 };
0059
0060 enum ta_xgmi_assigned_sdma_engine {
0061     TA_XGMI_ASSIGNED_SDMA_ENGINE__NOT_ASSIGNED  = -1,
0062     TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA0     = 0,
0063     TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA1     = 1,
0064     TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA2     = 2,
0065     TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA3     = 3,
0066     TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA4     = 4,
0067     TA_XGMI_ASSIGNED_SDMA_ENGINE__SDMA5     = 5
0068 };
0069
0070 /* input/output structures for XGMI commands */
0071 /**********************************************************/
0072 struct ta_xgmi_node_info {
0073     uint64_t                node_id;
0074     uint8_t                 num_hops;
0075     uint8_t                 is_sharing_enabled;
0076     enum ta_xgmi_assigned_sdma_engine   sdma_engine;
0077 };
0078
0079 struct ta_xgmi_peer_link_info {
0080     uint64_t                node_id;
0081     uint8_t                 num_links;
0082 };
0083
0084 struct ta_xgmi_cmd_initialize_output {
0085     uint32_t    status;
0086 };
0087
0088 struct ta_xgmi_cmd_get_node_id_output {
0089     uint64_t    node_id;
0090 };
0091
0092 struct ta_xgmi_cmd_get_hive_id_output {
0093     uint64_t    hive_id;
0094 };
0095
0096 struct ta_xgmi_cmd_get_topology_info_input {
0097     uint32_t            num_nodes;
0098     struct ta_xgmi_node_info    nodes[TA_XGMI__MAX_CONNECTED_NODES];
0099 };
0100
0101 struct ta_xgmi_cmd_get_topology_info_output {
0102     uint32_t            num_nodes;
0103     struct ta_xgmi_node_info    nodes[TA_XGMI__MAX_CONNECTED_NODES];
0104 };
0105
0106 struct ta_xgmi_cmd_get_peer_link_info_output {
0107     uint32_t            num_nodes;
0108     struct ta_xgmi_peer_link_info   nodes[TA_XGMI__MAX_CONNECTED_NODES];
0109 };
0110
0111 struct ta_xgmi_cmd_set_topology_info_input {
0112     uint32_t            num_nodes;
0113     struct ta_xgmi_node_info    nodes[TA_XGMI__MAX_CONNECTED_NODES];
0114 };
0115
0116 /**********************************************************/
0117 /* Common input structure for XGMI callbacks */
0118 union ta_xgmi_cmd_input {
0119     struct ta_xgmi_cmd_get_topology_info_input  get_topology_info;
0120     struct ta_xgmi_cmd_set_topology_info_input  set_topology_info;
0121 };
0122
0123 /* Common output structure for XGMI callbacks */
0124 union ta_xgmi_cmd_output {
0125     struct ta_xgmi_cmd_initialize_output        initialize;
0126     struct ta_xgmi_cmd_get_node_id_output       get_node_id;
0127     struct ta_xgmi_cmd_get_hive_id_output       get_hive_id;
0128     struct ta_xgmi_cmd_get_topology_info_output get_topology_info;
0129     struct ta_xgmi_cmd_get_peer_link_info_output    get_link_info;
0130 };
0131 /**********************************************************/
0132
0133 struct ta_xgmi_shared_memory {
0134     uint32_t            cmd_id;
0135     uint32_t            resp_id;
0136     enum ta_xgmi_status     xgmi_status;
0137     uint8_t             flag_extend_link_record;
0138     uint8_t             reserved0[3];
0139     union ta_xgmi_cmd_input     xgmi_in_message;
0140     union ta_xgmi_cmd_output    xgmi_out_message;
0141 };
0142
0143 #endif   //_TA_XGMI_IF_H