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0001 /*
0002  * Copyright 2019 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 
0024 #ifndef __MMSCH_V2_0_H__
0025 #define __MMSCH_V2_0_H__
0026 
0027 // addressBlock: uvd0_mmsch_dec
0028 // base address: 0x1e000
0029 #define mmMMSCH_UCODE_ADDR                                                                             0x0000
0030 #define mmMMSCH_UCODE_ADDR_BASE_IDX                                                                    0
0031 #define mmMMSCH_UCODE_DATA                                                                             0x0001
0032 #define mmMMSCH_UCODE_DATA_BASE_IDX                                                                    0
0033 #define mmMMSCH_SRAM_ADDR                                                                              0x0002
0034 #define mmMMSCH_SRAM_ADDR_BASE_IDX                                                                     0
0035 #define mmMMSCH_SRAM_DATA                                                                              0x0003
0036 #define mmMMSCH_SRAM_DATA_BASE_IDX                                                                     0
0037 #define mmMMSCH_VF_SRAM_OFFSET                                                                         0x0004
0038 #define mmMMSCH_VF_SRAM_OFFSET_BASE_IDX                                                                0
0039 #define mmMMSCH_DB_SRAM_OFFSET                                                                         0x0005
0040 #define mmMMSCH_DB_SRAM_OFFSET_BASE_IDX                                                                0
0041 #define mmMMSCH_CTX_SRAM_OFFSET                                                                        0x0006
0042 #define mmMMSCH_CTX_SRAM_OFFSET_BASE_IDX                                                               0
0043 #define mmMMSCH_CTL                                                                                    0x0007
0044 #define mmMMSCH_CTL_BASE_IDX                                                                           0
0045 #define mmMMSCH_INTR                                                                                   0x0008
0046 #define mmMMSCH_INTR_BASE_IDX                                                                          0
0047 #define mmMMSCH_INTR_ACK                                                                               0x0009
0048 #define mmMMSCH_INTR_ACK_BASE_IDX                                                                      0
0049 #define mmMMSCH_INTR_STATUS                                                                            0x000a
0050 #define mmMMSCH_INTR_STATUS_BASE_IDX                                                                   0
0051 #define mmMMSCH_VF_VMID                                                                                0x000b
0052 #define mmMMSCH_VF_VMID_BASE_IDX                                                                       0
0053 #define mmMMSCH_VF_CTX_ADDR_LO                                                                         0x000c
0054 #define mmMMSCH_VF_CTX_ADDR_LO_BASE_IDX                                                                0
0055 #define mmMMSCH_VF_CTX_ADDR_HI                                                                         0x000d
0056 #define mmMMSCH_VF_CTX_ADDR_HI_BASE_IDX                                                                0
0057 #define mmMMSCH_VF_CTX_SIZE                                                                            0x000e
0058 #define mmMMSCH_VF_CTX_SIZE_BASE_IDX                                                                   0
0059 #define mmMMSCH_VF_GPCOM_ADDR_LO                                                                       0x000f
0060 #define mmMMSCH_VF_GPCOM_ADDR_LO_BASE_IDX                                                              0
0061 #define mmMMSCH_VF_GPCOM_ADDR_HI                                                                       0x0010
0062 #define mmMMSCH_VF_GPCOM_ADDR_HI_BASE_IDX                                                              0
0063 #define mmMMSCH_VF_GPCOM_SIZE                                                                          0x0011
0064 #define mmMMSCH_VF_GPCOM_SIZE_BASE_IDX                                                                 0
0065 #define mmMMSCH_VF_MAILBOX_HOST                                                                        0x0012
0066 #define mmMMSCH_VF_MAILBOX_HOST_BASE_IDX                                                               0
0067 #define mmMMSCH_VF_MAILBOX_RESP                                                                        0x0013
0068 #define mmMMSCH_VF_MAILBOX_RESP_BASE_IDX                                                               0
0069 #define mmMMSCH_VF_MAILBOX_0                                                                           0x0014
0070 #define mmMMSCH_VF_MAILBOX_0_BASE_IDX                                                                  0
0071 #define mmMMSCH_VF_MAILBOX_0_RESP                                                                      0x0015
0072 #define mmMMSCH_VF_MAILBOX_0_RESP_BASE_IDX                                                             0
0073 #define mmMMSCH_VF_MAILBOX_1                                                                           0x0016
0074 #define mmMMSCH_VF_MAILBOX_1_BASE_IDX                                                                  0
0075 #define mmMMSCH_VF_MAILBOX_1_RESP                                                                      0x0017
0076 #define mmMMSCH_VF_MAILBOX_1_RESP_BASE_IDX                                                             0
0077 #define mmMMSCH_CNTL                                                                                   0x001c
0078 #define mmMMSCH_CNTL_BASE_IDX                                                                          0
0079 #define mmMMSCH_NONCACHE_OFFSET0                                                                       0x001d
0080 #define mmMMSCH_NONCACHE_OFFSET0_BASE_IDX                                                              0
0081 #define mmMMSCH_NONCACHE_SIZE0                                                                         0x001e
0082 #define mmMMSCH_NONCACHE_SIZE0_BASE_IDX                                                                0
0083 #define mmMMSCH_NONCACHE_OFFSET1                                                                       0x001f
0084 #define mmMMSCH_NONCACHE_OFFSET1_BASE_IDX                                                              0
0085 #define mmMMSCH_NONCACHE_SIZE1                                                                         0x0020
0086 #define mmMMSCH_NONCACHE_SIZE1_BASE_IDX                                                                0
0087 #define mmMMSCH_PDEBUG_STATUS                                                                          0x0021
0088 #define mmMMSCH_PDEBUG_STATUS_BASE_IDX                                                                 0
0089 #define mmMMSCH_PDEBUG_DATA_32UPPERBITS                                                                0x0022
0090 #define mmMMSCH_PDEBUG_DATA_32UPPERBITS_BASE_IDX                                                       0
0091 #define mmMMSCH_PDEBUG_DATA_32LOWERBITS                                                                0x0023
0092 #define mmMMSCH_PDEBUG_DATA_32LOWERBITS_BASE_IDX                                                       0
0093 #define mmMMSCH_PDEBUG_EPC                                                                             0x0024
0094 #define mmMMSCH_PDEBUG_EPC_BASE_IDX                                                                    0
0095 #define mmMMSCH_PDEBUG_EXCCAUSE                                                                        0x0025
0096 #define mmMMSCH_PDEBUG_EXCCAUSE_BASE_IDX                                                               0
0097 #define mmMMSCH_PROC_STATE1                                                                            0x0026
0098 #define mmMMSCH_PROC_STATE1_BASE_IDX                                                                   0
0099 #define mmMMSCH_LAST_MC_ADDR                                                                           0x0027
0100 #define mmMMSCH_LAST_MC_ADDR_BASE_IDX                                                                  0
0101 #define mmMMSCH_LAST_MEM_ACCESS_HI                                                                     0x0028
0102 #define mmMMSCH_LAST_MEM_ACCESS_HI_BASE_IDX                                                            0
0103 #define mmMMSCH_LAST_MEM_ACCESS_LO                                                                     0x0029
0104 #define mmMMSCH_LAST_MEM_ACCESS_LO_BASE_IDX                                                            0
0105 #define mmMMSCH_IOV_ACTIVE_FCN_ID                                                                      0x002a
0106 #define mmMMSCH_IOV_ACTIVE_FCN_ID_BASE_IDX                                                             0
0107 #define mmMMSCH_SCRATCH_0                                                                              0x002b
0108 #define mmMMSCH_SCRATCH_0_BASE_IDX                                                                     0
0109 #define mmMMSCH_SCRATCH_1                                                                              0x002c
0110 #define mmMMSCH_SCRATCH_1_BASE_IDX                                                                     0
0111 #define mmMMSCH_GPUIOV_SCH_BLOCK_0                                                                     0x002d
0112 #define mmMMSCH_GPUIOV_SCH_BLOCK_0_BASE_IDX                                                            0
0113 #define mmMMSCH_GPUIOV_CMD_CONTROL_0                                                                   0x002e
0114 #define mmMMSCH_GPUIOV_CMD_CONTROL_0_BASE_IDX                                                          0
0115 #define mmMMSCH_GPUIOV_CMD_STATUS_0                                                                    0x002f
0116 #define mmMMSCH_GPUIOV_CMD_STATUS_0_BASE_IDX                                                           0
0117 #define mmMMSCH_GPUIOV_VM_BUSY_STATUS_0                                                                0x0030
0118 #define mmMMSCH_GPUIOV_VM_BUSY_STATUS_0_BASE_IDX                                                       0
0119 #define mmMMSCH_GPUIOV_ACTIVE_FCNS_0                                                                   0x0031
0120 #define mmMMSCH_GPUIOV_ACTIVE_FCNS_0_BASE_IDX                                                          0
0121 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_0                                                                 0x0032
0122 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_0_BASE_IDX                                                        0
0123 #define mmMMSCH_GPUIOV_DW6_0                                                                           0x0033
0124 #define mmMMSCH_GPUIOV_DW6_0_BASE_IDX                                                                  0
0125 #define mmMMSCH_GPUIOV_DW7_0                                                                           0x0034
0126 #define mmMMSCH_GPUIOV_DW7_0_BASE_IDX                                                                  0
0127 #define mmMMSCH_GPUIOV_DW8_0                                                                           0x0035
0128 #define mmMMSCH_GPUIOV_DW8_0_BASE_IDX                                                                  0
0129 #define mmMMSCH_GPUIOV_SCH_BLOCK_1                                                                     0x0036
0130 #define mmMMSCH_GPUIOV_SCH_BLOCK_1_BASE_IDX                                                            0
0131 #define mmMMSCH_GPUIOV_CMD_CONTROL_1                                                                   0x0037
0132 #define mmMMSCH_GPUIOV_CMD_CONTROL_1_BASE_IDX                                                          0
0133 #define mmMMSCH_GPUIOV_CMD_STATUS_1                                                                    0x0038
0134 #define mmMMSCH_GPUIOV_CMD_STATUS_1_BASE_IDX                                                           0
0135 #define mmMMSCH_GPUIOV_VM_BUSY_STATUS_1                                                                0x0039
0136 #define mmMMSCH_GPUIOV_VM_BUSY_STATUS_1_BASE_IDX                                                       0
0137 #define mmMMSCH_GPUIOV_ACTIVE_FCNS_1                                                                   0x003a
0138 #define mmMMSCH_GPUIOV_ACTIVE_FCNS_1_BASE_IDX                                                          0
0139 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_1                                                                 0x003b
0140 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_1_BASE_IDX                                                        0
0141 #define mmMMSCH_GPUIOV_DW6_1                                                                           0x003c
0142 #define mmMMSCH_GPUIOV_DW6_1_BASE_IDX                                                                  0
0143 #define mmMMSCH_GPUIOV_DW7_1                                                                           0x003d
0144 #define mmMMSCH_GPUIOV_DW7_1_BASE_IDX                                                                  0
0145 #define mmMMSCH_GPUIOV_DW8_1                                                                           0x003e
0146 #define mmMMSCH_GPUIOV_DW8_1_BASE_IDX                                                                  0
0147 #define mmMMSCH_GPUIOV_CNTXT                                                                           0x003f
0148 #define mmMMSCH_GPUIOV_CNTXT_BASE_IDX                                                                  0
0149 #define mmMMSCH_SCRATCH_2                                                                              0x0040
0150 #define mmMMSCH_SCRATCH_2_BASE_IDX                                                                     0
0151 #define mmMMSCH_SCRATCH_3                                                                              0x0041
0152 #define mmMMSCH_SCRATCH_3_BASE_IDX                                                                     0
0153 #define mmMMSCH_SCRATCH_4                                                                              0x0042
0154 #define mmMMSCH_SCRATCH_4_BASE_IDX                                                                     0
0155 #define mmMMSCH_SCRATCH_5                                                                              0x0043
0156 #define mmMMSCH_SCRATCH_5_BASE_IDX                                                                     0
0157 #define mmMMSCH_SCRATCH_6                                                                              0x0044
0158 #define mmMMSCH_SCRATCH_6_BASE_IDX                                                                     0
0159 #define mmMMSCH_SCRATCH_7                                                                              0x0045
0160 #define mmMMSCH_SCRATCH_7_BASE_IDX                                                                     0
0161 #define mmMMSCH_VFID_FIFO_HEAD_0                                                                       0x0046
0162 #define mmMMSCH_VFID_FIFO_HEAD_0_BASE_IDX                                                              0
0163 #define mmMMSCH_VFID_FIFO_TAIL_0                                                                       0x0047
0164 #define mmMMSCH_VFID_FIFO_TAIL_0_BASE_IDX                                                              0
0165 #define mmMMSCH_VFID_FIFO_HEAD_1                                                                       0x0048
0166 #define mmMMSCH_VFID_FIFO_HEAD_1_BASE_IDX                                                              0
0167 #define mmMMSCH_VFID_FIFO_TAIL_1                                                                       0x0049
0168 #define mmMMSCH_VFID_FIFO_TAIL_1_BASE_IDX                                                              0
0169 #define mmMMSCH_NACK_STATUS                                                                            0x004a
0170 #define mmMMSCH_NACK_STATUS_BASE_IDX                                                                   0
0171 #define mmMMSCH_VF_MAILBOX0_DATA                                                                       0x004b
0172 #define mmMMSCH_VF_MAILBOX0_DATA_BASE_IDX                                                              0
0173 #define mmMMSCH_VF_MAILBOX1_DATA                                                                       0x004c
0174 #define mmMMSCH_VF_MAILBOX1_DATA_BASE_IDX                                                              0
0175 #define mmMMSCH_GPUIOV_SCH_BLOCK_IP_0                                                                  0x004d
0176 #define mmMMSCH_GPUIOV_SCH_BLOCK_IP_0_BASE_IDX                                                         0
0177 #define mmMMSCH_GPUIOV_CMD_STATUS_IP_0                                                                 0x004e
0178 #define mmMMSCH_GPUIOV_CMD_STATUS_IP_0_BASE_IDX                                                        0
0179 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_IP_0                                                              0x004f
0180 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_IP_0_BASE_IDX                                                     0
0181 #define mmMMSCH_GPUIOV_SCH_BLOCK_IP_1                                                                  0x0050
0182 #define mmMMSCH_GPUIOV_SCH_BLOCK_IP_1_BASE_IDX                                                         0
0183 #define mmMMSCH_GPUIOV_CMD_STATUS_IP_1                                                                 0x0051
0184 #define mmMMSCH_GPUIOV_CMD_STATUS_IP_1_BASE_IDX                                                        0
0185 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_IP_1                                                              0x0052
0186 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_IP_1_BASE_IDX                                                     0
0187 #define mmMMSCH_GPUIOV_CNTXT_IP                                                                        0x0053
0188 #define mmMMSCH_GPUIOV_CNTXT_IP_BASE_IDX                                                               0
0189 #define mmMMSCH_GPUIOV_SCH_BLOCK_2                                                                     0x0054
0190 #define mmMMSCH_GPUIOV_SCH_BLOCK_2_BASE_IDX                                                            0
0191 #define mmMMSCH_GPUIOV_CMD_CONTROL_2                                                                   0x0055
0192 #define mmMMSCH_GPUIOV_CMD_CONTROL_2_BASE_IDX                                                          0
0193 #define mmMMSCH_GPUIOV_CMD_STATUS_2                                                                    0x0056
0194 #define mmMMSCH_GPUIOV_CMD_STATUS_2_BASE_IDX                                                           0
0195 #define mmMMSCH_GPUIOV_VM_BUSY_STATUS_2                                                                0x0057
0196 #define mmMMSCH_GPUIOV_VM_BUSY_STATUS_2_BASE_IDX                                                       0
0197 #define mmMMSCH_GPUIOV_ACTIVE_FCNS_2                                                                   0x0058
0198 #define mmMMSCH_GPUIOV_ACTIVE_FCNS_2_BASE_IDX                                                          0
0199 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_2                                                                 0x0059
0200 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_2_BASE_IDX                                                        0
0201 #define mmMMSCH_GPUIOV_DW6_2                                                                           0x005a
0202 #define mmMMSCH_GPUIOV_DW6_2_BASE_IDX                                                                  0
0203 #define mmMMSCH_GPUIOV_DW7_2                                                                           0x005b
0204 #define mmMMSCH_GPUIOV_DW7_2_BASE_IDX                                                                  0
0205 #define mmMMSCH_GPUIOV_DW8_2                                                                           0x005c
0206 #define mmMMSCH_GPUIOV_DW8_2_BASE_IDX                                                                  0
0207 #define mmMMSCH_GPUIOV_SCH_BLOCK_IP_2                                                                  0x005d
0208 #define mmMMSCH_GPUIOV_SCH_BLOCK_IP_2_BASE_IDX                                                         0
0209 #define mmMMSCH_GPUIOV_CMD_STATUS_IP_2                                                                 0x005e
0210 #define mmMMSCH_GPUIOV_CMD_STATUS_IP_2_BASE_IDX                                                        0
0211 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_IP_2                                                              0x005f
0212 #define mmMMSCH_GPUIOV_ACTIVE_FCN_ID_IP_2_BASE_IDX                                                     0
0213 #define mmMMSCH_VFID_FIFO_HEAD_2                                                                       0x0060
0214 #define mmMMSCH_VFID_FIFO_HEAD_2_BASE_IDX                                                              0
0215 #define mmMMSCH_VFID_FIFO_TAIL_2                                                                       0x0061
0216 #define mmMMSCH_VFID_FIFO_TAIL_2_BASE_IDX                                                              0
0217 #define mmMMSCH_VM_BUSY_STATUS_0                                                                       0x0062
0218 #define mmMMSCH_VM_BUSY_STATUS_0_BASE_IDX                                                              0
0219 #define mmMMSCH_VM_BUSY_STATUS_1                                                                       0x0063
0220 #define mmMMSCH_VM_BUSY_STATUS_1_BASE_IDX                                                              0
0221 #define mmMMSCH_VM_BUSY_STATUS_2                                                                       0x0064
0222 #define mmMMSCH_VM_BUSY_STATUS_2_BASE_IDX                                                              0
0223 
0224 #define MMSCH_VERSION_MAJOR 2
0225 #define MMSCH_VERSION_MINOR 0
0226 #define MMSCH_VERSION   (MMSCH_VERSION_MAJOR << 16 | MMSCH_VERSION_MINOR)
0227 
0228 enum mmsch_v2_0_command_type {
0229     MMSCH_COMMAND__DIRECT_REG_WRITE = 0,
0230     MMSCH_COMMAND__DIRECT_REG_POLLING = 2,
0231     MMSCH_COMMAND__DIRECT_REG_READ_MODIFY_WRITE = 3,
0232     MMSCH_COMMAND__INDIRECT_REG_WRITE = 8,
0233     MMSCH_COMMAND__END = 0xf
0234 };
0235 
0236 struct mmsch_v2_0_init_header {
0237     uint32_t version;
0238     uint32_t header_size;
0239     uint32_t vcn_init_status;
0240     uint32_t vcn_table_offset;
0241     uint32_t vcn_table_size;
0242 };
0243 
0244 struct mmsch_v2_0_cmd_direct_reg_header {
0245     uint32_t reg_offset   : 28;
0246     uint32_t command_type : 4;
0247 };
0248 
0249 struct mmsch_v2_0_cmd_indirect_reg_header {
0250     uint32_t reg_offset    : 20;
0251     uint32_t reg_idx_space : 8;
0252     uint32_t command_type  : 4;
0253 };
0254 
0255 struct mmsch_v2_0_cmd_direct_write {
0256     struct mmsch_v2_0_cmd_direct_reg_header cmd_header;
0257     uint32_t reg_value;
0258 };
0259 
0260 struct mmsch_v2_0_cmd_direct_read_modify_write {
0261     struct mmsch_v2_0_cmd_direct_reg_header cmd_header;
0262     uint32_t write_data;
0263     uint32_t mask_value;
0264 };
0265 
0266 struct mmsch_v2_0_cmd_direct_polling {
0267     struct mmsch_v2_0_cmd_direct_reg_header cmd_header;
0268     uint32_t mask_value;
0269     uint32_t wait_value;
0270 };
0271 
0272 struct mmsch_v2_0_cmd_end {
0273     struct mmsch_v2_0_cmd_direct_reg_header cmd_header;
0274 };
0275 
0276 struct mmsch_v2_0_cmd_indirect_write {
0277     struct mmsch_v2_0_cmd_indirect_reg_header cmd_header;
0278     uint32_t reg_value;
0279 };
0280 
0281 static inline void mmsch_v2_0_insert_direct_wt(struct mmsch_v2_0_cmd_direct_write *direct_wt,
0282                            uint32_t *init_table,
0283                            uint32_t reg_offset,
0284                            uint32_t value)
0285 {
0286     direct_wt->cmd_header.reg_offset = reg_offset;
0287     direct_wt->reg_value = value;
0288     memcpy((void *)init_table, direct_wt, sizeof(struct mmsch_v2_0_cmd_direct_write));
0289 }
0290 
0291 static inline void mmsch_v2_0_insert_direct_rd_mod_wt(struct mmsch_v2_0_cmd_direct_read_modify_write *direct_rd_mod_wt,
0292                               uint32_t *init_table,
0293                               uint32_t reg_offset,
0294                               uint32_t mask, uint32_t data)
0295 {
0296     direct_rd_mod_wt->cmd_header.reg_offset = reg_offset;
0297     direct_rd_mod_wt->mask_value = mask;
0298     direct_rd_mod_wt->write_data = data;
0299     memcpy((void *)init_table, direct_rd_mod_wt,
0300            sizeof(struct mmsch_v2_0_cmd_direct_read_modify_write));
0301 }
0302 
0303 static inline void mmsch_v2_0_insert_direct_poll(struct mmsch_v2_0_cmd_direct_polling *direct_poll,
0304                          uint32_t *init_table,
0305                          uint32_t reg_offset,
0306                          uint32_t mask, uint32_t wait)
0307 {
0308     direct_poll->cmd_header.reg_offset = reg_offset;
0309     direct_poll->mask_value = mask;
0310     direct_poll->wait_value = wait;
0311     memcpy((void *)init_table, direct_poll, sizeof(struct mmsch_v2_0_cmd_direct_polling));
0312 }
0313 
0314 #define MMSCH_V2_0_INSERT_DIRECT_RD_MOD_WT(reg, mask, data) { \
0315     mmsch_v2_0_insert_direct_rd_mod_wt(&direct_rd_mod_wt, \
0316                        init_table, (reg), \
0317                        (mask), (data)); \
0318     init_table += sizeof(struct mmsch_v2_0_cmd_direct_read_modify_write)/4; \
0319     table_size += sizeof(struct mmsch_v2_0_cmd_direct_read_modify_write)/4; \
0320 }
0321 
0322 #define MMSCH_V2_0_INSERT_DIRECT_WT(reg, value) { \
0323     mmsch_v2_0_insert_direct_wt(&direct_wt, \
0324                     init_table, (reg), \
0325                     (value)); \
0326     init_table += sizeof(struct mmsch_v2_0_cmd_direct_write)/4; \
0327     table_size += sizeof(struct mmsch_v2_0_cmd_direct_write)/4; \
0328 }
0329 
0330 #define MMSCH_V2_0_INSERT_DIRECT_POLL(reg, mask, wait) { \
0331     mmsch_v2_0_insert_direct_poll(&direct_poll, \
0332                       init_table, (reg), \
0333                       (mask), (wait)); \
0334     init_table += sizeof(struct mmsch_v2_0_cmd_direct_polling)/4; \
0335     table_size += sizeof(struct mmsch_v2_0_cmd_direct_polling)/4; \
0336 }
0337 
0338 #endif
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