amd/amdgpu/atombios_crtc.h

0001 /*
0002  * Copyright 2014 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef __ATOMBIOS_CRTC_H__
0025 #define __ATOMBIOS_CRTC_H__
0026
0027 void amdgpu_atombios_crtc_overscan_setup(struct drm_crtc *crtc,
0028                   struct drm_display_mode *mode,
0029                   struct drm_display_mode *adjusted_mode);
0030 void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc);
0031 void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock);
0032 void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state);
0033 void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state);
0034 void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state);
0035 void amdgpu_atombios_crtc_powergate_init(struct amdgpu_device *adev);
0036 void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc,
0037                   struct drm_display_mode *mode);
0038 void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev,
0039                     u32 dispclk);
0040 u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev,
0041                        u32 freq, u8 clk_type, u8 clk_src);
0042 void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc,
0043                    u32 crtc_id,
0044                    int pll_id,
0045                    u32 encoder_mode,
0046                    u32 encoder_id,
0047                    u32 clock,
0048                    u32 ref_div,
0049                    u32 fb_div,
0050                    u32 frac_fb_div,
0051                    u32 post_div,
0052                    int bpc,
0053                    bool ss_enabled,
0054                    struct amdgpu_atom_ss *ss);
0055 int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc,
0056                   struct drm_display_mode *mode);
0057 void amdgpu_atombios_crtc_set_pll(struct drm_crtc *crtc,
0058                struct drm_display_mode *mode);
0059
0060 #endif