amd/amdgpu/amdgpu_vf_error.c

0001 /*
0002  * Copyright 2017 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #include "amdgpu.h"
0025 #include "amdgpu_vf_error.h"
0026 #include "mxgpu_ai.h"
0027
0028 void amdgpu_vf_error_put(struct amdgpu_device *adev,
0029              uint16_t sub_error_code,
0030              uint16_t error_flags,
0031              uint64_t error_data)
0032 {
0033     int index;
0034     uint16_t error_code;
0035
0036     if (!amdgpu_sriov_vf(adev))
0037         return;
0038
0039     error_code = AMDGIM_ERROR_CODE(AMDGIM_ERROR_CATEGORY_VF, sub_error_code);
0040
0041     mutex_lock(&adev->virt.vf_errors.lock);
0042     index = adev->virt.vf_errors.write_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
0043     adev->virt.vf_errors.code [index] = error_code;
0044     adev->virt.vf_errors.flags [index] = error_flags;
0045     adev->virt.vf_errors.data [index] = error_data;
0046     adev->virt.vf_errors.write_count ++;
0047     mutex_unlock(&adev->virt.vf_errors.lock);
0048 }
0049
0050
0051 void amdgpu_vf_error_trans_all(struct amdgpu_device *adev)
0052 {
0053     /* u32 pf2vf_flags = 0; */
0054     u32 data1, data2, data3;
0055     int index;
0056
0057     if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) ||
0058         (!adev->virt.ops) || (!adev->virt.ops->trans_msg)) {
0059         return;
0060     }
0061 /*
0062     TODO: Enable these code when pv2vf_info is merged
0063     AMDGPU_FW_VRAM_PF2VF_READ (adev, feature_flags, &pf2vf_flags);
0064     if (!(pf2vf_flags & AMDGIM_FEATURE_ERROR_LOG_COLLECT)) {
0065         return;
0066     }
0067 */
0068
0069     mutex_lock(&adev->virt.vf_errors.lock);
0070     /* The errors are overlay of array, correct read_count as full. */
0071     if (adev->virt.vf_errors.write_count - adev->virt.vf_errors.read_count > AMDGPU_VF_ERROR_ENTRY_SIZE) {
0072         adev->virt.vf_errors.read_count = adev->virt.vf_errors.write_count - AMDGPU_VF_ERROR_ENTRY_SIZE;
0073     }
0074
0075     while (adev->virt.vf_errors.read_count < adev->virt.vf_errors.write_count) {
0076         index =adev->virt.vf_errors.read_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
0077         data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX(adev->virt.vf_errors.code[index],
0078                                adev->virt.vf_errors.flags[index]);
0079         data2 = adev->virt.vf_errors.data[index] & 0xFFFFFFFF;
0080         data3 = (adev->virt.vf_errors.data[index] >> 32) & 0xFFFFFFFF;
0081
0082         adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3);
0083         adev->virt.vf_errors.read_count ++;
0084     }
0085     mutex_unlock(&adev->virt.vf_errors.lock);
0086 }