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0001 /*
0002  * Copyright 2017 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 
0024 #if !defined(_AMDGPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ)
0025 #define _AMDGPU_TRACE_H_
0026 
0027 #include <linux/stringify.h>
0028 #include <linux/types.h>
0029 #include <linux/tracepoint.h>
0030 
0031 #undef TRACE_SYSTEM
0032 #define TRACE_SYSTEM amdgpu
0033 #define TRACE_INCLUDE_FILE amdgpu_trace
0034 
0035 #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \
0036      job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished)
0037 
0038 TRACE_EVENT(amdgpu_device_rreg,
0039         TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
0040         TP_ARGS(did, reg, value),
0041         TP_STRUCT__entry(
0042                 __field(unsigned, did)
0043                 __field(uint32_t, reg)
0044                 __field(uint32_t, value)
0045                 ),
0046         TP_fast_assign(
0047                __entry->did = did;
0048                __entry->reg = reg;
0049                __entry->value = value;
0050                ),
0051         TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
0052               (unsigned long)__entry->did,
0053               (unsigned long)__entry->reg,
0054               (unsigned long)__entry->value)
0055 );
0056 
0057 TRACE_EVENT(amdgpu_device_wreg,
0058         TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
0059         TP_ARGS(did, reg, value),
0060         TP_STRUCT__entry(
0061                 __field(unsigned, did)
0062                 __field(uint32_t, reg)
0063                 __field(uint32_t, value)
0064                 ),
0065         TP_fast_assign(
0066                __entry->did = did;
0067                __entry->reg = reg;
0068                __entry->value = value;
0069                ),
0070         TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
0071               (unsigned long)__entry->did,
0072               (unsigned long)__entry->reg,
0073               (unsigned long)__entry->value)
0074 );
0075 
0076 TRACE_EVENT(amdgpu_iv,
0077         TP_PROTO(unsigned ih, struct amdgpu_iv_entry *iv),
0078         TP_ARGS(ih, iv),
0079         TP_STRUCT__entry(
0080                  __field(unsigned, ih)
0081                  __field(unsigned, client_id)
0082                  __field(unsigned, src_id)
0083                  __field(unsigned, ring_id)
0084                  __field(unsigned, vmid)
0085                  __field(unsigned, vmid_src)
0086                  __field(uint64_t, timestamp)
0087                  __field(unsigned, timestamp_src)
0088                  __field(unsigned, pasid)
0089                  __array(unsigned, src_data, 4)
0090                 ),
0091         TP_fast_assign(
0092                __entry->ih = ih;
0093                __entry->client_id = iv->client_id;
0094                __entry->src_id = iv->src_id;
0095                __entry->ring_id = iv->ring_id;
0096                __entry->vmid = iv->vmid;
0097                __entry->vmid_src = iv->vmid_src;
0098                __entry->timestamp = iv->timestamp;
0099                __entry->timestamp_src = iv->timestamp_src;
0100                __entry->pasid = iv->pasid;
0101                __entry->src_data[0] = iv->src_data[0];
0102                __entry->src_data[1] = iv->src_data[1];
0103                __entry->src_data[2] = iv->src_data[2];
0104                __entry->src_data[3] = iv->src_data[3];
0105                ),
0106         TP_printk("ih:%u client_id:%u src_id:%u ring:%u vmid:%u "
0107               "timestamp: %llu pasid:%u src_data: %08x %08x %08x %08x",
0108               __entry->ih, __entry->client_id, __entry->src_id,
0109               __entry->ring_id, __entry->vmid,
0110               __entry->timestamp, __entry->pasid,
0111               __entry->src_data[0], __entry->src_data[1],
0112               __entry->src_data[2], __entry->src_data[3])
0113 );
0114 
0115 
0116 TRACE_EVENT(amdgpu_bo_create,
0117         TP_PROTO(struct amdgpu_bo *bo),
0118         TP_ARGS(bo),
0119         TP_STRUCT__entry(
0120                  __field(struct amdgpu_bo *, bo)
0121                  __field(u32, pages)
0122                  __field(u32, type)
0123                  __field(u32, prefer)
0124                  __field(u32, allow)
0125                  __field(u32, visible)
0126                  ),
0127 
0128         TP_fast_assign(
0129                __entry->bo = bo;
0130                __entry->pages = bo->tbo.resource->num_pages;
0131                __entry->type = bo->tbo.resource->mem_type;
0132                __entry->prefer = bo->preferred_domains;
0133                __entry->allow = bo->allowed_domains;
0134                __entry->visible = bo->flags;
0135                ),
0136 
0137         TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d",
0138                __entry->bo, __entry->pages, __entry->type,
0139                __entry->prefer, __entry->allow, __entry->visible)
0140 );
0141 
0142 TRACE_EVENT(amdgpu_cs,
0143         TP_PROTO(struct amdgpu_cs_parser *p, int i),
0144         TP_ARGS(p, i),
0145         TP_STRUCT__entry(
0146                  __field(struct amdgpu_bo_list *, bo_list)
0147                  __field(u32, ring)
0148                  __field(u32, dw)
0149                  __field(u32, fences)
0150                  ),
0151 
0152         TP_fast_assign(
0153                __entry->bo_list = p->bo_list;
0154                __entry->ring = to_amdgpu_ring(p->entity->rq->sched)->idx;
0155                __entry->dw = p->job->ibs[i].length_dw;
0156                __entry->fences = amdgpu_fence_count_emitted(
0157                 to_amdgpu_ring(p->entity->rq->sched));
0158                ),
0159         TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u",
0160               __entry->bo_list, __entry->ring, __entry->dw,
0161               __entry->fences)
0162 );
0163 
0164 TRACE_EVENT(amdgpu_cs_ioctl,
0165         TP_PROTO(struct amdgpu_job *job),
0166         TP_ARGS(job),
0167         TP_STRUCT__entry(
0168                  __field(uint64_t, sched_job_id)
0169                  __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
0170                  __field(unsigned int, context)
0171                  __field(unsigned int, seqno)
0172                  __field(struct dma_fence *, fence)
0173                  __string(ring, to_amdgpu_ring(job->base.sched)->name)
0174                  __field(u32, num_ibs)
0175                  ),
0176 
0177         TP_fast_assign(
0178                __entry->sched_job_id = job->base.id;
0179                __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job));
0180                __entry->context = job->base.s_fence->finished.context;
0181                __entry->seqno = job->base.s_fence->finished.seqno;
0182                __assign_str(ring, to_amdgpu_ring(job->base.sched)->name);
0183                __entry->num_ibs = job->num_ibs;
0184                ),
0185         TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
0186               __entry->sched_job_id, __get_str(timeline), __entry->context,
0187               __entry->seqno, __get_str(ring), __entry->num_ibs)
0188 );
0189 
0190 TRACE_EVENT(amdgpu_sched_run_job,
0191         TP_PROTO(struct amdgpu_job *job),
0192         TP_ARGS(job),
0193         TP_STRUCT__entry(
0194                  __field(uint64_t, sched_job_id)
0195                  __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
0196                  __field(unsigned int, context)
0197                  __field(unsigned int, seqno)
0198                  __string(ring, to_amdgpu_ring(job->base.sched)->name)
0199                  __field(u32, num_ibs)
0200                  ),
0201 
0202         TP_fast_assign(
0203                __entry->sched_job_id = job->base.id;
0204                __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job));
0205                __entry->context = job->base.s_fence->finished.context;
0206                __entry->seqno = job->base.s_fence->finished.seqno;
0207                __assign_str(ring, to_amdgpu_ring(job->base.sched)->name);
0208                __entry->num_ibs = job->num_ibs;
0209                ),
0210         TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
0211               __entry->sched_job_id, __get_str(timeline), __entry->context,
0212               __entry->seqno, __get_str(ring), __entry->num_ibs)
0213 );
0214 
0215 
0216 TRACE_EVENT(amdgpu_vm_grab_id,
0217         TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
0218              struct amdgpu_job *job),
0219         TP_ARGS(vm, ring, job),
0220         TP_STRUCT__entry(
0221                  __field(u32, pasid)
0222                  __string(ring, ring->name)
0223                  __field(u32, ring)
0224                  __field(u32, vmid)
0225                  __field(u32, vm_hub)
0226                  __field(u64, pd_addr)
0227                  __field(u32, needs_flush)
0228                  ),
0229 
0230         TP_fast_assign(
0231                __entry->pasid = vm->pasid;
0232                __assign_str(ring, ring->name);
0233                __entry->vmid = job->vmid;
0234                __entry->vm_hub = ring->funcs->vmhub,
0235                __entry->pd_addr = job->vm_pd_addr;
0236                __entry->needs_flush = job->vm_needs_flush;
0237                ),
0238         TP_printk("pasid=%d, ring=%s, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u",
0239               __entry->pasid, __get_str(ring), __entry->vmid,
0240               __entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
0241 );
0242 
0243 TRACE_EVENT(amdgpu_vm_bo_map,
0244         TP_PROTO(struct amdgpu_bo_va *bo_va,
0245              struct amdgpu_bo_va_mapping *mapping),
0246         TP_ARGS(bo_va, mapping),
0247         TP_STRUCT__entry(
0248                  __field(struct amdgpu_bo *, bo)
0249                  __field(long, start)
0250                  __field(long, last)
0251                  __field(u64, offset)
0252                  __field(u64, flags)
0253                  ),
0254 
0255         TP_fast_assign(
0256                __entry->bo = bo_va ? bo_va->base.bo : NULL;
0257                __entry->start = mapping->start;
0258                __entry->last = mapping->last;
0259                __entry->offset = mapping->offset;
0260                __entry->flags = mapping->flags;
0261                ),
0262         TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
0263               __entry->bo, __entry->start, __entry->last,
0264               __entry->offset, __entry->flags)
0265 );
0266 
0267 TRACE_EVENT(amdgpu_vm_bo_unmap,
0268         TP_PROTO(struct amdgpu_bo_va *bo_va,
0269              struct amdgpu_bo_va_mapping *mapping),
0270         TP_ARGS(bo_va, mapping),
0271         TP_STRUCT__entry(
0272                  __field(struct amdgpu_bo *, bo)
0273                  __field(long, start)
0274                  __field(long, last)
0275                  __field(u64, offset)
0276                  __field(u64, flags)
0277                  ),
0278 
0279         TP_fast_assign(
0280                __entry->bo = bo_va ? bo_va->base.bo : NULL;
0281                __entry->start = mapping->start;
0282                __entry->last = mapping->last;
0283                __entry->offset = mapping->offset;
0284                __entry->flags = mapping->flags;
0285                ),
0286         TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
0287               __entry->bo, __entry->start, __entry->last,
0288               __entry->offset, __entry->flags)
0289 );
0290 
0291 DECLARE_EVENT_CLASS(amdgpu_vm_mapping,
0292         TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
0293         TP_ARGS(mapping),
0294         TP_STRUCT__entry(
0295                  __field(u64, soffset)
0296                  __field(u64, eoffset)
0297                  __field(u64, flags)
0298                  ),
0299 
0300         TP_fast_assign(
0301                __entry->soffset = mapping->start;
0302                __entry->eoffset = mapping->last + 1;
0303                __entry->flags = mapping->flags;
0304                ),
0305         TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx",
0306               __entry->soffset, __entry->eoffset, __entry->flags)
0307 );
0308 
0309 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update,
0310         TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
0311         TP_ARGS(mapping)
0312 );
0313 
0314 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping,
0315         TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
0316         TP_ARGS(mapping)
0317 );
0318 
0319 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_cs,
0320         TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
0321         TP_ARGS(mapping)
0322 );
0323 
0324 TRACE_EVENT(amdgpu_vm_update_ptes,
0325         TP_PROTO(struct amdgpu_vm_update_params *p,
0326              uint64_t start, uint64_t end,
0327              unsigned int nptes, uint64_t dst,
0328              uint64_t incr, uint64_t flags,
0329              pid_t pid, uint64_t vm_ctx),
0330     TP_ARGS(p, start, end, nptes, dst, incr, flags, pid, vm_ctx),
0331     TP_STRUCT__entry(
0332              __field(u64, start)
0333              __field(u64, end)
0334              __field(u64, flags)
0335              __field(unsigned int, nptes)
0336              __field(u64, incr)
0337              __field(pid_t, pid)
0338              __field(u64, vm_ctx)
0339              __dynamic_array(u64, dst, nptes)
0340     ),
0341 
0342     TP_fast_assign(
0343             unsigned int i;
0344 
0345             __entry->start = start;
0346             __entry->end = end;
0347             __entry->flags = flags;
0348             __entry->incr = incr;
0349             __entry->nptes = nptes;
0350             __entry->pid = pid;
0351             __entry->vm_ctx = vm_ctx;
0352             for (i = 0; i < nptes; ++i) {
0353                 u64 addr = p->pages_addr ? amdgpu_vm_map_gart(
0354                     p->pages_addr, dst) : dst;
0355 
0356                 ((u64 *)__get_dynamic_array(dst))[i] = addr;
0357                 dst += incr;
0358             }
0359     ),
0360     TP_printk("pid:%u vm_ctx:0x%llx start:0x%010llx end:0x%010llx,"
0361           " flags:0x%llx, incr:%llu, dst:\n%s", __entry->pid,
0362           __entry->vm_ctx, __entry->start, __entry->end,
0363           __entry->flags, __entry->incr,  __print_array(
0364           __get_dynamic_array(dst), __entry->nptes, 8))
0365 );
0366 
0367 TRACE_EVENT(amdgpu_vm_set_ptes,
0368         TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
0369              uint32_t incr, uint64_t flags, bool immediate),
0370         TP_ARGS(pe, addr, count, incr, flags, immediate),
0371         TP_STRUCT__entry(
0372                  __field(u64, pe)
0373                  __field(u64, addr)
0374                  __field(u32, count)
0375                  __field(u32, incr)
0376                  __field(u64, flags)
0377                  __field(bool, immediate)
0378                  ),
0379 
0380         TP_fast_assign(
0381                __entry->pe = pe;
0382                __entry->addr = addr;
0383                __entry->count = count;
0384                __entry->incr = incr;
0385                __entry->flags = flags;
0386                __entry->immediate = immediate;
0387                ),
0388         TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u, "
0389               "immediate=%d", __entry->pe, __entry->addr, __entry->incr,
0390               __entry->flags, __entry->count, __entry->immediate)
0391 );
0392 
0393 TRACE_EVENT(amdgpu_vm_copy_ptes,
0394         TP_PROTO(uint64_t pe, uint64_t src, unsigned count, bool immediate),
0395         TP_ARGS(pe, src, count, immediate),
0396         TP_STRUCT__entry(
0397                  __field(u64, pe)
0398                  __field(u64, src)
0399                  __field(u32, count)
0400                  __field(bool, immediate)
0401                  ),
0402 
0403         TP_fast_assign(
0404                __entry->pe = pe;
0405                __entry->src = src;
0406                __entry->count = count;
0407                __entry->immediate = immediate;
0408                ),
0409         TP_printk("pe=%010Lx, src=%010Lx, count=%u, immediate=%d",
0410               __entry->pe, __entry->src, __entry->count,
0411               __entry->immediate)
0412 );
0413 
0414 TRACE_EVENT(amdgpu_vm_flush,
0415         TP_PROTO(struct amdgpu_ring *ring, unsigned vmid,
0416              uint64_t pd_addr),
0417         TP_ARGS(ring, vmid, pd_addr),
0418         TP_STRUCT__entry(
0419                  __string(ring, ring->name)
0420                  __field(u32, vmid)
0421                  __field(u32, vm_hub)
0422                  __field(u64, pd_addr)
0423                  ),
0424 
0425         TP_fast_assign(
0426                __assign_str(ring, ring->name);
0427                __entry->vmid = vmid;
0428                __entry->vm_hub = ring->funcs->vmhub;
0429                __entry->pd_addr = pd_addr;
0430                ),
0431         TP_printk("ring=%s, id=%u, hub=%u, pd_addr=%010Lx",
0432               __get_str(ring), __entry->vmid,
0433               __entry->vm_hub,__entry->pd_addr)
0434 );
0435 
0436 DECLARE_EVENT_CLASS(amdgpu_pasid,
0437         TP_PROTO(unsigned pasid),
0438         TP_ARGS(pasid),
0439         TP_STRUCT__entry(
0440                  __field(unsigned, pasid)
0441                  ),
0442         TP_fast_assign(
0443                __entry->pasid = pasid;
0444                ),
0445         TP_printk("pasid=%u", __entry->pasid)
0446 );
0447 
0448 DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_allocated,
0449         TP_PROTO(unsigned pasid),
0450         TP_ARGS(pasid)
0451 );
0452 
0453 DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_freed,
0454         TP_PROTO(unsigned pasid),
0455         TP_ARGS(pasid)
0456 );
0457 
0458 TRACE_EVENT(amdgpu_bo_list_set,
0459         TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo),
0460         TP_ARGS(list, bo),
0461         TP_STRUCT__entry(
0462                  __field(struct amdgpu_bo_list *, list)
0463                  __field(struct amdgpu_bo *, bo)
0464                  __field(u64, bo_size)
0465                  ),
0466 
0467         TP_fast_assign(
0468                __entry->list = list;
0469                __entry->bo = bo;
0470                __entry->bo_size = amdgpu_bo_size(bo);
0471                ),
0472         TP_printk("list=%p, bo=%p, bo_size=%Ld",
0473               __entry->list,
0474               __entry->bo,
0475               __entry->bo_size)
0476 );
0477 
0478 TRACE_EVENT(amdgpu_cs_bo_status,
0479         TP_PROTO(uint64_t total_bo, uint64_t total_size),
0480         TP_ARGS(total_bo, total_size),
0481         TP_STRUCT__entry(
0482             __field(u64, total_bo)
0483             __field(u64, total_size)
0484             ),
0485 
0486         TP_fast_assign(
0487             __entry->total_bo = total_bo;
0488             __entry->total_size = total_size;
0489             ),
0490         TP_printk("total_bo_size=%Ld, total_bo_count=%Ld",
0491             __entry->total_bo, __entry->total_size)
0492 );
0493 
0494 TRACE_EVENT(amdgpu_bo_move,
0495         TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement),
0496         TP_ARGS(bo, new_placement, old_placement),
0497         TP_STRUCT__entry(
0498             __field(struct amdgpu_bo *, bo)
0499             __field(u64, bo_size)
0500             __field(u32, new_placement)
0501             __field(u32, old_placement)
0502             ),
0503 
0504         TP_fast_assign(
0505             __entry->bo      = bo;
0506             __entry->bo_size = amdgpu_bo_size(bo);
0507             __entry->new_placement = new_placement;
0508             __entry->old_placement = old_placement;
0509             ),
0510         TP_printk("bo=%p, from=%d, to=%d, size=%Ld",
0511             __entry->bo, __entry->old_placement,
0512             __entry->new_placement, __entry->bo_size)
0513 );
0514 
0515 TRACE_EVENT(amdgpu_ib_pipe_sync,
0516         TP_PROTO(struct amdgpu_job *sched_job, struct dma_fence *fence),
0517         TP_ARGS(sched_job, fence),
0518         TP_STRUCT__entry(
0519                  __string(ring, sched_job->base.sched->name)
0520                  __field(uint64_t, id)
0521                  __field(struct dma_fence *, fence)
0522                  __field(uint64_t, ctx)
0523                  __field(unsigned, seqno)
0524                  ),
0525 
0526         TP_fast_assign(
0527                __assign_str(ring, sched_job->base.sched->name);
0528                __entry->id = sched_job->base.id;
0529                __entry->fence = fence;
0530                __entry->ctx = fence->context;
0531                __entry->seqno = fence->seqno;
0532                ),
0533         TP_printk("job ring=%s, id=%llu, need pipe sync to fence=%p, context=%llu, seq=%u",
0534               __get_str(ring), __entry->id,
0535               __entry->fence, __entry->ctx,
0536               __entry->seqno)
0537 );
0538 
0539 TRACE_EVENT(amdgpu_reset_reg_dumps,
0540         TP_PROTO(uint32_t address, uint32_t value),
0541         TP_ARGS(address, value),
0542         TP_STRUCT__entry(
0543                  __field(uint32_t, address)
0544                  __field(uint32_t, value)
0545                  ),
0546         TP_fast_assign(
0547                __entry->address = address;
0548                __entry->value = value;
0549                ),
0550         TP_printk("amdgpu register dump 0x%x: 0x%x",
0551               __entry->address,
0552               __entry->value)
0553 );
0554 
0555 #undef AMDGPU_JOB_GET_TIMELINE_NAME
0556 #endif
0557 
0558 /* This part must be outside protection */
0559 #undef TRACE_INCLUDE_PATH
0560 #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/amd/amdgpu
0561 #include <trace/define_trace.h>
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