amd/amdgpu/amdgpu_mca.h

0001 /*
0002  * Copyright (C) 2021  Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included
0012  * in all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
0015  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
0018  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0019  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
0020  */
0021 #ifndef __AMDGPU_MCA_H__
0022 #define __AMDGPU_MCA_H__
0023
0024 struct amdgpu_mca_ras_block {
0025     struct amdgpu_ras_block_object ras_block;
0026 };
0027
0028 struct amdgpu_mca_ras {
0029     struct ras_common_if *ras_if;
0030     struct amdgpu_mca_ras_block *ras;
0031 };
0032
0033 struct amdgpu_mca_funcs {
0034     void (*init)(struct amdgpu_device *adev);
0035 };
0036
0037 struct amdgpu_mca {
0038     const struct amdgpu_mca_funcs *funcs;
0039     struct amdgpu_mca_ras mp0;
0040     struct amdgpu_mca_ras mp1;
0041     struct amdgpu_mca_ras mpio;
0042 };
0043
0044 void amdgpu_mca_query_correctable_error_count(struct amdgpu_device *adev,
0045                           uint64_t mc_status_addr,
0046                           unsigned long *error_count);
0047
0048 void amdgpu_mca_query_uncorrectable_error_count(struct amdgpu_device *adev,
0049                         uint64_t mc_status_addr,
0050                         unsigned long *error_count);
0051
0052 void amdgpu_mca_reset_error_count(struct amdgpu_device *adev,
0053                   uint64_t mc_status_addr);
0054
0055 void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev,
0056                       uint64_t mc_status_addr,
0057                       void *ras_error_status);
0058
0059 #endif