amd/amdgpu/amdgpu_imu.h

0001 /*
0002  * Copyright 2021 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #ifndef __AMDGPU_IMU_H__
0025 #define __AMDGPU_IMU_H__
0026
0027 enum imu_work_mode {
0028     DEBUG_MODE,
0029     MISSION_MODE
0030 };
0031
0032 struct amdgpu_imu_funcs {
0033     int (*init_microcode)(struct amdgpu_device *adev);
0034     int (*load_microcode)(struct amdgpu_device *adev);
0035     void (*setup_imu)(struct amdgpu_device *adev);
0036     int (*start_imu)(struct amdgpu_device *adev);
0037     void (*program_rlc_ram)(struct amdgpu_device *adev);
0038     int (*wait_for_reset_status)(struct amdgpu_device *adev);
0039 };
0040
0041 struct imu_rlc_ram_golden {
0042     u32 hwip;
0043     u32 instance;
0044     u32 segment;
0045     u32 reg;
0046     u32 data;
0047     u32 addr_mask;
0048 };
0049
0050 #define IMU_RLC_RAM_GOLDEN_VALUE(ip, inst, reg, data, addr_mask) \
0051     { ip##_HWIP, inst, reg##_BASE_IDX, reg, data, addr_mask }
0052
0053 struct amdgpu_imu {
0054     const struct amdgpu_imu_funcs *funcs;
0055     enum imu_work_mode mode;
0056 };
0057
0058 #endif