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0001 /*
0002  * Copyright 2018 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 #ifndef __AMDGPU_GEM_H__
0024 #define __AMDGPU_GEM_H__
0025 
0026 #include <drm/amdgpu_drm.h>
0027 #include <drm/drm_gem.h>
0028 
0029 /*
0030  * GEM.
0031  */
0032 
0033 #define AMDGPU_GEM_DOMAIN_MAX       0x3
0034 #define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, tbo.base)
0035 
0036 unsigned long amdgpu_gem_timeout(uint64_t timeout_ns);
0037 
0038 /*
0039  * GEM objects.
0040  */
0041 void amdgpu_gem_force_release(struct amdgpu_device *adev);
0042 int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
0043                  int alignment, u32 initial_domain,
0044                  u64 flags, enum ttm_bo_type type,
0045                  struct dma_resv *resv,
0046                  struct drm_gem_object **obj);
0047 
0048 int amdgpu_mode_dumb_create(struct drm_file *file_priv,
0049                 struct drm_device *dev,
0050                 struct drm_mode_create_dumb *args);
0051 int amdgpu_mode_dumb_mmap(struct drm_file *filp,
0052               struct drm_device *dev,
0053               uint32_t handle, uint64_t *offset_p);
0054 
0055 int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
0056                 struct drm_file *filp);
0057 int amdgpu_gem_info_ioctl(struct drm_device *dev, void *data,
0058               struct drm_file *filp);
0059 int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
0060             struct drm_file *filp);
0061 int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data,
0062               struct drm_file *filp);
0063 int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
0064                   struct drm_file *filp);
0065 uint64_t amdgpu_gem_va_map_flags(struct amdgpu_device *adev, uint32_t flags);
0066 int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
0067               struct drm_file *filp);
0068 int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
0069             struct drm_file *filp);
0070 
0071 int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data,
0072                 struct drm_file *filp);
0073 
0074 #endif