amd/amdgpu/amdgpu_encoders.c

0001 /*
0002  * Copyright 2007-8 Advanced Micro Devices, Inc.
0003  * Copyright 2008 Red Hat Inc.
0004  *
0005  * Permission is hereby granted, free of charge, to any person obtaining a
0006  * copy of this software and associated documentation files (the "Software"),
0007  * to deal in the Software without restriction, including without limitation
0008  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0009  * and/or sell copies of the Software, and to permit persons to whom the
0010  * Software is furnished to do so, subject to the following conditions:
0011  *
0012  * The above copyright notice and this permission notice shall be included in
0013  * all copies or substantial portions of the Software.
0014  *
0015  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0016  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0017  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0018  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0019  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0020  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0021  * OTHER DEALINGS IN THE SOFTWARE.
0022  *
0023  * Authors: Dave Airlie
0024  *          Alex Deucher
0025  */
0026
0027 #include <drm/drm_crtc_helper.h>
0028 #include <drm/amdgpu_drm.h>
0029 #include "amdgpu.h"
0030 #include "amdgpu_connectors.h"
0031 #include "amdgpu_display.h"
0032 #include "atom.h"
0033 #include "atombios_encoders.h"
0034
0035 void
0036 amdgpu_link_encoder_connector(struct drm_device *dev)
0037 {
0038     struct amdgpu_device *adev = drm_to_adev(dev);
0039     struct drm_connector *connector;
0040     struct drm_connector_list_iter iter;
0041     struct amdgpu_connector *amdgpu_connector;
0042     struct drm_encoder *encoder;
0043     struct amdgpu_encoder *amdgpu_encoder;
0044
0045     drm_connector_list_iter_begin(dev, &iter);
0046     /* walk the list and link encoders to connectors */
0047     drm_for_each_connector_iter(connector, &iter) {
0048         amdgpu_connector = to_amdgpu_connector(connector);
0049         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
0050             amdgpu_encoder = to_amdgpu_encoder(encoder);
0051             if (amdgpu_encoder->devices & amdgpu_connector->devices) {
0052                 drm_connector_attach_encoder(connector, encoder);
0053                 if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
0054                     amdgpu_atombios_encoder_init_backlight(amdgpu_encoder, connector);
0055                     adev->mode_info.bl_encoder = amdgpu_encoder;
0056                 }
0057             }
0058         }
0059     }
0060     drm_connector_list_iter_end(&iter);
0061 }
0062
0063 void amdgpu_encoder_set_active_device(struct drm_encoder *encoder)
0064 {
0065     struct drm_device *dev = encoder->dev;
0066     struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
0067     struct drm_connector *connector;
0068     struct drm_connector_list_iter iter;
0069
0070     drm_connector_list_iter_begin(dev, &iter);
0071     drm_for_each_connector_iter(connector, &iter) {
0072         if (connector->encoder == encoder) {
0073             struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
0074             amdgpu_encoder->active_device = amdgpu_encoder->devices & amdgpu_connector->devices;
0075             DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
0076                   amdgpu_encoder->active_device, amdgpu_encoder->devices,
0077                   amdgpu_connector->devices, encoder->encoder_type);
0078         }
0079     }
0080     drm_connector_list_iter_end(&iter);
0081 }
0082
0083 struct drm_connector *
0084 amdgpu_get_connector_for_encoder(struct drm_encoder *encoder)
0085 {
0086     struct drm_device *dev = encoder->dev;
0087     struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
0088     struct drm_connector *connector, *found = NULL;
0089     struct drm_connector_list_iter iter;
0090     struct amdgpu_connector *amdgpu_connector;
0091
0092     drm_connector_list_iter_begin(dev, &iter);
0093     drm_for_each_connector_iter(connector, &iter) {
0094         amdgpu_connector = to_amdgpu_connector(connector);
0095         if (amdgpu_encoder->active_device & amdgpu_connector->devices) {
0096             found = connector;
0097             break;
0098         }
0099     }
0100     drm_connector_list_iter_end(&iter);
0101     return found;
0102 }
0103
0104 struct drm_connector *
0105 amdgpu_get_connector_for_encoder_init(struct drm_encoder *encoder)
0106 {
0107     struct drm_device *dev = encoder->dev;
0108     struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
0109     struct drm_connector *connector, *found = NULL;
0110     struct drm_connector_list_iter iter;
0111     struct amdgpu_connector *amdgpu_connector;
0112
0113     drm_connector_list_iter_begin(dev, &iter);
0114     drm_for_each_connector_iter(connector, &iter) {
0115         amdgpu_connector = to_amdgpu_connector(connector);
0116         if (amdgpu_encoder->devices & amdgpu_connector->devices) {
0117             found = connector;
0118             break;
0119         }
0120     }
0121     drm_connector_list_iter_end(&iter);
0122     return found;
0123 }
0124
0125 struct drm_encoder *amdgpu_get_external_encoder(struct drm_encoder *encoder)
0126 {
0127     struct drm_device *dev = encoder->dev;
0128     struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
0129     struct drm_encoder *other_encoder;
0130     struct amdgpu_encoder *other_amdgpu_encoder;
0131
0132     if (amdgpu_encoder->is_ext_encoder)
0133         return NULL;
0134
0135     list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
0136         if (other_encoder == encoder)
0137             continue;
0138         other_amdgpu_encoder = to_amdgpu_encoder(other_encoder);
0139         if (other_amdgpu_encoder->is_ext_encoder &&
0140             (amdgpu_encoder->devices & other_amdgpu_encoder->devices))
0141             return other_encoder;
0142     }
0143     return NULL;
0144 }
0145
0146 u16 amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
0147 {
0148     struct drm_encoder *other_encoder = amdgpu_get_external_encoder(encoder);
0149
0150     if (other_encoder) {
0151         struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(other_encoder);
0152
0153         switch (amdgpu_encoder->encoder_id) {
0154         case ENCODER_OBJECT_ID_TRAVIS:
0155         case ENCODER_OBJECT_ID_NUTMEG:
0156             return amdgpu_encoder->encoder_id;
0157         default:
0158             return ENCODER_OBJECT_ID_NONE;
0159         }
0160     }
0161     return ENCODER_OBJECT_ID_NONE;
0162 }
0163
0164 void amdgpu_panel_mode_fixup(struct drm_encoder *encoder,
0165                  struct drm_display_mode *adjusted_mode)
0166 {
0167     struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
0168     struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
0169     unsigned hblank = native_mode->htotal - native_mode->hdisplay;
0170     unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
0171     unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
0172     unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
0173     unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
0174     unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
0175
0176     adjusted_mode->clock = native_mode->clock;
0177     adjusted_mode->flags = native_mode->flags;
0178
0179     adjusted_mode->hdisplay = native_mode->hdisplay;
0180     adjusted_mode->vdisplay = native_mode->vdisplay;
0181
0182     adjusted_mode->htotal = native_mode->hdisplay + hblank;
0183     adjusted_mode->hsync_start = native_mode->hdisplay + hover;
0184     adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
0185
0186     adjusted_mode->vtotal = native_mode->vdisplay + vblank;
0187     adjusted_mode->vsync_start = native_mode->vdisplay + vover;
0188     adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
0189
0190     drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
0191
0192     adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
0193     adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
0194
0195     adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
0196     adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
0197     adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
0198
0199     adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
0200     adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
0201     adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
0202
0203 }
0204
0205 bool amdgpu_dig_monitor_is_duallink(struct drm_encoder *encoder,
0206                     u32 pixel_clock)
0207 {
0208     struct drm_connector *connector;
0209     struct amdgpu_connector *amdgpu_connector;
0210     struct amdgpu_connector_atom_dig *dig_connector;
0211
0212     connector = amdgpu_get_connector_for_encoder(encoder);
0213     /* if we don't have an active device yet, just use one of
0214      * the connectors tied to the encoder.
0215      */
0216     if (!connector)
0217         connector = amdgpu_get_connector_for_encoder_init(encoder);
0218     amdgpu_connector = to_amdgpu_connector(connector);
0219
0220     switch (connector->connector_type) {
0221     case DRM_MODE_CONNECTOR_DVII:
0222     case DRM_MODE_CONNECTOR_HDMIB:
0223         if (amdgpu_connector->use_digital) {
0224             /* HDMI 1.3 supports up to 340 Mhz over single link */
0225             if (connector->display_info.is_hdmi) {
0226                 if (pixel_clock > 340000)
0227                     return true;
0228                 else
0229                     return false;
0230             } else {
0231                 if (pixel_clock > 165000)
0232                     return true;
0233                 else
0234                     return false;
0235             }
0236         } else
0237             return false;
0238     case DRM_MODE_CONNECTOR_DVID:
0239     case DRM_MODE_CONNECTOR_HDMIA:
0240     case DRM_MODE_CONNECTOR_DisplayPort:
0241         dig_connector = amdgpu_connector->con_priv;
0242         if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
0243             (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
0244             return false;
0245         else {
0246             /* HDMI 1.3 supports up to 340 Mhz over single link */
0247             if (connector->display_info.is_hdmi) {
0248                 if (pixel_clock > 340000)
0249                     return true;
0250                 else
0251                     return false;
0252             } else {
0253                 if (pixel_clock > 165000)
0254                     return true;
0255                 else
0256                     return false;
0257             }
0258         }
0259     default:
0260         return false;
0261     }
0262 }