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0001 /*
0002  * Copyright 2008 Advanced Micro Devices, Inc.
0003  * Copyright 2008 Red Hat Inc.
0004  * Copyright 2009 Jerome Glisse.
0005  *
0006  * Permission is hereby granted, free of charge, to any person obtaining a
0007  * copy of this software and associated documentation files (the "Software"),
0008  * to deal in the Software without restriction, including without limitation
0009  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0010  * and/or sell copies of the Software, and to permit persons to whom the
0011  * Software is furnished to do so, subject to the following conditions:
0012  *
0013  * The above copyright notice and this permission notice shall be included in
0014  * all copies or substantial portions of the Software.
0015  *
0016  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0017  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0018  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0019  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0020  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0021  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0022  * OTHER DEALINGS IN THE SOFTWARE.
0023  *
0024  * Authors: Dave Airlie
0025  *          Alex Deucher
0026  *          Jerome Glisse
0027  */
0028 
0029 #include "amdgpu.h"
0030 #include "atom.h"
0031 
0032 #include <linux/pci.h>
0033 #include <linux/slab.h>
0034 #include <linux/acpi.h>
0035 /*
0036  * BIOS.
0037  */
0038 
0039 #define AMD_VBIOS_SIGNATURE " 761295520"
0040 #define AMD_VBIOS_SIGNATURE_OFFSET 0x30
0041 #define AMD_VBIOS_SIGNATURE_SIZE sizeof(AMD_VBIOS_SIGNATURE)
0042 #define AMD_VBIOS_SIGNATURE_END (AMD_VBIOS_SIGNATURE_OFFSET + AMD_VBIOS_SIGNATURE_SIZE)
0043 #define AMD_IS_VALID_VBIOS(p) ((p)[0] == 0x55 && (p)[1] == 0xAA)
0044 #define AMD_VBIOS_LENGTH(p) ((p)[2] << 9)
0045 
0046 /* Check if current bios is an ATOM BIOS.
0047  * Return true if it is ATOM BIOS. Otherwise, return false.
0048  */
0049 static bool check_atom_bios(uint8_t *bios, size_t size)
0050 {
0051     uint16_t tmp, bios_header_start;
0052 
0053     if (!bios || size < 0x49) {
0054         DRM_INFO("vbios mem is null or mem size is wrong\n");
0055         return false;
0056     }
0057 
0058     if (!AMD_IS_VALID_VBIOS(bios)) {
0059         DRM_INFO("BIOS signature incorrect %x %x\n", bios[0], bios[1]);
0060         return false;
0061     }
0062 
0063     bios_header_start = bios[0x48] | (bios[0x49] << 8);
0064     if (!bios_header_start) {
0065         DRM_INFO("Can't locate bios header\n");
0066         return false;
0067     }
0068 
0069     tmp = bios_header_start + 4;
0070     if (size < tmp) {
0071         DRM_INFO("BIOS header is broken\n");
0072         return false;
0073     }
0074 
0075     if (!memcmp(bios + tmp, "ATOM", 4) ||
0076         !memcmp(bios + tmp, "MOTA", 4)) {
0077         DRM_DEBUG("ATOMBIOS detected\n");
0078         return true;
0079     }
0080 
0081     return false;
0082 }
0083 
0084 /* If you boot an IGP board with a discrete card as the primary,
0085  * the IGP rom is not accessible via the rom bar as the IGP rom is
0086  * part of the system bios.  On boot, the system bios puts a
0087  * copy of the igp rom at the start of vram if a discrete card is
0088  * present.
0089  */
0090 static bool igp_read_bios_from_vram(struct amdgpu_device *adev)
0091 {
0092     uint8_t __iomem *bios;
0093     resource_size_t vram_base;
0094     resource_size_t size = 256 * 1024; /* ??? */
0095 
0096     if (!(adev->flags & AMD_IS_APU))
0097         if (amdgpu_device_need_post(adev))
0098             return false;
0099 
0100     /* FB BAR not enabled */
0101     if (pci_resource_len(adev->pdev, 0) == 0)
0102         return false;
0103 
0104     adev->bios = NULL;
0105     vram_base = pci_resource_start(adev->pdev, 0);
0106     bios = ioremap_wc(vram_base, size);
0107     if (!bios) {
0108         return false;
0109     }
0110 
0111     adev->bios = kmalloc(size, GFP_KERNEL);
0112     if (!adev->bios) {
0113         iounmap(bios);
0114         return false;
0115     }
0116     adev->bios_size = size;
0117     memcpy_fromio(adev->bios, bios, size);
0118     iounmap(bios);
0119 
0120     if (!check_atom_bios(adev->bios, size)) {
0121         kfree(adev->bios);
0122         return false;
0123     }
0124 
0125     return true;
0126 }
0127 
0128 bool amdgpu_read_bios(struct amdgpu_device *adev)
0129 {
0130     uint8_t __iomem *bios;
0131     size_t size;
0132 
0133     adev->bios = NULL;
0134     /* XXX: some cards may return 0 for rom size? ddx has a workaround */
0135     bios = pci_map_rom(adev->pdev, &size);
0136     if (!bios) {
0137         return false;
0138     }
0139 
0140     adev->bios = kzalloc(size, GFP_KERNEL);
0141     if (adev->bios == NULL) {
0142         pci_unmap_rom(adev->pdev, bios);
0143         return false;
0144     }
0145     adev->bios_size = size;
0146     memcpy_fromio(adev->bios, bios, size);
0147     pci_unmap_rom(adev->pdev, bios);
0148 
0149     if (!check_atom_bios(adev->bios, size)) {
0150         kfree(adev->bios);
0151         return false;
0152     }
0153 
0154     return true;
0155 }
0156 
0157 static bool amdgpu_read_bios_from_rom(struct amdgpu_device *adev)
0158 {
0159     u8 header[AMD_VBIOS_SIGNATURE_END+1] = {0};
0160     int len;
0161 
0162     if (!adev->asic_funcs || !adev->asic_funcs->read_bios_from_rom)
0163         return false;
0164 
0165     /* validate VBIOS signature */
0166     if (amdgpu_asic_read_bios_from_rom(adev, &header[0], sizeof(header)) == false)
0167         return false;
0168     header[AMD_VBIOS_SIGNATURE_END] = 0;
0169 
0170     if ((!AMD_IS_VALID_VBIOS(header)) ||
0171         0 != memcmp((char *)&header[AMD_VBIOS_SIGNATURE_OFFSET],
0172             AMD_VBIOS_SIGNATURE,
0173             strlen(AMD_VBIOS_SIGNATURE)))
0174         return false;
0175 
0176     /* valid vbios, go on */
0177     len = AMD_VBIOS_LENGTH(header);
0178     len = ALIGN(len, 4);
0179     adev->bios = kmalloc(len, GFP_KERNEL);
0180     if (!adev->bios) {
0181         DRM_ERROR("no memory to allocate for BIOS\n");
0182         return false;
0183     }
0184     adev->bios_size = len;
0185 
0186     /* read complete BIOS */
0187     amdgpu_asic_read_bios_from_rom(adev, adev->bios, len);
0188 
0189     if (!check_atom_bios(adev->bios, len)) {
0190         kfree(adev->bios);
0191         return false;
0192     }
0193 
0194     return true;
0195 }
0196 
0197 static bool amdgpu_read_platform_bios(struct amdgpu_device *adev)
0198 {
0199     phys_addr_t rom = adev->pdev->rom;
0200     size_t romlen = adev->pdev->romlen;
0201     void __iomem *bios;
0202 
0203     adev->bios = NULL;
0204 
0205     if (!rom || romlen == 0)
0206         return false;
0207 
0208     adev->bios = kzalloc(romlen, GFP_KERNEL);
0209     if (!adev->bios)
0210         return false;
0211 
0212     bios = ioremap(rom, romlen);
0213     if (!bios)
0214         goto free_bios;
0215 
0216     memcpy_fromio(adev->bios, bios, romlen);
0217     iounmap(bios);
0218 
0219     if (!check_atom_bios(adev->bios, romlen))
0220         goto free_bios;
0221 
0222     adev->bios_size = romlen;
0223 
0224     return true;
0225 free_bios:
0226     kfree(adev->bios);
0227     return false;
0228 }
0229 
0230 #ifdef CONFIG_ACPI
0231 /* ATRM is used to get the BIOS on the discrete cards in
0232  * dual-gpu systems.
0233  */
0234 /* retrieve the ROM in 4k blocks */
0235 #define ATRM_BIOS_PAGE 4096
0236 /**
0237  * amdgpu_atrm_call - fetch a chunk of the vbios
0238  *
0239  * @atrm_handle: acpi ATRM handle
0240  * @bios: vbios image pointer
0241  * @offset: offset of vbios image data to fetch
0242  * @len: length of vbios image data to fetch
0243  *
0244  * Executes ATRM to fetch a chunk of the discrete
0245  * vbios image on PX systems (all asics).
0246  * Returns the length of the buffer fetched.
0247  */
0248 static int amdgpu_atrm_call(acpi_handle atrm_handle, uint8_t *bios,
0249                 int offset, int len)
0250 {
0251     acpi_status status;
0252     union acpi_object atrm_arg_elements[2], *obj;
0253     struct acpi_object_list atrm_arg;
0254     struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL};
0255 
0256     atrm_arg.count = 2;
0257     atrm_arg.pointer = &atrm_arg_elements[0];
0258 
0259     atrm_arg_elements[0].type = ACPI_TYPE_INTEGER;
0260     atrm_arg_elements[0].integer.value = offset;
0261 
0262     atrm_arg_elements[1].type = ACPI_TYPE_INTEGER;
0263     atrm_arg_elements[1].integer.value = len;
0264 
0265     status = acpi_evaluate_object(atrm_handle, NULL, &atrm_arg, &buffer);
0266     if (ACPI_FAILURE(status)) {
0267         printk("failed to evaluate ATRM got %s\n", acpi_format_exception(status));
0268         return -ENODEV;
0269     }
0270 
0271     obj = (union acpi_object *)buffer.pointer;
0272     memcpy(bios+offset, obj->buffer.pointer, obj->buffer.length);
0273     len = obj->buffer.length;
0274     kfree(buffer.pointer);
0275     return len;
0276 }
0277 
0278 static bool amdgpu_atrm_get_bios(struct amdgpu_device *adev)
0279 {
0280     int ret;
0281     int size = 256 * 1024;
0282     int i;
0283     struct pci_dev *pdev = NULL;
0284     acpi_handle dhandle, atrm_handle;
0285     acpi_status status;
0286     bool found = false;
0287 
0288     /* ATRM is for the discrete card only */
0289     if (adev->flags & AMD_IS_APU)
0290         return false;
0291 
0292     while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
0293         dhandle = ACPI_HANDLE(&pdev->dev);
0294         if (!dhandle)
0295             continue;
0296 
0297         status = acpi_get_handle(dhandle, "ATRM", &atrm_handle);
0298         if (ACPI_SUCCESS(status)) {
0299             found = true;
0300             break;
0301         }
0302     }
0303 
0304     if (!found) {
0305         while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
0306             dhandle = ACPI_HANDLE(&pdev->dev);
0307             if (!dhandle)
0308                 continue;
0309 
0310             status = acpi_get_handle(dhandle, "ATRM", &atrm_handle);
0311             if (ACPI_SUCCESS(status)) {
0312                 found = true;
0313                 break;
0314             }
0315         }
0316     }
0317 
0318     if (!found)
0319         return false;
0320 
0321     adev->bios = kmalloc(size, GFP_KERNEL);
0322     if (!adev->bios) {
0323         dev_err(adev->dev, "Unable to allocate bios\n");
0324         return false;
0325     }
0326 
0327     for (i = 0; i < size / ATRM_BIOS_PAGE; i++) {
0328         ret = amdgpu_atrm_call(atrm_handle,
0329                        adev->bios,
0330                        (i * ATRM_BIOS_PAGE),
0331                        ATRM_BIOS_PAGE);
0332         if (ret < ATRM_BIOS_PAGE)
0333             break;
0334     }
0335 
0336     if (!check_atom_bios(adev->bios, size)) {
0337         kfree(adev->bios);
0338         return false;
0339     }
0340     adev->bios_size = size;
0341     return true;
0342 }
0343 #else
0344 static inline bool amdgpu_atrm_get_bios(struct amdgpu_device *adev)
0345 {
0346     return false;
0347 }
0348 #endif
0349 
0350 static bool amdgpu_read_disabled_bios(struct amdgpu_device *adev)
0351 {
0352     if (adev->flags & AMD_IS_APU)
0353         return igp_read_bios_from_vram(adev);
0354     else
0355         return (!adev->asic_funcs || !adev->asic_funcs->read_disabled_bios) ?
0356             false : amdgpu_asic_read_disabled_bios(adev);
0357 }
0358 
0359 #ifdef CONFIG_ACPI
0360 static bool amdgpu_acpi_vfct_bios(struct amdgpu_device *adev)
0361 {
0362     struct acpi_table_header *hdr;
0363     acpi_size tbl_size;
0364     UEFI_ACPI_VFCT *vfct;
0365     unsigned offset;
0366 
0367     if (!ACPI_SUCCESS(acpi_get_table("VFCT", 1, &hdr)))
0368         return false;
0369     tbl_size = hdr->length;
0370     if (tbl_size < sizeof(UEFI_ACPI_VFCT)) {
0371         dev_info(adev->dev, "ACPI VFCT table present but broken (too short #1),skipping\n");
0372         return false;
0373     }
0374 
0375     vfct = (UEFI_ACPI_VFCT *)hdr;
0376     offset = vfct->VBIOSImageOffset;
0377 
0378     while (offset < tbl_size) {
0379         GOP_VBIOS_CONTENT *vbios = (GOP_VBIOS_CONTENT *)((char *)hdr + offset);
0380         VFCT_IMAGE_HEADER *vhdr = &vbios->VbiosHeader;
0381 
0382         offset += sizeof(VFCT_IMAGE_HEADER);
0383         if (offset > tbl_size) {
0384             dev_info(adev->dev, "ACPI VFCT image header truncated,skipping\n");
0385             return false;
0386         }
0387 
0388         offset += vhdr->ImageLength;
0389         if (offset > tbl_size) {
0390             dev_info(adev->dev, "ACPI VFCT image truncated,skipping\n");
0391             return false;
0392         }
0393 
0394         if (vhdr->ImageLength &&
0395             vhdr->PCIBus == adev->pdev->bus->number &&
0396             vhdr->PCIDevice == PCI_SLOT(adev->pdev->devfn) &&
0397             vhdr->PCIFunction == PCI_FUNC(adev->pdev->devfn) &&
0398             vhdr->VendorID == adev->pdev->vendor &&
0399             vhdr->DeviceID == adev->pdev->device) {
0400             adev->bios = kmemdup(&vbios->VbiosContent,
0401                          vhdr->ImageLength,
0402                          GFP_KERNEL);
0403 
0404             if (!check_atom_bios(adev->bios, vhdr->ImageLength)) {
0405                 kfree(adev->bios);
0406                 return false;
0407             }
0408             adev->bios_size = vhdr->ImageLength;
0409             return true;
0410         }
0411     }
0412 
0413     dev_info(adev->dev, "ACPI VFCT table present but broken (too short #2),skipping\n");
0414     return false;
0415 }
0416 #else
0417 static inline bool amdgpu_acpi_vfct_bios(struct amdgpu_device *adev)
0418 {
0419     return false;
0420 }
0421 #endif
0422 
0423 bool amdgpu_get_bios(struct amdgpu_device *adev)
0424 {
0425     if (amdgpu_atrm_get_bios(adev)) {
0426         dev_info(adev->dev, "Fetched VBIOS from ATRM\n");
0427         goto success;
0428     }
0429 
0430     if (amdgpu_acpi_vfct_bios(adev)) {
0431         dev_info(adev->dev, "Fetched VBIOS from VFCT\n");
0432         goto success;
0433     }
0434 
0435     if (igp_read_bios_from_vram(adev)) {
0436         dev_info(adev->dev, "Fetched VBIOS from VRAM BAR\n");
0437         goto success;
0438     }
0439 
0440     if (amdgpu_read_bios(adev)) {
0441         dev_info(adev->dev, "Fetched VBIOS from ROM BAR\n");
0442         goto success;
0443     }
0444 
0445     if (amdgpu_read_bios_from_rom(adev)) {
0446         dev_info(adev->dev, "Fetched VBIOS from ROM\n");
0447         goto success;
0448     }
0449 
0450     if (amdgpu_read_disabled_bios(adev)) {
0451         dev_info(adev->dev, "Fetched VBIOS from disabled ROM BAR\n");
0452         goto success;
0453     }
0454 
0455     if (amdgpu_read_platform_bios(adev)) {
0456         dev_info(adev->dev, "Fetched VBIOS from platform\n");
0457         goto success;
0458     }
0459 
0460     dev_err(adev->dev, "Unable to locate a BIOS ROM\n");
0461     return false;
0462 
0463 success:
0464     adev->is_atom_fw = (adev->asic_type >= CHIP_VEGA10) ? true : false;
0465     return true;
0466 }
0467 
0468 /* helper function for soc15 and onwards to read bios from rom */
0469 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
0470                      u8 *bios, u32 length_bytes)
0471 {
0472     u32 *dw_ptr;
0473     u32 i, length_dw;
0474     u32 rom_offset;
0475     u32 rom_index_offset;
0476     u32 rom_data_offset;
0477 
0478     if (bios == NULL)
0479         return false;
0480     if (length_bytes == 0)
0481         return false;
0482     /* APU vbios image is part of sbios image */
0483     if (adev->flags & AMD_IS_APU)
0484         return false;
0485     if (!adev->smuio.funcs ||
0486         !adev->smuio.funcs->get_rom_index_offset ||
0487         !adev->smuio.funcs->get_rom_data_offset)
0488         return false;
0489 
0490     dw_ptr = (u32 *)bios;
0491     length_dw = ALIGN(length_bytes, 4) / 4;
0492 
0493     rom_index_offset =
0494         adev->smuio.funcs->get_rom_index_offset(adev);
0495     rom_data_offset =
0496         adev->smuio.funcs->get_rom_data_offset(adev);
0497 
0498     if (adev->nbio.funcs &&
0499         adev->nbio.funcs->get_rom_offset) {
0500         rom_offset = adev->nbio.funcs->get_rom_offset(adev);
0501         rom_offset = rom_offset << 17;
0502     } else {
0503         rom_offset = 0;
0504     }
0505 
0506     /* set rom index to rom_offset */
0507     WREG32(rom_index_offset, rom_offset);
0508     /* read out the rom data */
0509     for (i = 0; i < length_dw; i++)
0510         dw_ptr[i] = RREG32(rom_data_offset);
0511 
0512     return true;
0513 }