0001
0002
0003 #include <linux/bitmap.h>
0004 #include <linux/kernel.h>
0005 #include <linux/module.h>
0006 #include <linux/interrupt.h>
0007 #include <linux/irq.h>
0008 #include <linux/spinlock.h>
0009 #include <linux/list.h>
0010 #include <linux/device.h>
0011 #include <linux/err.h>
0012 #include <linux/debugfs.h>
0013 #include <linux/seq_file.h>
0014 #include <linux/gpio.h>
0015 #include <linux/idr.h>
0016 #include <linux/slab.h>
0017 #include <linux/acpi.h>
0018 #include <linux/gpio/driver.h>
0019 #include <linux/gpio/machine.h>
0020 #include <linux/pinctrl/consumer.h>
0021 #include <linux/fs.h>
0022 #include <linux/compat.h>
0023 #include <linux/file.h>
0024 #include <uapi/linux/gpio.h>
0025
0026 #include "gpiolib.h"
0027 #include "gpiolib-of.h"
0028 #include "gpiolib-acpi.h"
0029 #include "gpiolib-cdev.h"
0030 #include "gpiolib-sysfs.h"
0031
0032 #define CREATE_TRACE_POINTS
0033 #include <trace/events/gpio.h>
0034
0035
0036
0037
0038
0039
0040
0041
0042
0043
0044
0045
0046
0047
0048
0049 #ifdef DEBUG
0050 #define extra_checks 1
0051 #else
0052 #define extra_checks 0
0053 #endif
0054
0055
0056 static DEFINE_IDA(gpio_ida);
0057 static dev_t gpio_devt;
0058 #define GPIO_DEV_MAX 256
0059 static int gpio_bus_match(struct device *dev, struct device_driver *drv);
0060 static struct bus_type gpio_bus_type = {
0061 .name = "gpio",
0062 .match = gpio_bus_match,
0063 };
0064
0065
0066
0067
0068 #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
0069
0070
0071
0072
0073
0074 DEFINE_SPINLOCK(gpio_lock);
0075
0076 static DEFINE_MUTEX(gpio_lookup_lock);
0077 static LIST_HEAD(gpio_lookup_list);
0078 LIST_HEAD(gpio_devices);
0079
0080 static DEFINE_MUTEX(gpio_machine_hogs_mutex);
0081 static LIST_HEAD(gpio_machine_hogs);
0082
0083 static void gpiochip_free_hogs(struct gpio_chip *gc);
0084 static int gpiochip_add_irqchip(struct gpio_chip *gc,
0085 struct lock_class_key *lock_key,
0086 struct lock_class_key *request_key);
0087 static void gpiochip_irqchip_remove(struct gpio_chip *gc);
0088 static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
0089 static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
0090 static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
0091
0092 static bool gpiolib_initialized;
0093
0094 static inline void desc_set_label(struct gpio_desc *d, const char *label)
0095 {
0096 d->label = label;
0097 }
0098
0099
0100
0101
0102
0103
0104
0105
0106
0107 struct gpio_desc *gpio_to_desc(unsigned gpio)
0108 {
0109 struct gpio_device *gdev;
0110 unsigned long flags;
0111
0112 spin_lock_irqsave(&gpio_lock, flags);
0113
0114 list_for_each_entry(gdev, &gpio_devices, list) {
0115 if (gdev->base <= gpio &&
0116 gdev->base + gdev->ngpio > gpio) {
0117 spin_unlock_irqrestore(&gpio_lock, flags);
0118 return &gdev->descs[gpio - gdev->base];
0119 }
0120 }
0121
0122 spin_unlock_irqrestore(&gpio_lock, flags);
0123
0124 if (!gpio_is_valid(gpio))
0125 pr_warn("invalid GPIO %d\n", gpio);
0126
0127 return NULL;
0128 }
0129 EXPORT_SYMBOL_GPL(gpio_to_desc);
0130
0131
0132
0133
0134
0135
0136
0137
0138
0139
0140
0141 struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
0142 unsigned int hwnum)
0143 {
0144 struct gpio_device *gdev = gc->gpiodev;
0145
0146 if (hwnum >= gdev->ngpio)
0147 return ERR_PTR(-EINVAL);
0148
0149 return &gdev->descs[hwnum];
0150 }
0151 EXPORT_SYMBOL_GPL(gpiochip_get_desc);
0152
0153
0154
0155
0156
0157
0158
0159
0160
0161
0162
0163 int desc_to_gpio(const struct gpio_desc *desc)
0164 {
0165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
0166 }
0167 EXPORT_SYMBOL_GPL(desc_to_gpio);
0168
0169
0170
0171
0172
0173
0174 struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
0175 {
0176 if (!desc || !desc->gdev)
0177 return NULL;
0178 return desc->gdev->chip;
0179 }
0180 EXPORT_SYMBOL_GPL(gpiod_to_chip);
0181
0182
0183 static int gpiochip_find_base(int ngpio)
0184 {
0185 struct gpio_device *gdev;
0186 int base = ARCH_NR_GPIOS - ngpio;
0187
0188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
0189
0190 if (gdev->base + gdev->ngpio <= base)
0191 break;
0192
0193 base = gdev->base - ngpio;
0194 }
0195
0196 if (gpio_is_valid(base)) {
0197 pr_debug("%s: found new base at %d\n", __func__, base);
0198 return base;
0199 } else {
0200 pr_err("%s: cannot find free range\n", __func__);
0201 return -ENOSPC;
0202 }
0203 }
0204
0205
0206
0207
0208
0209
0210
0211
0212
0213 int gpiod_get_direction(struct gpio_desc *desc)
0214 {
0215 struct gpio_chip *gc;
0216 unsigned int offset;
0217 int ret;
0218
0219 gc = gpiod_to_chip(desc);
0220 offset = gpio_chip_hwgpio(desc);
0221
0222
0223
0224
0225
0226 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
0227 test_bit(FLAG_IS_OUT, &desc->flags))
0228 return 0;
0229
0230 if (!gc->get_direction)
0231 return -ENOTSUPP;
0232
0233 ret = gc->get_direction(gc, offset);
0234 if (ret < 0)
0235 return ret;
0236
0237
0238 if (ret > 0)
0239 ret = 1;
0240
0241 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
0242
0243 return ret;
0244 }
0245 EXPORT_SYMBOL_GPL(gpiod_get_direction);
0246
0247
0248
0249
0250
0251
0252
0253
0254 static int gpiodev_add_to_list(struct gpio_device *gdev)
0255 {
0256 struct gpio_device *prev, *next;
0257
0258 if (list_empty(&gpio_devices)) {
0259
0260 list_add_tail(&gdev->list, &gpio_devices);
0261 return 0;
0262 }
0263
0264 next = list_first_entry(&gpio_devices, struct gpio_device, list);
0265 if (gdev->base + gdev->ngpio <= next->base) {
0266
0267 list_add(&gdev->list, &gpio_devices);
0268 return 0;
0269 }
0270
0271 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
0272 if (prev->base + prev->ngpio <= gdev->base) {
0273
0274 list_add_tail(&gdev->list, &gpio_devices);
0275 return 0;
0276 }
0277
0278 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
0279
0280 if (&next->list == &gpio_devices)
0281 break;
0282
0283
0284 if (prev->base + prev->ngpio <= gdev->base
0285 && gdev->base + gdev->ngpio <= next->base) {
0286 list_add(&gdev->list, &prev->list);
0287 return 0;
0288 }
0289 }
0290
0291 return -EBUSY;
0292 }
0293
0294
0295
0296
0297
0298
0299
0300 static struct gpio_desc *gpio_name_to_desc(const char * const name)
0301 {
0302 struct gpio_device *gdev;
0303 unsigned long flags;
0304
0305 if (!name)
0306 return NULL;
0307
0308 spin_lock_irqsave(&gpio_lock, flags);
0309
0310 list_for_each_entry(gdev, &gpio_devices, list) {
0311 struct gpio_desc *desc;
0312
0313 for_each_gpio_desc(gdev->chip, desc) {
0314 if (desc->name && !strcmp(desc->name, name)) {
0315 spin_unlock_irqrestore(&gpio_lock, flags);
0316 return desc;
0317 }
0318 }
0319 }
0320
0321 spin_unlock_irqrestore(&gpio_lock, flags);
0322
0323 return NULL;
0324 }
0325
0326
0327
0328
0329
0330
0331
0332
0333
0334 static int gpiochip_set_desc_names(struct gpio_chip *gc)
0335 {
0336 struct gpio_device *gdev = gc->gpiodev;
0337 int i;
0338
0339
0340 for (i = 0; i != gc->ngpio; ++i) {
0341 struct gpio_desc *gpio;
0342
0343 gpio = gpio_name_to_desc(gc->names[i]);
0344 if (gpio)
0345 dev_warn(&gdev->dev,
0346 "Detected name collision for GPIO name '%s'\n",
0347 gc->names[i]);
0348 }
0349
0350
0351 for (i = 0; i != gc->ngpio; ++i)
0352 gdev->descs[i].name = gc->names[i];
0353
0354 return 0;
0355 }
0356
0357
0358
0359
0360
0361
0362
0363
0364
0365
0366 static int devprop_gpiochip_set_names(struct gpio_chip *chip)
0367 {
0368 struct gpio_device *gdev = chip->gpiodev;
0369 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
0370 const char **names;
0371 int ret, i;
0372 int count;
0373
0374 count = fwnode_property_string_array_count(fwnode, "gpio-line-names");
0375 if (count < 0)
0376 return 0;
0377
0378
0379
0380
0381
0382
0383
0384
0385
0386 if (count <= chip->offset) {
0387 dev_warn(&gdev->dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
0388 count, chip->offset);
0389 return 0;
0390 }
0391
0392 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
0393 if (!names)
0394 return -ENOMEM;
0395
0396 ret = fwnode_property_read_string_array(fwnode, "gpio-line-names",
0397 names, count);
0398 if (ret < 0) {
0399 dev_warn(&gdev->dev, "failed to read GPIO line names\n");
0400 kfree(names);
0401 return ret;
0402 }
0403
0404
0405
0406
0407
0408
0409
0410
0411
0412
0413
0414 count = (count > chip->offset) ? count - chip->offset : count;
0415 if (count > chip->ngpio)
0416 count = chip->ngpio;
0417
0418 for (i = 0; i < count; i++) {
0419
0420
0421
0422
0423
0424
0425 if (names[chip->offset + i] && names[chip->offset + i][0])
0426 gdev->descs[i].name = names[chip->offset + i];
0427 }
0428
0429 kfree(names);
0430
0431 return 0;
0432 }
0433
0434 static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
0435 {
0436 unsigned long *p;
0437
0438 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
0439 if (!p)
0440 return NULL;
0441
0442
0443 bitmap_fill(p, gc->ngpio);
0444
0445 return p;
0446 }
0447
0448 static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
0449 {
0450 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
0451 return 0;
0452
0453 gc->valid_mask = gpiochip_allocate_mask(gc);
0454 if (!gc->valid_mask)
0455 return -ENOMEM;
0456
0457 return 0;
0458 }
0459
0460 static int gpiochip_init_valid_mask(struct gpio_chip *gc)
0461 {
0462 if (gc->init_valid_mask)
0463 return gc->init_valid_mask(gc,
0464 gc->valid_mask,
0465 gc->ngpio);
0466
0467 return 0;
0468 }
0469
0470 static void gpiochip_free_valid_mask(struct gpio_chip *gc)
0471 {
0472 bitmap_free(gc->valid_mask);
0473 gc->valid_mask = NULL;
0474 }
0475
0476 static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
0477 {
0478 if (gc->add_pin_ranges)
0479 return gc->add_pin_ranges(gc);
0480
0481 return 0;
0482 }
0483
0484 bool gpiochip_line_is_valid(const struct gpio_chip *gc,
0485 unsigned int offset)
0486 {
0487
0488 if (likely(!gc->valid_mask))
0489 return true;
0490 return test_bit(offset, gc->valid_mask);
0491 }
0492 EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
0493
0494 static void gpiodevice_release(struct device *dev)
0495 {
0496 struct gpio_device *gdev = container_of(dev, struct gpio_device, dev);
0497 unsigned long flags;
0498
0499 spin_lock_irqsave(&gpio_lock, flags);
0500 list_del(&gdev->list);
0501 spin_unlock_irqrestore(&gpio_lock, flags);
0502
0503 ida_free(&gpio_ida, gdev->id);
0504 kfree_const(gdev->label);
0505 kfree(gdev->descs);
0506 kfree(gdev);
0507 }
0508
0509 #ifdef CONFIG_GPIO_CDEV
0510 #define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
0511 #define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
0512 #else
0513
0514
0515
0516
0517 #define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
0518 #define gcdev_unregister(gdev) device_del(&(gdev)->dev)
0519 #endif
0520
0521 static int gpiochip_setup_dev(struct gpio_device *gdev)
0522 {
0523 int ret;
0524
0525 ret = gcdev_register(gdev, gpio_devt);
0526 if (ret)
0527 return ret;
0528
0529 ret = gpiochip_sysfs_register(gdev);
0530 if (ret)
0531 goto err_remove_device;
0532
0533
0534 gdev->dev.release = gpiodevice_release;
0535 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
0536 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
0537
0538 return 0;
0539
0540 err_remove_device:
0541 gcdev_unregister(gdev);
0542 return ret;
0543 }
0544
0545 static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
0546 {
0547 struct gpio_desc *desc;
0548 int rv;
0549
0550 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
0551 if (IS_ERR(desc)) {
0552 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
0553 PTR_ERR(desc));
0554 return;
0555 }
0556
0557 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
0558 return;
0559
0560 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
0561 if (rv)
0562 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
0563 __func__, gc->label, hog->chip_hwnum, rv);
0564 }
0565
0566 static void machine_gpiochip_add(struct gpio_chip *gc)
0567 {
0568 struct gpiod_hog *hog;
0569
0570 mutex_lock(&gpio_machine_hogs_mutex);
0571
0572 list_for_each_entry(hog, &gpio_machine_hogs, list) {
0573 if (!strcmp(gc->label, hog->chip_label))
0574 gpiochip_machine_hog(gc, hog);
0575 }
0576
0577 mutex_unlock(&gpio_machine_hogs_mutex);
0578 }
0579
0580 static void gpiochip_setup_devs(void)
0581 {
0582 struct gpio_device *gdev;
0583 int ret;
0584
0585 list_for_each_entry(gdev, &gpio_devices, list) {
0586 ret = gpiochip_setup_dev(gdev);
0587 if (ret)
0588 dev_err(&gdev->dev,
0589 "Failed to initialize gpio device (%d)\n", ret);
0590 }
0591 }
0592
0593 int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
0594 struct lock_class_key *lock_key,
0595 struct lock_class_key *request_key)
0596 {
0597 struct fwnode_handle *fwnode = NULL;
0598 struct gpio_device *gdev;
0599 unsigned long flags;
0600 int base = gc->base;
0601 unsigned int i;
0602 int ret = 0;
0603 u32 ngpios;
0604
0605 if (gc->fwnode)
0606 fwnode = gc->fwnode;
0607 else if (gc->parent)
0608 fwnode = dev_fwnode(gc->parent);
0609
0610
0611
0612
0613
0614 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
0615 if (!gdev)
0616 return -ENOMEM;
0617 gdev->dev.bus = &gpio_bus_type;
0618 gdev->dev.parent = gc->parent;
0619 gdev->chip = gc;
0620 gc->gpiodev = gdev;
0621
0622 of_gpio_dev_init(gc, gdev);
0623 acpi_gpio_dev_init(gc, gdev);
0624
0625
0626
0627
0628
0629 gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode;
0630
0631 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
0632 if (gdev->id < 0) {
0633 ret = gdev->id;
0634 goto err_free_gdev;
0635 }
0636
0637 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
0638 if (ret)
0639 goto err_free_ida;
0640
0641 device_initialize(&gdev->dev);
0642 if (gc->parent && gc->parent->driver)
0643 gdev->owner = gc->parent->driver->owner;
0644 else if (gc->owner)
0645
0646 gdev->owner = gc->owner;
0647 else
0648 gdev->owner = THIS_MODULE;
0649
0650 gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
0651 if (!gdev->descs) {
0652 ret = -ENOMEM;
0653 goto err_free_dev_name;
0654 }
0655
0656
0657
0658
0659
0660 if (gc->ngpio == 0) {
0661 ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios);
0662 if (ret == -ENODATA)
0663
0664
0665
0666
0667
0668
0669 ngpios = 0;
0670 else if (ret)
0671 goto err_free_descs;
0672
0673 gc->ngpio = ngpios;
0674 }
0675
0676 if (gc->ngpio == 0) {
0677 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
0678 ret = -EINVAL;
0679 goto err_free_descs;
0680 }
0681
0682 if (gc->ngpio > FASTPATH_NGPIO)
0683 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
0684 gc->ngpio, FASTPATH_NGPIO);
0685
0686 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
0687 if (!gdev->label) {
0688 ret = -ENOMEM;
0689 goto err_free_descs;
0690 }
0691
0692 gdev->ngpio = gc->ngpio;
0693 gdev->data = data;
0694
0695 spin_lock_irqsave(&gpio_lock, flags);
0696
0697
0698
0699
0700
0701
0702
0703
0704 if (base < 0) {
0705 base = gpiochip_find_base(gc->ngpio);
0706 if (base < 0) {
0707 ret = base;
0708 spin_unlock_irqrestore(&gpio_lock, flags);
0709 goto err_free_label;
0710 }
0711
0712
0713
0714
0715
0716
0717 gc->base = base;
0718 }
0719 gdev->base = base;
0720
0721 ret = gpiodev_add_to_list(gdev);
0722 if (ret) {
0723 spin_unlock_irqrestore(&gpio_lock, flags);
0724 chip_err(gc, "GPIO integer space overlap, cannot add chip\n");
0725 goto err_free_label;
0726 }
0727
0728 for (i = 0; i < gc->ngpio; i++)
0729 gdev->descs[i].gdev = gdev;
0730
0731 spin_unlock_irqrestore(&gpio_lock, flags);
0732
0733 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
0734
0735 #ifdef CONFIG_PINCTRL
0736 INIT_LIST_HEAD(&gdev->pin_ranges);
0737 #endif
0738
0739 if (gc->names) {
0740 ret = gpiochip_set_desc_names(gc);
0741 if (ret)
0742 goto err_remove_from_list;
0743 }
0744 ret = devprop_gpiochip_set_names(gc);
0745 if (ret)
0746 goto err_remove_from_list;
0747
0748 ret = gpiochip_alloc_valid_mask(gc);
0749 if (ret)
0750 goto err_remove_from_list;
0751
0752 ret = of_gpiochip_add(gc);
0753 if (ret)
0754 goto err_free_gpiochip_mask;
0755
0756 ret = gpiochip_init_valid_mask(gc);
0757 if (ret)
0758 goto err_remove_of_chip;
0759
0760 for (i = 0; i < gc->ngpio; i++) {
0761 struct gpio_desc *desc = &gdev->descs[i];
0762
0763 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
0764 assign_bit(FLAG_IS_OUT,
0765 &desc->flags, !gc->get_direction(gc, i));
0766 } else {
0767 assign_bit(FLAG_IS_OUT,
0768 &desc->flags, !gc->direction_input);
0769 }
0770 }
0771
0772 ret = gpiochip_add_pin_ranges(gc);
0773 if (ret)
0774 goto err_remove_of_chip;
0775
0776 acpi_gpiochip_add(gc);
0777
0778 machine_gpiochip_add(gc);
0779
0780 ret = gpiochip_irqchip_init_valid_mask(gc);
0781 if (ret)
0782 goto err_remove_acpi_chip;
0783
0784 ret = gpiochip_irqchip_init_hw(gc);
0785 if (ret)
0786 goto err_remove_acpi_chip;
0787
0788 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
0789 if (ret)
0790 goto err_remove_irqchip_mask;
0791
0792
0793
0794
0795
0796
0797
0798
0799
0800 if (gpiolib_initialized) {
0801 ret = gpiochip_setup_dev(gdev);
0802 if (ret)
0803 goto err_remove_irqchip;
0804 }
0805 return 0;
0806
0807 err_remove_irqchip:
0808 gpiochip_irqchip_remove(gc);
0809 err_remove_irqchip_mask:
0810 gpiochip_irqchip_free_valid_mask(gc);
0811 err_remove_acpi_chip:
0812 acpi_gpiochip_remove(gc);
0813 err_remove_of_chip:
0814 gpiochip_free_hogs(gc);
0815 of_gpiochip_remove(gc);
0816 err_free_gpiochip_mask:
0817 gpiochip_remove_pin_ranges(gc);
0818 gpiochip_free_valid_mask(gc);
0819 err_remove_from_list:
0820 spin_lock_irqsave(&gpio_lock, flags);
0821 list_del(&gdev->list);
0822 spin_unlock_irqrestore(&gpio_lock, flags);
0823 err_free_label:
0824 kfree_const(gdev->label);
0825 err_free_descs:
0826 kfree(gdev->descs);
0827 err_free_dev_name:
0828 kfree(dev_name(&gdev->dev));
0829 err_free_ida:
0830 ida_free(&gpio_ida, gdev->id);
0831 err_free_gdev:
0832
0833 if (ret != -EPROBE_DEFER) {
0834 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
0835 gdev->base, gdev->base + gdev->ngpio - 1,
0836 gc->label ? : "generic", ret);
0837 }
0838 kfree(gdev);
0839 return ret;
0840 }
0841 EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
0842
0843
0844
0845
0846
0847
0848
0849
0850 void *gpiochip_get_data(struct gpio_chip *gc)
0851 {
0852 return gc->gpiodev->data;
0853 }
0854 EXPORT_SYMBOL_GPL(gpiochip_get_data);
0855
0856
0857
0858
0859
0860
0861
0862 void gpiochip_remove(struct gpio_chip *gc)
0863 {
0864 struct gpio_device *gdev = gc->gpiodev;
0865 unsigned long flags;
0866 unsigned int i;
0867
0868
0869 gpiochip_sysfs_unregister(gdev);
0870 gpiochip_free_hogs(gc);
0871
0872 gdev->chip = NULL;
0873 gpiochip_irqchip_remove(gc);
0874 acpi_gpiochip_remove(gc);
0875 of_gpiochip_remove(gc);
0876 gpiochip_remove_pin_ranges(gc);
0877 gpiochip_free_valid_mask(gc);
0878
0879
0880
0881
0882 gdev->data = NULL;
0883
0884 spin_lock_irqsave(&gpio_lock, flags);
0885 for (i = 0; i < gdev->ngpio; i++) {
0886 if (gpiochip_is_requested(gc, i))
0887 break;
0888 }
0889 spin_unlock_irqrestore(&gpio_lock, flags);
0890
0891 if (i != gdev->ngpio)
0892 dev_crit(&gdev->dev,
0893 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
0894
0895
0896
0897
0898
0899
0900
0901 gcdev_unregister(gdev);
0902 put_device(&gdev->dev);
0903 }
0904 EXPORT_SYMBOL_GPL(gpiochip_remove);
0905
0906
0907
0908
0909
0910
0911
0912
0913
0914
0915
0916
0917 struct gpio_chip *gpiochip_find(void *data,
0918 int (*match)(struct gpio_chip *gc,
0919 void *data))
0920 {
0921 struct gpio_device *gdev;
0922 struct gpio_chip *gc = NULL;
0923 unsigned long flags;
0924
0925 spin_lock_irqsave(&gpio_lock, flags);
0926 list_for_each_entry(gdev, &gpio_devices, list)
0927 if (gdev->chip && match(gdev->chip, data)) {
0928 gc = gdev->chip;
0929 break;
0930 }
0931
0932 spin_unlock_irqrestore(&gpio_lock, flags);
0933
0934 return gc;
0935 }
0936 EXPORT_SYMBOL_GPL(gpiochip_find);
0937
0938 static int gpiochip_match_name(struct gpio_chip *gc, void *data)
0939 {
0940 const char *name = data;
0941
0942 return !strcmp(gc->label, name);
0943 }
0944
0945 static struct gpio_chip *find_chip_by_name(const char *name)
0946 {
0947 return gpiochip_find((void *)name, gpiochip_match_name);
0948 }
0949
0950 #ifdef CONFIG_GPIOLIB_IRQCHIP
0951
0952
0953
0954
0955
0956 static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
0957 {
0958 struct gpio_irq_chip *girq = &gc->irq;
0959
0960 if (!girq->init_hw)
0961 return 0;
0962
0963 return girq->init_hw(gc);
0964 }
0965
0966 static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
0967 {
0968 struct gpio_irq_chip *girq = &gc->irq;
0969
0970 if (!girq->init_valid_mask)
0971 return 0;
0972
0973 girq->valid_mask = gpiochip_allocate_mask(gc);
0974 if (!girq->valid_mask)
0975 return -ENOMEM;
0976
0977 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
0978
0979 return 0;
0980 }
0981
0982 static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
0983 {
0984 bitmap_free(gc->irq.valid_mask);
0985 gc->irq.valid_mask = NULL;
0986 }
0987
0988 bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
0989 unsigned int offset)
0990 {
0991 if (!gpiochip_line_is_valid(gc, offset))
0992 return false;
0993
0994 if (likely(!gc->irq.valid_mask))
0995 return true;
0996 return test_bit(offset, gc->irq.valid_mask);
0997 }
0998 EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
0999
1000 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1001
1002
1003
1004
1005
1006
1007
1008
1009 static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1010 struct irq_chip *irqchip)
1011 {
1012
1013 if (is_of_node(gc->irq.fwnode))
1014 return;
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1025 int i;
1026 int ret;
1027
1028 for (i = 0; i < gc->ngpio; i++) {
1029 struct irq_fwspec fwspec;
1030 unsigned int parent_hwirq;
1031 unsigned int parent_type;
1032 struct gpio_irq_chip *girq = &gc->irq;
1033
1034
1035
1036
1037
1038
1039
1040 ret = girq->child_to_parent_hwirq(gc, i,
1041 IRQ_TYPE_EDGE_RISING,
1042 &parent_hwirq,
1043 &parent_type);
1044 if (ret) {
1045 chip_err(gc, "skip set-up on hwirq %d\n",
1046 i);
1047 continue;
1048 }
1049
1050 fwspec.fwnode = gc->irq.fwnode;
1051
1052 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1053
1054 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1055 fwspec.param_count = 2;
1056 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1057
1058 -1,
1059 1,
1060 NUMA_NO_NODE,
1061 &fwspec,
1062 false,
1063 NULL);
1064 if (ret < 0) {
1065 chip_err(gc,
1066 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1067 i, parent_hwirq,
1068 ret);
1069 }
1070 }
1071 }
1072
1073 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1074
1075 return;
1076 }
1077
1078 static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1079 struct irq_fwspec *fwspec,
1080 unsigned long *hwirq,
1081 unsigned int *type)
1082 {
1083
1084 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1085 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1086 }
1087
1088
1089 if (is_fwnode_irqchip(fwspec->fwnode)) {
1090 int ret;
1091
1092 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1093 if (ret)
1094 return ret;
1095 WARN_ON(*type == IRQ_TYPE_NONE);
1096 return 0;
1097 }
1098 return -EINVAL;
1099 }
1100
1101 static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1102 unsigned int irq,
1103 unsigned int nr_irqs,
1104 void *data)
1105 {
1106 struct gpio_chip *gc = d->host_data;
1107 irq_hw_number_t hwirq;
1108 unsigned int type = IRQ_TYPE_NONE;
1109 struct irq_fwspec *fwspec = data;
1110 union gpio_irq_fwspec gpio_parent_fwspec = {};
1111 unsigned int parent_hwirq;
1112 unsigned int parent_type;
1113 struct gpio_irq_chip *girq = &gc->irq;
1114 int ret;
1115
1116
1117
1118
1119
1120 WARN_ON(nr_irqs != 1);
1121
1122 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1123 if (ret)
1124 return ret;
1125
1126 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
1127
1128 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1129 &parent_hwirq, &parent_type);
1130 if (ret) {
1131 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1132 return ret;
1133 }
1134 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
1135
1136
1137
1138
1139
1140 irq_domain_set_info(d,
1141 irq,
1142 hwirq,
1143 gc->irq.chip,
1144 gc,
1145 girq->handler,
1146 NULL, NULL);
1147 irq_set_probe(irq);
1148
1149
1150 ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec,
1151 parent_hwirq, parent_type);
1152 if (ret)
1153 return ret;
1154
1155 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
1156 irq, parent_hwirq);
1157 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1158 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec);
1159
1160
1161
1162
1163 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1164 ret = 0;
1165 if (ret)
1166 chip_err(gc,
1167 "failed to allocate parent hwirq %d for hwirq %lu\n",
1168 parent_hwirq, hwirq);
1169
1170 return ret;
1171 }
1172
1173 static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
1174 unsigned int offset)
1175 {
1176 return offset;
1177 }
1178
1179 static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1180 {
1181 ops->activate = gpiochip_irq_domain_activate;
1182 ops->deactivate = gpiochip_irq_domain_deactivate;
1183 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1184
1185
1186
1187
1188
1189
1190
1191
1192 if (!ops->translate)
1193 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1194 if (!ops->free)
1195 ops->free = irq_domain_free_irqs_common;
1196 }
1197
1198 static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1199 {
1200 if (!gc->irq.child_to_parent_hwirq ||
1201 !gc->irq.fwnode) {
1202 chip_err(gc, "missing irqdomain vital data\n");
1203 return -EINVAL;
1204 }
1205
1206 if (!gc->irq.child_offset_to_irq)
1207 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1208
1209 if (!gc->irq.populate_parent_alloc_arg)
1210 gc->irq.populate_parent_alloc_arg =
1211 gpiochip_populate_parent_fwspec_twocell;
1212
1213 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1214
1215 gc->irq.domain = irq_domain_create_hierarchy(
1216 gc->irq.parent_domain,
1217 0,
1218 gc->ngpio,
1219 gc->irq.fwnode,
1220 &gc->irq.child_irq_domain_ops,
1221 gc);
1222
1223 if (!gc->irq.domain)
1224 return -ENOMEM;
1225
1226 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1227
1228 return 0;
1229 }
1230
1231 static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1232 {
1233 return !!gc->irq.parent_domain;
1234 }
1235
1236 int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1237 union gpio_irq_fwspec *gfwspec,
1238 unsigned int parent_hwirq,
1239 unsigned int parent_type)
1240 {
1241 struct irq_fwspec *fwspec = &gfwspec->fwspec;
1242
1243 fwspec->fwnode = gc->irq.parent_domain->fwnode;
1244 fwspec->param_count = 2;
1245 fwspec->param[0] = parent_hwirq;
1246 fwspec->param[1] = parent_type;
1247
1248 return 0;
1249 }
1250 EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1251
1252 int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1253 union gpio_irq_fwspec *gfwspec,
1254 unsigned int parent_hwirq,
1255 unsigned int parent_type)
1256 {
1257 struct irq_fwspec *fwspec = &gfwspec->fwspec;
1258
1259 fwspec->fwnode = gc->irq.parent_domain->fwnode;
1260 fwspec->param_count = 4;
1261 fwspec->param[0] = 0;
1262 fwspec->param[1] = parent_hwirq;
1263 fwspec->param[2] = 0;
1264 fwspec->param[3] = parent_type;
1265
1266 return 0;
1267 }
1268 EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1269
1270 #else
1271
1272 static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1273 {
1274 return -EINVAL;
1275 }
1276
1277 static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1278 {
1279 return false;
1280 }
1281
1282 #endif
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294 int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1295 irq_hw_number_t hwirq)
1296 {
1297 struct gpio_chip *gc = d->host_data;
1298 int ret = 0;
1299
1300 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
1301 return -ENXIO;
1302
1303 irq_set_chip_data(irq, gc);
1304
1305
1306
1307
1308 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1309 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
1310
1311 if (gc->irq.threaded)
1312 irq_set_nested_thread(irq, 1);
1313 irq_set_noprobe(irq);
1314
1315 if (gc->irq.num_parents == 1)
1316 ret = irq_set_parent(irq, gc->irq.parents[0]);
1317 else if (gc->irq.map)
1318 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
1319
1320 if (ret < 0)
1321 return ret;
1322
1323
1324
1325
1326
1327 if (gc->irq.default_type != IRQ_TYPE_NONE)
1328 irq_set_irq_type(irq, gc->irq.default_type);
1329
1330 return 0;
1331 }
1332 EXPORT_SYMBOL_GPL(gpiochip_irq_map);
1333
1334 void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
1335 {
1336 struct gpio_chip *gc = d->host_data;
1337
1338 if (gc->irq.threaded)
1339 irq_set_nested_thread(irq, 0);
1340 irq_set_chip_and_handler(irq, NULL, NULL);
1341 irq_set_chip_data(irq, NULL);
1342 }
1343 EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
1344
1345 static const struct irq_domain_ops gpiochip_domain_ops = {
1346 .map = gpiochip_irq_map,
1347 .unmap = gpiochip_irq_unmap,
1348
1349 .xlate = irq_domain_xlate_twocell,
1350 };
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367 int gpiochip_irq_domain_activate(struct irq_domain *domain,
1368 struct irq_data *data, bool reserve)
1369 {
1370 struct gpio_chip *gc = domain->host_data;
1371
1372 return gpiochip_lock_as_irq(gc, data->hwirq);
1373 }
1374 EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385 void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1386 struct irq_data *data)
1387 {
1388 struct gpio_chip *gc = domain->host_data;
1389
1390 return gpiochip_unlock_as_irq(gc, data->hwirq);
1391 }
1392 EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1393
1394 static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
1395 {
1396 struct irq_domain *domain = gc->irq.domain;
1397
1398 #ifdef CONFIG_GPIOLIB_IRQCHIP
1399
1400
1401
1402
1403
1404 if (!gc->irq.initialized)
1405 return -EPROBE_DEFER;
1406 #endif
1407
1408 if (!gpiochip_irqchip_irq_valid(gc, offset))
1409 return -ENXIO;
1410
1411 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1412 if (irq_domain_is_hierarchy(domain)) {
1413 struct irq_fwspec spec;
1414
1415 spec.fwnode = domain->fwnode;
1416 spec.param_count = 2;
1417 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
1418 spec.param[1] = IRQ_TYPE_NONE;
1419
1420 return irq_create_fwspec_mapping(&spec);
1421 }
1422 #endif
1423
1424 return irq_create_mapping(domain, offset);
1425 }
1426
1427 int gpiochip_irq_reqres(struct irq_data *d)
1428 {
1429 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1430
1431 return gpiochip_reqres_irq(gc, d->hwirq);
1432 }
1433 EXPORT_SYMBOL(gpiochip_irq_reqres);
1434
1435 void gpiochip_irq_relres(struct irq_data *d)
1436 {
1437 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1438
1439 gpiochip_relres_irq(gc, d->hwirq);
1440 }
1441 EXPORT_SYMBOL(gpiochip_irq_relres);
1442
1443 static void gpiochip_irq_mask(struct irq_data *d)
1444 {
1445 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1446
1447 if (gc->irq.irq_mask)
1448 gc->irq.irq_mask(d);
1449 gpiochip_disable_irq(gc, d->hwirq);
1450 }
1451
1452 static void gpiochip_irq_unmask(struct irq_data *d)
1453 {
1454 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1455
1456 gpiochip_enable_irq(gc, d->hwirq);
1457 if (gc->irq.irq_unmask)
1458 gc->irq.irq_unmask(d);
1459 }
1460
1461 static void gpiochip_irq_enable(struct irq_data *d)
1462 {
1463 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1464
1465 gpiochip_enable_irq(gc, d->hwirq);
1466 gc->irq.irq_enable(d);
1467 }
1468
1469 static void gpiochip_irq_disable(struct irq_data *d)
1470 {
1471 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1472
1473 gc->irq.irq_disable(d);
1474 gpiochip_disable_irq(gc, d->hwirq);
1475 }
1476
1477 static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
1478 {
1479 struct irq_chip *irqchip = gc->irq.chip;
1480
1481 if (irqchip->flags & IRQCHIP_IMMUTABLE)
1482 return;
1483
1484 chip_warn(gc, "not an immutable chip, please consider fixing it!\n");
1485
1486 if (!irqchip->irq_request_resources &&
1487 !irqchip->irq_release_resources) {
1488 irqchip->irq_request_resources = gpiochip_irq_reqres;
1489 irqchip->irq_release_resources = gpiochip_irq_relres;
1490 }
1491 if (WARN_ON(gc->irq.irq_enable))
1492 return;
1493
1494 if (irqchip->irq_enable == gpiochip_irq_enable ||
1495 irqchip->irq_mask == gpiochip_irq_mask) {
1496
1497
1498
1499
1500 chip_info(gc,
1501 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1502 return;
1503 }
1504
1505 if (irqchip->irq_disable) {
1506 gc->irq.irq_disable = irqchip->irq_disable;
1507 irqchip->irq_disable = gpiochip_irq_disable;
1508 } else {
1509 gc->irq.irq_mask = irqchip->irq_mask;
1510 irqchip->irq_mask = gpiochip_irq_mask;
1511 }
1512
1513 if (irqchip->irq_enable) {
1514 gc->irq.irq_enable = irqchip->irq_enable;
1515 irqchip->irq_enable = gpiochip_irq_enable;
1516 } else {
1517 gc->irq.irq_unmask = irqchip->irq_unmask;
1518 irqchip->irq_unmask = gpiochip_irq_unmask;
1519 }
1520 }
1521
1522
1523
1524
1525
1526
1527
1528 static int gpiochip_add_irqchip(struct gpio_chip *gc,
1529 struct lock_class_key *lock_key,
1530 struct lock_class_key *request_key)
1531 {
1532 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
1533 struct irq_chip *irqchip = gc->irq.chip;
1534 unsigned int type;
1535 unsigned int i;
1536
1537 if (!irqchip)
1538 return 0;
1539
1540 if (gc->irq.parent_handler && gc->can_sleep) {
1541 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
1542 return -EINVAL;
1543 }
1544
1545 type = gc->irq.default_type;
1546
1547
1548
1549
1550
1551
1552 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1553 "%pfw: Ignoring %u default trigger\n", fwnode, type))
1554 type = IRQ_TYPE_NONE;
1555
1556 if (gc->to_irq)
1557 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1558
1559 gc->to_irq = gpiochip_to_irq;
1560 gc->irq.default_type = type;
1561 gc->irq.lock_key = lock_key;
1562 gc->irq.request_key = request_key;
1563
1564
1565 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1566 int ret = gpiochip_hierarchy_add_domain(gc);
1567 if (ret)
1568 return ret;
1569 } else {
1570
1571 gc->irq.domain = irq_domain_create_simple(fwnode,
1572 gc->ngpio,
1573 gc->irq.first,
1574 gc->irq.domain_ops ?: &gpiochip_domain_ops,
1575 gc);
1576 if (!gc->irq.domain)
1577 return -EINVAL;
1578 }
1579
1580 if (gc->irq.parent_handler) {
1581 for (i = 0; i < gc->irq.num_parents; i++) {
1582 void *data;
1583
1584 if (gc->irq.per_parent_data)
1585 data = gc->irq.parent_handler_data_array[i];
1586 else
1587 data = gc->irq.parent_handler_data ?: gc;
1588
1589
1590
1591
1592
1593
1594 irq_set_chained_handler_and_data(gc->irq.parents[i],
1595 gc->irq.parent_handler,
1596 data);
1597 }
1598 }
1599
1600 gpiochip_set_irq_hooks(gc);
1601
1602
1603
1604
1605
1606
1607 barrier();
1608
1609 gc->irq.initialized = true;
1610
1611 acpi_gpiochip_request_interrupts(gc);
1612
1613 return 0;
1614 }
1615
1616
1617
1618
1619
1620
1621
1622 static void gpiochip_irqchip_remove(struct gpio_chip *gc)
1623 {
1624 struct irq_chip *irqchip = gc->irq.chip;
1625 unsigned int offset;
1626
1627 acpi_gpiochip_free_interrupts(gc);
1628
1629 if (irqchip && gc->irq.parent_handler) {
1630 struct gpio_irq_chip *irq = &gc->irq;
1631 unsigned int i;
1632
1633 for (i = 0; i < irq->num_parents; i++)
1634 irq_set_chained_handler_and_data(irq->parents[i],
1635 NULL, NULL);
1636 }
1637
1638
1639 if (gc->irq.domain) {
1640 unsigned int irq;
1641
1642 for (offset = 0; offset < gc->ngpio; offset++) {
1643 if (!gpiochip_irqchip_irq_valid(gc, offset))
1644 continue;
1645
1646 irq = irq_find_mapping(gc->irq.domain, offset);
1647 irq_dispose_mapping(irq);
1648 }
1649
1650 irq_domain_remove(gc->irq.domain);
1651 }
1652
1653 if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) {
1654 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1655 irqchip->irq_request_resources = NULL;
1656 irqchip->irq_release_resources = NULL;
1657 }
1658 if (irqchip->irq_enable == gpiochip_irq_enable) {
1659 irqchip->irq_enable = gc->irq.irq_enable;
1660 irqchip->irq_disable = gc->irq.irq_disable;
1661 }
1662 }
1663 gc->irq.irq_enable = NULL;
1664 gc->irq.irq_disable = NULL;
1665 gc->irq.chip = NULL;
1666
1667 gpiochip_irqchip_free_valid_mask(gc);
1668 }
1669
1670
1671
1672
1673
1674
1675
1676
1677 int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1678 struct irq_domain *domain)
1679 {
1680 if (!domain)
1681 return -EINVAL;
1682
1683 gc->to_irq = gpiochip_to_irq;
1684 gc->irq.domain = domain;
1685
1686 return 0;
1687 }
1688 EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1689
1690 #else
1691
1692 static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
1693 struct lock_class_key *lock_key,
1694 struct lock_class_key *request_key)
1695 {
1696 return 0;
1697 }
1698 static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
1699
1700 static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1701 {
1702 return 0;
1703 }
1704
1705 static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
1706 {
1707 return 0;
1708 }
1709 static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
1710 { }
1711
1712 #endif
1713
1714
1715
1716
1717
1718
1719 int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
1720 {
1721 #ifdef CONFIG_PINCTRL
1722 if (list_empty(&gc->gpiodev->pin_ranges))
1723 return 0;
1724 #endif
1725
1726 return pinctrl_gpio_request(gc->gpiodev->base + offset);
1727 }
1728 EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1729
1730
1731
1732
1733
1734
1735 void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
1736 {
1737 #ifdef CONFIG_PINCTRL
1738 if (list_empty(&gc->gpiodev->pin_ranges))
1739 return;
1740 #endif
1741
1742 pinctrl_gpio_free(gc->gpiodev->base + offset);
1743 }
1744 EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1745
1746
1747
1748
1749
1750
1751
1752 int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
1753 unsigned long config)
1754 {
1755 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
1756 }
1757 EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1758
1759 #ifdef CONFIG_PINCTRL
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773 int gpiochip_add_pingroup_range(struct gpio_chip *gc,
1774 struct pinctrl_dev *pctldev,
1775 unsigned int gpio_offset, const char *pin_group)
1776 {
1777 struct gpio_pin_range *pin_range;
1778 struct gpio_device *gdev = gc->gpiodev;
1779 int ret;
1780
1781 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1782 if (!pin_range) {
1783 chip_err(gc, "failed to allocate pin ranges\n");
1784 return -ENOMEM;
1785 }
1786
1787
1788 pin_range->range.id = gpio_offset;
1789 pin_range->range.gc = gc;
1790 pin_range->range.name = gc->label;
1791 pin_range->range.base = gdev->base + gpio_offset;
1792 pin_range->pctldev = pctldev;
1793
1794 ret = pinctrl_get_group_pins(pctldev, pin_group,
1795 &pin_range->range.pins,
1796 &pin_range->range.npins);
1797 if (ret < 0) {
1798 kfree(pin_range);
1799 return ret;
1800 }
1801
1802 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1803
1804 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1805 gpio_offset, gpio_offset + pin_range->range.npins - 1,
1806 pinctrl_dev_get_devname(pctldev), pin_group);
1807
1808 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1809
1810 return 0;
1811 }
1812 EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831 int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
1832 unsigned int gpio_offset, unsigned int pin_offset,
1833 unsigned int npins)
1834 {
1835 struct gpio_pin_range *pin_range;
1836 struct gpio_device *gdev = gc->gpiodev;
1837 int ret;
1838
1839 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1840 if (!pin_range) {
1841 chip_err(gc, "failed to allocate pin ranges\n");
1842 return -ENOMEM;
1843 }
1844
1845
1846 pin_range->range.id = gpio_offset;
1847 pin_range->range.gc = gc;
1848 pin_range->range.name = gc->label;
1849 pin_range->range.base = gdev->base + gpio_offset;
1850 pin_range->range.pin_base = pin_offset;
1851 pin_range->range.npins = npins;
1852 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
1853 &pin_range->range);
1854 if (IS_ERR(pin_range->pctldev)) {
1855 ret = PTR_ERR(pin_range->pctldev);
1856 chip_err(gc, "could not create pin range\n");
1857 kfree(pin_range);
1858 return ret;
1859 }
1860 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1861 gpio_offset, gpio_offset + npins - 1,
1862 pinctl_name,
1863 pin_offset, pin_offset + npins - 1);
1864
1865 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1866
1867 return 0;
1868 }
1869 EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
1870
1871
1872
1873
1874
1875 void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
1876 {
1877 struct gpio_pin_range *pin_range, *tmp;
1878 struct gpio_device *gdev = gc->gpiodev;
1879
1880 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
1881 list_del(&pin_range->node);
1882 pinctrl_remove_gpio_range(pin_range->pctldev,
1883 &pin_range->range);
1884 kfree(pin_range);
1885 }
1886 }
1887 EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1888
1889 #endif
1890
1891
1892
1893
1894
1895 static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
1896 {
1897 struct gpio_chip *gc = desc->gdev->chip;
1898 int ret;
1899 unsigned long flags;
1900 unsigned offset;
1901
1902 if (label) {
1903 label = kstrdup_const(label, GFP_KERNEL);
1904 if (!label)
1905 return -ENOMEM;
1906 }
1907
1908 spin_lock_irqsave(&gpio_lock, flags);
1909
1910
1911
1912
1913
1914 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1915 desc_set_label(desc, label ? : "?");
1916 } else {
1917 ret = -EBUSY;
1918 goto out_free_unlock;
1919 }
1920
1921 if (gc->request) {
1922
1923 spin_unlock_irqrestore(&gpio_lock, flags);
1924 offset = gpio_chip_hwgpio(desc);
1925 if (gpiochip_line_is_valid(gc, offset))
1926 ret = gc->request(gc, offset);
1927 else
1928 ret = -EINVAL;
1929 spin_lock_irqsave(&gpio_lock, flags);
1930
1931 if (ret) {
1932 desc_set_label(desc, NULL);
1933 clear_bit(FLAG_REQUESTED, &desc->flags);
1934 goto out_free_unlock;
1935 }
1936 }
1937 if (gc->get_direction) {
1938
1939 spin_unlock_irqrestore(&gpio_lock, flags);
1940 gpiod_get_direction(desc);
1941 spin_lock_irqsave(&gpio_lock, flags);
1942 }
1943 spin_unlock_irqrestore(&gpio_lock, flags);
1944 return 0;
1945
1946 out_free_unlock:
1947 spin_unlock_irqrestore(&gpio_lock, flags);
1948 kfree_const(label);
1949 return ret;
1950 }
1951
1952
1953
1954
1955
1956
1957
1958 static int validate_desc(const struct gpio_desc *desc, const char *func)
1959 {
1960 if (!desc)
1961 return 0;
1962 if (IS_ERR(desc)) {
1963 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
1964 return PTR_ERR(desc);
1965 }
1966 if (!desc->gdev) {
1967 pr_warn("%s: invalid GPIO (no device)\n", func);
1968 return -EINVAL;
1969 }
1970 if (!desc->gdev->chip) {
1971 dev_warn(&desc->gdev->dev,
1972 "%s: backing chip is gone\n", func);
1973 return 0;
1974 }
1975 return 1;
1976 }
1977
1978 #define VALIDATE_DESC(desc) do { \
1979 int __valid = validate_desc(desc, __func__); \
1980 if (__valid <= 0) \
1981 return __valid; \
1982 } while (0)
1983
1984 #define VALIDATE_DESC_VOID(desc) do { \
1985 int __valid = validate_desc(desc, __func__); \
1986 if (__valid <= 0) \
1987 return; \
1988 } while (0)
1989
1990 int gpiod_request(struct gpio_desc *desc, const char *label)
1991 {
1992 int ret = -EPROBE_DEFER;
1993 struct gpio_device *gdev;
1994
1995 VALIDATE_DESC(desc);
1996 gdev = desc->gdev;
1997
1998 if (try_module_get(gdev->owner)) {
1999 ret = gpiod_request_commit(desc, label);
2000 if (ret)
2001 module_put(gdev->owner);
2002 else
2003 get_device(&gdev->dev);
2004 }
2005
2006 if (ret)
2007 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
2008
2009 return ret;
2010 }
2011
2012 static bool gpiod_free_commit(struct gpio_desc *desc)
2013 {
2014 bool ret = false;
2015 unsigned long flags;
2016 struct gpio_chip *gc;
2017
2018 might_sleep();
2019
2020 gpiod_unexport(desc);
2021
2022 spin_lock_irqsave(&gpio_lock, flags);
2023
2024 gc = desc->gdev->chip;
2025 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2026 if (gc->free) {
2027 spin_unlock_irqrestore(&gpio_lock, flags);
2028 might_sleep_if(gc->can_sleep);
2029 gc->free(gc, gpio_chip_hwgpio(desc));
2030 spin_lock_irqsave(&gpio_lock, flags);
2031 }
2032 kfree_const(desc->label);
2033 desc_set_label(desc, NULL);
2034 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
2035 clear_bit(FLAG_REQUESTED, &desc->flags);
2036 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
2037 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
2038 clear_bit(FLAG_PULL_UP, &desc->flags);
2039 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2040 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
2041 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2042 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
2043 clear_bit(FLAG_IS_HOGGED, &desc->flags);
2044 #ifdef CONFIG_OF_DYNAMIC
2045 desc->hog = NULL;
2046 #endif
2047 #ifdef CONFIG_GPIO_CDEV
2048 WRITE_ONCE(desc->debounce_period_us, 0);
2049 #endif
2050 ret = true;
2051 }
2052
2053 spin_unlock_irqrestore(&gpio_lock, flags);
2054 blocking_notifier_call_chain(&desc->gdev->notifier,
2055 GPIOLINE_CHANGED_RELEASED, desc);
2056
2057 return ret;
2058 }
2059
2060 void gpiod_free(struct gpio_desc *desc)
2061 {
2062 if (desc && desc->gdev && gpiod_free_commit(desc)) {
2063 module_put(desc->gdev->owner);
2064 put_device(&desc->gdev->dev);
2065 } else {
2066 WARN_ON(extra_checks);
2067 }
2068 }
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083 const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
2084 {
2085 struct gpio_desc *desc;
2086
2087 desc = gpiochip_get_desc(gc, offset);
2088 if (IS_ERR(desc))
2089 return NULL;
2090
2091 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
2092 return NULL;
2093 return desc->label;
2094 }
2095 EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118 struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
2119 unsigned int hwnum,
2120 const char *label,
2121 enum gpio_lookup_flags lflags,
2122 enum gpiod_flags dflags)
2123 {
2124 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
2125 int ret;
2126
2127 if (IS_ERR(desc)) {
2128 chip_err(gc, "failed to get GPIO descriptor\n");
2129 return desc;
2130 }
2131
2132 ret = gpiod_request_commit(desc, label);
2133 if (ret < 0)
2134 return ERR_PTR(ret);
2135
2136 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2137 if (ret) {
2138 chip_err(gc, "setup of own GPIO %s failed\n", label);
2139 gpiod_free_commit(desc);
2140 return ERR_PTR(ret);
2141 }
2142
2143 return desc;
2144 }
2145 EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
2146
2147
2148
2149
2150
2151
2152
2153
2154 void gpiochip_free_own_desc(struct gpio_desc *desc)
2155 {
2156 if (desc)
2157 gpiod_free_commit(desc);
2158 }
2159 EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171 static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
2172 unsigned long config)
2173 {
2174 if (!gc->set_config)
2175 return -ENOTSUPP;
2176
2177 return gc->set_config(gc, offset, config);
2178 }
2179
2180 static int gpio_set_config_with_argument(struct gpio_desc *desc,
2181 enum pin_config_param mode,
2182 u32 argument)
2183 {
2184 struct gpio_chip *gc = desc->gdev->chip;
2185 unsigned long config;
2186
2187 config = pinconf_to_config_packed(mode, argument);
2188 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2189 }
2190
2191 static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2192 enum pin_config_param mode,
2193 u32 argument)
2194 {
2195 struct device *dev = &desc->gdev->dev;
2196 int gpio = gpio_chip_hwgpio(desc);
2197 int ret;
2198
2199 ret = gpio_set_config_with_argument(desc, mode, argument);
2200 if (ret != -ENOTSUPP)
2201 return ret;
2202
2203 switch (mode) {
2204 case PIN_CONFIG_PERSIST_STATE:
2205 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
2206 break;
2207 default:
2208 break;
2209 }
2210
2211 return 0;
2212 }
2213
2214 static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2215 {
2216 return gpio_set_config_with_argument(desc, mode, 0);
2217 }
2218
2219 static int gpio_set_bias(struct gpio_desc *desc)
2220 {
2221 enum pin_config_param bias;
2222 unsigned int arg;
2223
2224 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2225 bias = PIN_CONFIG_BIAS_DISABLE;
2226 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2227 bias = PIN_CONFIG_BIAS_PULL_UP;
2228 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2229 bias = PIN_CONFIG_BIAS_PULL_DOWN;
2230 else
2231 return 0;
2232
2233 switch (bias) {
2234 case PIN_CONFIG_BIAS_PULL_DOWN:
2235 case PIN_CONFIG_BIAS_PULL_UP:
2236 arg = 1;
2237 break;
2238
2239 default:
2240 arg = 0;
2241 break;
2242 }
2243
2244 return gpio_set_config_with_argument_optional(desc, bias, arg);
2245 }
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257 int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2258 {
2259 return gpio_set_config_with_argument_optional(desc,
2260 PIN_CONFIG_INPUT_DEBOUNCE,
2261 debounce);
2262 }
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273 int gpiod_direction_input(struct gpio_desc *desc)
2274 {
2275 struct gpio_chip *gc;
2276 int ret = 0;
2277
2278 VALIDATE_DESC(desc);
2279 gc = desc->gdev->chip;
2280
2281
2282
2283
2284
2285
2286 if (!gc->get && gc->direction_input) {
2287 gpiod_warn(desc,
2288 "%s: missing get() but have direction_input()\n",
2289 __func__);
2290 return -EIO;
2291 }
2292
2293
2294
2295
2296
2297
2298
2299 if (gc->direction_input) {
2300 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2301 } else if (gc->get_direction &&
2302 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
2303 gpiod_warn(desc,
2304 "%s: missing direction_input() operation and line is output\n",
2305 __func__);
2306 return -EIO;
2307 }
2308 if (ret == 0) {
2309 clear_bit(FLAG_IS_OUT, &desc->flags);
2310 ret = gpio_set_bias(desc);
2311 }
2312
2313 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
2314
2315 return ret;
2316 }
2317 EXPORT_SYMBOL_GPL(gpiod_direction_input);
2318
2319 static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
2320 {
2321 struct gpio_chip *gc = desc->gdev->chip;
2322 int val = !!value;
2323 int ret = 0;
2324
2325
2326
2327
2328
2329
2330 if (!gc->set && !gc->direction_output) {
2331 gpiod_warn(desc,
2332 "%s: missing set() and direction_output() operations\n",
2333 __func__);
2334 return -EIO;
2335 }
2336
2337 if (gc->direction_output) {
2338 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2339 } else {
2340
2341 if (gc->get_direction &&
2342 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2343 gpiod_warn(desc,
2344 "%s: missing direction_output() operation\n",
2345 __func__);
2346 return -EIO;
2347 }
2348
2349
2350
2351
2352 gc->set(gc, gpio_chip_hwgpio(desc), val);
2353 }
2354
2355 if (!ret)
2356 set_bit(FLAG_IS_OUT, &desc->flags);
2357 trace_gpio_value(desc_to_gpio(desc), 0, val);
2358 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2359 return ret;
2360 }
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373 int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2374 {
2375 VALIDATE_DESC(desc);
2376 return gpiod_direction_output_raw_commit(desc, value);
2377 }
2378 EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392 int gpiod_direction_output(struct gpio_desc *desc, int value)
2393 {
2394 int ret;
2395
2396 VALIDATE_DESC(desc);
2397 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2398 value = !value;
2399 else
2400 value = !!value;
2401
2402
2403 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2404 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
2405 gpiod_err(desc,
2406 "%s: tried to set a GPIO tied to an IRQ as output\n",
2407 __func__);
2408 return -EIO;
2409 }
2410
2411 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2412
2413 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
2414 if (!ret)
2415 goto set_output_value;
2416
2417 if (value) {
2418 ret = gpiod_direction_input(desc);
2419 goto set_output_flag;
2420 }
2421 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
2422 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
2423 if (!ret)
2424 goto set_output_value;
2425
2426 if (!value) {
2427 ret = gpiod_direction_input(desc);
2428 goto set_output_flag;
2429 }
2430 } else {
2431 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
2432 }
2433
2434 set_output_value:
2435 ret = gpio_set_bias(desc);
2436 if (ret)
2437 return ret;
2438 return gpiod_direction_output_raw_commit(desc, value);
2439
2440 set_output_flag:
2441
2442
2443
2444
2445
2446
2447 if (ret == 0)
2448 set_bit(FLAG_IS_OUT, &desc->flags);
2449 return ret;
2450 }
2451 EXPORT_SYMBOL_GPL(gpiod_direction_output);
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461 int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2462 {
2463 int ret = 0;
2464 struct gpio_chip *gc;
2465
2466 VALIDATE_DESC(desc);
2467
2468 gc = desc->gdev->chip;
2469 if (!gc->en_hw_timestamp) {
2470 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2471 return -ENOTSUPP;
2472 }
2473
2474 ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2475 if (ret)
2476 gpiod_warn(desc, "%s: hw ts request failed\n", __func__);
2477
2478 return ret;
2479 }
2480 EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490 int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2491 {
2492 int ret = 0;
2493 struct gpio_chip *gc;
2494
2495 VALIDATE_DESC(desc);
2496
2497 gc = desc->gdev->chip;
2498 if (!gc->dis_hw_timestamp) {
2499 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2500 return -ENOTSUPP;
2501 }
2502
2503 ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2504 if (ret)
2505 gpiod_warn(desc, "%s: hw ts release failed\n", __func__);
2506
2507 return ret;
2508 }
2509 EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns);
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520 int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2521 {
2522 struct gpio_chip *gc;
2523
2524 VALIDATE_DESC(desc);
2525 gc = desc->gdev->chip;
2526
2527 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2528 }
2529 EXPORT_SYMBOL_GPL(gpiod_set_config);
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540 int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
2541 {
2542 unsigned long config;
2543
2544 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
2545 return gpiod_set_config(desc, config);
2546 }
2547 EXPORT_SYMBOL_GPL(gpiod_set_debounce);
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557 int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2558 {
2559 VALIDATE_DESC(desc);
2560
2561
2562
2563
2564 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
2565
2566
2567 return gpio_set_config_with_argument_optional(desc,
2568 PIN_CONFIG_PERSIST_STATE,
2569 !transitory);
2570 }
2571 EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2572
2573
2574
2575
2576
2577
2578
2579 int gpiod_is_active_low(const struct gpio_desc *desc)
2580 {
2581 VALIDATE_DESC(desc);
2582 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
2583 }
2584 EXPORT_SYMBOL_GPL(gpiod_is_active_low);
2585
2586
2587
2588
2589
2590 void gpiod_toggle_active_low(struct gpio_desc *desc)
2591 {
2592 VALIDATE_DESC_VOID(desc);
2593 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2594 }
2595 EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2596
2597 static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc)
2598 {
2599 return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO;
2600 }
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624 static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
2625 {
2626 struct gpio_chip *gc;
2627 int value;
2628
2629 gc = desc->gdev->chip;
2630 value = gpio_chip_get_value(gc, desc);
2631 value = value < 0 ? value : !!value;
2632 trace_gpio_value(desc_to_gpio(desc), 1, value);
2633 return value;
2634 }
2635
2636 static int gpio_chip_get_multiple(struct gpio_chip *gc,
2637 unsigned long *mask, unsigned long *bits)
2638 {
2639 if (gc->get_multiple)
2640 return gc->get_multiple(gc, mask, bits);
2641 if (gc->get) {
2642 int i, value;
2643
2644 for_each_set_bit(i, mask, gc->ngpio) {
2645 value = gc->get(gc, i);
2646 if (value < 0)
2647 return value;
2648 __assign_bit(i, bits, value);
2649 }
2650 return 0;
2651 }
2652 return -EIO;
2653 }
2654
2655 int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2656 unsigned int array_size,
2657 struct gpio_desc **desc_array,
2658 struct gpio_array *array_info,
2659 unsigned long *value_bitmap)
2660 {
2661 int ret, i = 0;
2662
2663
2664
2665
2666
2667
2668 if (array_info && array_info->desc == desc_array &&
2669 array_size <= array_info->size &&
2670 (void *)array_info == desc_array + array_info->size) {
2671 if (!can_sleep)
2672 WARN_ON(array_info->chip->can_sleep);
2673
2674 ret = gpio_chip_get_multiple(array_info->chip,
2675 array_info->get_mask,
2676 value_bitmap);
2677 if (ret)
2678 return ret;
2679
2680 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2681 bitmap_xor(value_bitmap, value_bitmap,
2682 array_info->invert_mask, array_size);
2683
2684 i = find_first_zero_bit(array_info->get_mask, array_size);
2685 if (i == array_size)
2686 return 0;
2687 } else {
2688 array_info = NULL;
2689 }
2690
2691 while (i < array_size) {
2692 struct gpio_chip *gc = desc_array[i]->gdev->chip;
2693 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2694 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
2695 unsigned long *mask, *bits;
2696 int first, j;
2697
2698 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
2699 mask = fastpath_mask;
2700 bits = fastpath_bits;
2701 } else {
2702 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2703
2704 mask = bitmap_alloc(gc->ngpio, flags);
2705 if (!mask)
2706 return -ENOMEM;
2707
2708 bits = bitmap_alloc(gc->ngpio, flags);
2709 if (!bits) {
2710 bitmap_free(mask);
2711 return -ENOMEM;
2712 }
2713 }
2714
2715 bitmap_zero(mask, gc->ngpio);
2716
2717 if (!can_sleep)
2718 WARN_ON(gc->can_sleep);
2719
2720
2721 first = i;
2722 do {
2723 const struct gpio_desc *desc = desc_array[i];
2724 int hwgpio = gpio_chip_hwgpio(desc);
2725
2726 __set_bit(hwgpio, mask);
2727 i++;
2728
2729 if (array_info)
2730 i = find_next_zero_bit(array_info->get_mask,
2731 array_size, i);
2732 } while ((i < array_size) &&
2733 (desc_array[i]->gdev->chip == gc));
2734
2735 ret = gpio_chip_get_multiple(gc, mask, bits);
2736 if (ret) {
2737 if (mask != fastpath_mask)
2738 bitmap_free(mask);
2739 if (bits != fastpath_bits)
2740 bitmap_free(bits);
2741 return ret;
2742 }
2743
2744 for (j = first; j < i; ) {
2745 const struct gpio_desc *desc = desc_array[j];
2746 int hwgpio = gpio_chip_hwgpio(desc);
2747 int value = test_bit(hwgpio, bits);
2748
2749 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2750 value = !value;
2751 __assign_bit(j, value_bitmap, value);
2752 trace_gpio_value(desc_to_gpio(desc), 1, value);
2753 j++;
2754
2755 if (array_info)
2756 j = find_next_zero_bit(array_info->get_mask, i,
2757 j);
2758 }
2759
2760 if (mask != fastpath_mask)
2761 bitmap_free(mask);
2762 if (bits != fastpath_bits)
2763 bitmap_free(bits);
2764 }
2765 return 0;
2766 }
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778 int gpiod_get_raw_value(const struct gpio_desc *desc)
2779 {
2780 VALIDATE_DESC(desc);
2781
2782 WARN_ON(desc->gdev->chip->can_sleep);
2783 return gpiod_get_raw_value_commit(desc);
2784 }
2785 EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797 int gpiod_get_value(const struct gpio_desc *desc)
2798 {
2799 int value;
2800
2801 VALIDATE_DESC(desc);
2802
2803 WARN_ON(desc->gdev->chip->can_sleep);
2804
2805 value = gpiod_get_raw_value_commit(desc);
2806 if (value < 0)
2807 return value;
2808
2809 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2810 value = !value;
2811
2812 return value;
2813 }
2814 EXPORT_SYMBOL_GPL(gpiod_get_value);
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830 int gpiod_get_raw_array_value(unsigned int array_size,
2831 struct gpio_desc **desc_array,
2832 struct gpio_array *array_info,
2833 unsigned long *value_bitmap)
2834 {
2835 if (!desc_array)
2836 return -EINVAL;
2837 return gpiod_get_array_value_complex(true, false, array_size,
2838 desc_array, array_info,
2839 value_bitmap);
2840 }
2841 EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856 int gpiod_get_array_value(unsigned int array_size,
2857 struct gpio_desc **desc_array,
2858 struct gpio_array *array_info,
2859 unsigned long *value_bitmap)
2860 {
2861 if (!desc_array)
2862 return -EINVAL;
2863 return gpiod_get_array_value_complex(false, false, array_size,
2864 desc_array, array_info,
2865 value_bitmap);
2866 }
2867 EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2868
2869
2870
2871
2872
2873
2874 static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
2875 {
2876 int ret = 0;
2877 struct gpio_chip *gc = desc->gdev->chip;
2878 int offset = gpio_chip_hwgpio(desc);
2879
2880 if (value) {
2881 ret = gc->direction_input(gc, offset);
2882 } else {
2883 ret = gc->direction_output(gc, offset, 0);
2884 if (!ret)
2885 set_bit(FLAG_IS_OUT, &desc->flags);
2886 }
2887 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2888 if (ret < 0)
2889 gpiod_err(desc,
2890 "%s: Error in set_value for open drain err %d\n",
2891 __func__, ret);
2892 }
2893
2894
2895
2896
2897
2898
2899 static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
2900 {
2901 int ret = 0;
2902 struct gpio_chip *gc = desc->gdev->chip;
2903 int offset = gpio_chip_hwgpio(desc);
2904
2905 if (value) {
2906 ret = gc->direction_output(gc, offset, 1);
2907 if (!ret)
2908 set_bit(FLAG_IS_OUT, &desc->flags);
2909 } else {
2910 ret = gc->direction_input(gc, offset);
2911 }
2912 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2913 if (ret < 0)
2914 gpiod_err(desc,
2915 "%s: Error in set_value for open source err %d\n",
2916 __func__, ret);
2917 }
2918
2919 static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
2920 {
2921 struct gpio_chip *gc;
2922
2923 gc = desc->gdev->chip;
2924 trace_gpio_value(desc_to_gpio(desc), 0, value);
2925 gc->set(gc, gpio_chip_hwgpio(desc), value);
2926 }
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938 static void gpio_chip_set_multiple(struct gpio_chip *gc,
2939 unsigned long *mask, unsigned long *bits)
2940 {
2941 if (gc->set_multiple) {
2942 gc->set_multiple(gc, mask, bits);
2943 } else {
2944 unsigned int i;
2945
2946
2947 for_each_set_bit(i, mask, gc->ngpio)
2948 gc->set(gc, i, test_bit(i, bits));
2949 }
2950 }
2951
2952 int gpiod_set_array_value_complex(bool raw, bool can_sleep,
2953 unsigned int array_size,
2954 struct gpio_desc **desc_array,
2955 struct gpio_array *array_info,
2956 unsigned long *value_bitmap)
2957 {
2958 int i = 0;
2959
2960
2961
2962
2963
2964
2965 if (array_info && array_info->desc == desc_array &&
2966 array_size <= array_info->size &&
2967 (void *)array_info == desc_array + array_info->size) {
2968 if (!can_sleep)
2969 WARN_ON(array_info->chip->can_sleep);
2970
2971 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2972 bitmap_xor(value_bitmap, value_bitmap,
2973 array_info->invert_mask, array_size);
2974
2975 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
2976 value_bitmap);
2977
2978 i = find_first_zero_bit(array_info->set_mask, array_size);
2979 if (i == array_size)
2980 return 0;
2981 } else {
2982 array_info = NULL;
2983 }
2984
2985 while (i < array_size) {
2986 struct gpio_chip *gc = desc_array[i]->gdev->chip;
2987 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2988 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
2989 unsigned long *mask, *bits;
2990 int count = 0;
2991
2992 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
2993 mask = fastpath_mask;
2994 bits = fastpath_bits;
2995 } else {
2996 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2997
2998 mask = bitmap_alloc(gc->ngpio, flags);
2999 if (!mask)
3000 return -ENOMEM;
3001
3002 bits = bitmap_alloc(gc->ngpio, flags);
3003 if (!bits) {
3004 bitmap_free(mask);
3005 return -ENOMEM;
3006 }
3007 }
3008
3009 bitmap_zero(mask, gc->ngpio);
3010
3011 if (!can_sleep)
3012 WARN_ON(gc->can_sleep);
3013
3014 do {
3015 struct gpio_desc *desc = desc_array[i];
3016 int hwgpio = gpio_chip_hwgpio(desc);
3017 int value = test_bit(i, value_bitmap);
3018
3019
3020
3021
3022
3023
3024 if (!raw && !(array_info &&
3025 test_bit(i, array_info->invert_mask)) &&
3026 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3027 value = !value;
3028 trace_gpio_value(desc_to_gpio(desc), 0, value);
3029
3030
3031
3032
3033 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
3034 gpio_set_open_drain_value_commit(desc, value);
3035 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
3036 gpio_set_open_source_value_commit(desc, value);
3037 } else {
3038 __set_bit(hwgpio, mask);
3039 __assign_bit(hwgpio, bits, value);
3040 count++;
3041 }
3042 i++;
3043
3044 if (array_info)
3045 i = find_next_zero_bit(array_info->set_mask,
3046 array_size, i);
3047 } while ((i < array_size) &&
3048 (desc_array[i]->gdev->chip == gc));
3049
3050 if (count != 0)
3051 gpio_chip_set_multiple(gc, mask, bits);
3052
3053 if (mask != fastpath_mask)
3054 bitmap_free(mask);
3055 if (bits != fastpath_bits)
3056 bitmap_free(bits);
3057 }
3058 return 0;
3059 }
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072 void gpiod_set_raw_value(struct gpio_desc *desc, int value)
3073 {
3074 VALIDATE_DESC_VOID(desc);
3075
3076 WARN_ON(desc->gdev->chip->can_sleep);
3077 gpiod_set_raw_value_commit(desc, value);
3078 }
3079 EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090 static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3091 {
3092 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3093 value = !value;
3094 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3095 gpio_set_open_drain_value_commit(desc, value);
3096 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3097 gpio_set_open_source_value_commit(desc, value);
3098 else
3099 gpiod_set_raw_value_commit(desc, value);
3100 }
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113 void gpiod_set_value(struct gpio_desc *desc, int value)
3114 {
3115 VALIDATE_DESC_VOID(desc);
3116
3117 WARN_ON(desc->gdev->chip->can_sleep);
3118 gpiod_set_value_nocheck(desc, value);
3119 }
3120 EXPORT_SYMBOL_GPL(gpiod_set_value);
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135 int gpiod_set_raw_array_value(unsigned int array_size,
3136 struct gpio_desc **desc_array,
3137 struct gpio_array *array_info,
3138 unsigned long *value_bitmap)
3139 {
3140 if (!desc_array)
3141 return -EINVAL;
3142 return gpiod_set_array_value_complex(true, false, array_size,
3143 desc_array, array_info, value_bitmap);
3144 }
3145 EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160 int gpiod_set_array_value(unsigned int array_size,
3161 struct gpio_desc **desc_array,
3162 struct gpio_array *array_info,
3163 unsigned long *value_bitmap)
3164 {
3165 if (!desc_array)
3166 return -EINVAL;
3167 return gpiod_set_array_value_complex(false, false, array_size,
3168 desc_array, array_info,
3169 value_bitmap);
3170 }
3171 EXPORT_SYMBOL_GPL(gpiod_set_array_value);
3172
3173
3174
3175
3176
3177
3178 int gpiod_cansleep(const struct gpio_desc *desc)
3179 {
3180 VALIDATE_DESC(desc);
3181 return desc->gdev->chip->can_sleep;
3182 }
3183 EXPORT_SYMBOL_GPL(gpiod_cansleep);
3184
3185
3186
3187
3188
3189
3190 int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
3191 {
3192 VALIDATE_DESC(desc);
3193 if (name) {
3194 name = kstrdup_const(name, GFP_KERNEL);
3195 if (!name)
3196 return -ENOMEM;
3197 }
3198
3199 kfree_const(desc->label);
3200 desc_set_label(desc, name);
3201
3202 return 0;
3203 }
3204 EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3205
3206
3207
3208
3209
3210
3211
3212
3213 int gpiod_to_irq(const struct gpio_desc *desc)
3214 {
3215 struct gpio_chip *gc;
3216 int offset;
3217
3218
3219
3220
3221
3222
3223 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
3224 return -EINVAL;
3225
3226 gc = desc->gdev->chip;
3227 offset = gpio_chip_hwgpio(desc);
3228 if (gc->to_irq) {
3229 int retirq = gc->to_irq(gc, offset);
3230
3231
3232 if (!retirq)
3233 return -ENXIO;
3234
3235 return retirq;
3236 }
3237 #ifdef CONFIG_GPIOLIB_IRQCHIP
3238 if (gc->irq.chip) {
3239
3240
3241
3242
3243
3244 return -EPROBE_DEFER;
3245 }
3246 #endif
3247 return -ENXIO;
3248 }
3249 EXPORT_SYMBOL_GPL(gpiod_to_irq);
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259 int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
3260 {
3261 struct gpio_desc *desc;
3262
3263 desc = gpiochip_get_desc(gc, offset);
3264 if (IS_ERR(desc))
3265 return PTR_ERR(desc);
3266
3267
3268
3269
3270
3271 if (!gc->can_sleep && gc->get_direction) {
3272 int dir = gpiod_get_direction(desc);
3273
3274 if (dir < 0) {
3275 chip_err(gc, "%s: cannot get GPIO direction\n",
3276 __func__);
3277 return dir;
3278 }
3279 }
3280
3281
3282 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3283 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3284 chip_err(gc,
3285 "%s: tried to flag a GPIO set as output for IRQ\n",
3286 __func__);
3287 return -EIO;
3288 }
3289
3290 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
3291 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3292
3293
3294
3295
3296
3297
3298 if (!desc->label)
3299 desc_set_label(desc, "interrupt");
3300
3301 return 0;
3302 }
3303 EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313 void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
3314 {
3315 struct gpio_desc *desc;
3316
3317 desc = gpiochip_get_desc(gc, offset);
3318 if (IS_ERR(desc))
3319 return;
3320
3321 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
3322 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3323
3324
3325 if (desc->label && !strcmp(desc->label, "interrupt"))
3326 desc_set_label(desc, NULL);
3327 }
3328 EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
3329
3330 void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
3331 {
3332 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
3333
3334 if (!IS_ERR(desc) &&
3335 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3336 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3337 }
3338 EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3339
3340 void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
3341 {
3342 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
3343
3344 if (!IS_ERR(desc) &&
3345 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
3346
3347
3348
3349
3350 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3351 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
3352 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3353 }
3354 }
3355 EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3356
3357 bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
3358 {
3359 if (offset >= gc->ngpio)
3360 return false;
3361
3362 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
3363 }
3364 EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3365
3366 int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
3367 {
3368 int ret;
3369
3370 if (!try_module_get(gc->gpiodev->owner))
3371 return -ENODEV;
3372
3373 ret = gpiochip_lock_as_irq(gc, offset);
3374 if (ret) {
3375 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3376 module_put(gc->gpiodev->owner);
3377 return ret;
3378 }
3379 return 0;
3380 }
3381 EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3382
3383 void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
3384 {
3385 gpiochip_unlock_as_irq(gc, offset);
3386 module_put(gc->gpiodev->owner);
3387 }
3388 EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3389
3390 bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
3391 {
3392 if (offset >= gc->ngpio)
3393 return false;
3394
3395 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
3396 }
3397 EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3398
3399 bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
3400 {
3401 if (offset >= gc->ngpio)
3402 return false;
3403
3404 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
3405 }
3406 EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3407
3408 bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
3409 {
3410 if (offset >= gc->ngpio)
3411 return false;
3412
3413 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
3414 }
3415 EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426 int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
3427 {
3428 might_sleep_if(extra_checks);
3429 VALIDATE_DESC(desc);
3430 return gpiod_get_raw_value_commit(desc);
3431 }
3432 EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443 int gpiod_get_value_cansleep(const struct gpio_desc *desc)
3444 {
3445 int value;
3446
3447 might_sleep_if(extra_checks);
3448 VALIDATE_DESC(desc);
3449 value = gpiod_get_raw_value_commit(desc);
3450 if (value < 0)
3451 return value;
3452
3453 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3454 value = !value;
3455
3456 return value;
3457 }
3458 EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473 int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3474 struct gpio_desc **desc_array,
3475 struct gpio_array *array_info,
3476 unsigned long *value_bitmap)
3477 {
3478 might_sleep_if(extra_checks);
3479 if (!desc_array)
3480 return -EINVAL;
3481 return gpiod_get_array_value_complex(true, true, array_size,
3482 desc_array, array_info,
3483 value_bitmap);
3484 }
3485 EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499 int gpiod_get_array_value_cansleep(unsigned int array_size,
3500 struct gpio_desc **desc_array,
3501 struct gpio_array *array_info,
3502 unsigned long *value_bitmap)
3503 {
3504 might_sleep_if(extra_checks);
3505 if (!desc_array)
3506 return -EINVAL;
3507 return gpiod_get_array_value_complex(false, true, array_size,
3508 desc_array, array_info,
3509 value_bitmap);
3510 }
3511 EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523 void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
3524 {
3525 might_sleep_if(extra_checks);
3526 VALIDATE_DESC_VOID(desc);
3527 gpiod_set_raw_value_commit(desc, value);
3528 }
3529 EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541 void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
3542 {
3543 might_sleep_if(extra_checks);
3544 VALIDATE_DESC_VOID(desc);
3545 gpiod_set_value_nocheck(desc, value);
3546 }
3547 EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561 int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3562 struct gpio_desc **desc_array,
3563 struct gpio_array *array_info,
3564 unsigned long *value_bitmap)
3565 {
3566 might_sleep_if(extra_checks);
3567 if (!desc_array)
3568 return -EINVAL;
3569 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
3570 array_info, value_bitmap);
3571 }
3572 EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
3573
3574
3575
3576
3577
3578
3579 void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3580 {
3581 unsigned int i;
3582
3583 mutex_lock(&gpio_lookup_lock);
3584
3585 for (i = 0; i < n; i++)
3586 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3587
3588 mutex_unlock(&gpio_lookup_lock);
3589 }
3590
3591
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601
3602
3603 int gpiod_set_array_value_cansleep(unsigned int array_size,
3604 struct gpio_desc **desc_array,
3605 struct gpio_array *array_info,
3606 unsigned long *value_bitmap)
3607 {
3608 might_sleep_if(extra_checks);
3609 if (!desc_array)
3610 return -EINVAL;
3611 return gpiod_set_array_value_complex(false, true, array_size,
3612 desc_array, array_info,
3613 value_bitmap);
3614 }
3615 EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
3616
3617
3618
3619
3620
3621 void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
3622 {
3623 gpiod_add_lookup_tables(&table, 1);
3624 }
3625 EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
3626
3627
3628
3629
3630
3631 void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3632 {
3633
3634 if (!table)
3635 return;
3636
3637 mutex_lock(&gpio_lookup_lock);
3638
3639 list_del(&table->list);
3640
3641 mutex_unlock(&gpio_lookup_lock);
3642 }
3643 EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
3644
3645
3646
3647
3648
3649 void gpiod_add_hogs(struct gpiod_hog *hogs)
3650 {
3651 struct gpio_chip *gc;
3652 struct gpiod_hog *hog;
3653
3654 mutex_lock(&gpio_machine_hogs_mutex);
3655
3656 for (hog = &hogs[0]; hog->chip_label; hog++) {
3657 list_add_tail(&hog->list, &gpio_machine_hogs);
3658
3659
3660
3661
3662
3663 gc = find_chip_by_name(hog->chip_label);
3664 if (gc)
3665 gpiochip_machine_hog(gc, hog);
3666 }
3667
3668 mutex_unlock(&gpio_machine_hogs_mutex);
3669 }
3670 EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3671
3672 void gpiod_remove_hogs(struct gpiod_hog *hogs)
3673 {
3674 struct gpiod_hog *hog;
3675
3676 mutex_lock(&gpio_machine_hogs_mutex);
3677 for (hog = &hogs[0]; hog->chip_label; hog++)
3678 list_del(&hog->list);
3679 mutex_unlock(&gpio_machine_hogs_mutex);
3680 }
3681 EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
3682
3683 static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
3684 {
3685 const char *dev_id = dev ? dev_name(dev) : NULL;
3686 struct gpiod_lookup_table *table;
3687
3688 mutex_lock(&gpio_lookup_lock);
3689
3690 list_for_each_entry(table, &gpio_lookup_list, list) {
3691 if (table->dev_id && dev_id) {
3692
3693
3694
3695
3696 if (!strcmp(table->dev_id, dev_id))
3697 goto found;
3698 } else {
3699
3700
3701
3702
3703 if (dev_id == table->dev_id)
3704 goto found;
3705 }
3706 }
3707 table = NULL;
3708
3709 found:
3710 mutex_unlock(&gpio_lookup_lock);
3711 return table;
3712 }
3713
3714 static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
3715 unsigned int idx, unsigned long *flags)
3716 {
3717 struct gpio_desc *desc = ERR_PTR(-ENOENT);
3718 struct gpiod_lookup_table *table;
3719 struct gpiod_lookup *p;
3720
3721 table = gpiod_find_lookup_table(dev);
3722 if (!table)
3723 return desc;
3724
3725 for (p = &table->table[0]; p->key; p++) {
3726 struct gpio_chip *gc;
3727
3728
3729 if (p->idx != idx)
3730 continue;
3731
3732
3733 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3734 continue;
3735
3736 if (p->chip_hwnum == U16_MAX) {
3737 desc = gpio_name_to_desc(p->key);
3738 if (desc) {
3739 *flags = p->flags;
3740 return desc;
3741 }
3742
3743 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3744 p->key);
3745 return ERR_PTR(-EPROBE_DEFER);
3746 }
3747
3748 gc = find_chip_by_name(p->key);
3749
3750 if (!gc) {
3751
3752
3753
3754
3755
3756
3757
3758 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
3759 p->key);
3760 return ERR_PTR(-EPROBE_DEFER);
3761 }
3762
3763 if (gc->ngpio <= p->chip_hwnum) {
3764 dev_err(dev,
3765 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
3766 idx, p->chip_hwnum, gc->ngpio - 1,
3767 gc->label);
3768 return ERR_PTR(-EINVAL);
3769 }
3770
3771 desc = gpiochip_get_desc(gc, p->chip_hwnum);
3772 *flags = p->flags;
3773
3774 return desc;
3775 }
3776
3777 return desc;
3778 }
3779
3780 static int platform_gpio_count(struct device *dev, const char *con_id)
3781 {
3782 struct gpiod_lookup_table *table;
3783 struct gpiod_lookup *p;
3784 unsigned int count = 0;
3785
3786 table = gpiod_find_lookup_table(dev);
3787 if (!table)
3788 return -ENOENT;
3789
3790 for (p = &table->table[0]; p->key; p++) {
3791 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3792 (!con_id && !p->con_id))
3793 count++;
3794 }
3795 if (!count)
3796 return -ENOENT;
3797
3798 return count;
3799 }
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822 struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
3823 const char *con_id, int index,
3824 enum gpiod_flags flags,
3825 const char *label)
3826 {
3827 struct gpio_desc *desc;
3828 char prop_name[32];
3829 unsigned int i;
3830
3831 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
3832 if (con_id)
3833 snprintf(prop_name, sizeof(prop_name), "%s-%s",
3834 con_id, gpio_suffixes[i]);
3835 else
3836 snprintf(prop_name, sizeof(prop_name), "%s",
3837 gpio_suffixes[i]);
3838
3839 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
3840 label);
3841 if (!gpiod_not_found(desc))
3842 break;
3843 }
3844
3845 return desc;
3846 }
3847 EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
3848
3849
3850
3851
3852
3853
3854
3855 int gpiod_count(struct device *dev, const char *con_id)
3856 {
3857 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
3858 int count = -ENOENT;
3859
3860 if (is_of_node(fwnode))
3861 count = of_gpio_get_count(dev, con_id);
3862 else if (is_acpi_node(fwnode))
3863 count = acpi_gpio_count(dev, con_id);
3864
3865 if (count < 0)
3866 count = platform_gpio_count(dev, con_id);
3867
3868 return count;
3869 }
3870 EXPORT_SYMBOL_GPL(gpiod_count);
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882 struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
3883 enum gpiod_flags flags)
3884 {
3885 return gpiod_get_index(dev, con_id, 0, flags);
3886 }
3887 EXPORT_SYMBOL_GPL(gpiod_get);
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899 struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
3900 const char *con_id,
3901 enum gpiod_flags flags)
3902 {
3903 return gpiod_get_index_optional(dev, con_id, 0, flags);
3904 }
3905 EXPORT_SYMBOL_GPL(gpiod_get_optional);
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920 int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
3921 unsigned long lflags, enum gpiod_flags dflags)
3922 {
3923 int ret;
3924
3925 if (lflags & GPIO_ACTIVE_LOW)
3926 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
3927
3928 if (lflags & GPIO_OPEN_DRAIN)
3929 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3930 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
3931
3932
3933
3934
3935
3936
3937 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3938 gpiod_warn(desc,
3939 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
3940 }
3941
3942 if (lflags & GPIO_OPEN_SOURCE)
3943 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
3944
3945 if (((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) ||
3946 ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DISABLE)) ||
3947 ((lflags & GPIO_PULL_DOWN) && (lflags & GPIO_PULL_DISABLE))) {
3948 gpiod_err(desc,
3949 "multiple pull-up, pull-down or pull-disable enabled, invalid configuration\n");
3950 return -EINVAL;
3951 }
3952
3953 if (lflags & GPIO_PULL_UP)
3954 set_bit(FLAG_PULL_UP, &desc->flags);
3955 else if (lflags & GPIO_PULL_DOWN)
3956 set_bit(FLAG_PULL_DOWN, &desc->flags);
3957 else if (lflags & GPIO_PULL_DISABLE)
3958 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
3959
3960 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
3961 if (ret < 0)
3962 return ret;
3963
3964
3965 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
3966 gpiod_dbg(desc, "no flags found for %s\n", con_id);
3967 return 0;
3968 }
3969
3970
3971 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
3972 ret = gpiod_direction_output(desc,
3973 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
3974 else
3975 ret = gpiod_direction_input(desc);
3976
3977 return ret;
3978 }
3979
3980
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994 struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
3995 const char *con_id,
3996 unsigned int idx,
3997 enum gpiod_flags flags)
3998 {
3999 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
4000 struct gpio_desc *desc = NULL;
4001 int ret;
4002
4003 const char *devname = dev ? dev_name(dev) : "?";
4004 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
4005
4006 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4007
4008
4009 if (is_of_node(fwnode)) {
4010 dev_dbg(dev, "using device tree for GPIO lookup\n");
4011 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4012 } else if (is_acpi_node(fwnode)) {
4013 dev_dbg(dev, "using ACPI for GPIO lookup\n");
4014 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4015 }
4016
4017
4018
4019
4020
4021 if (!desc || gpiod_not_found(desc)) {
4022 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
4023 desc = gpiod_find(dev, con_id, idx, &lookupflags);
4024 }
4025
4026 if (IS_ERR(desc)) {
4027 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
4028 return desc;
4029 }
4030
4031
4032
4033
4034
4035 ret = gpiod_request(desc, con_id ?: devname);
4036 if (ret) {
4037 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
4038 return ERR_PTR(ret);
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048 dev_info(dev, "nonexclusive access to GPIO for %s\n", con_id ?: devname);
4049 return desc;
4050 }
4051
4052 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
4053 if (ret < 0) {
4054 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
4055 gpiod_put(desc);
4056 return ERR_PTR(ret);
4057 }
4058
4059 blocking_notifier_call_chain(&desc->gdev->notifier,
4060 GPIOLINE_CHANGED_REQUESTED, desc);
4061
4062 return desc;
4063 }
4064 EXPORT_SYMBOL_GPL(gpiod_get_index);
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085
4086
4087 struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
4088 const char *propname, int index,
4089 enum gpiod_flags dflags,
4090 const char *label)
4091 {
4092 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
4093 struct gpio_desc *desc = ERR_PTR(-ENODEV);
4094 int ret;
4095
4096 if (is_of_node(fwnode)) {
4097 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4098 propname, index,
4099 dflags,
4100 label);
4101 return desc;
4102 } else if (is_acpi_node(fwnode)) {
4103 struct acpi_gpio_info info;
4104
4105 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
4106 if (IS_ERR(desc))
4107 return desc;
4108
4109 acpi_gpio_update_gpiod_flags(&dflags, &info);
4110 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
4111 } else
4112 return ERR_PTR(-EINVAL);
4113
4114
4115 ret = gpiod_request(desc, label);
4116 if (ret)
4117 return ERR_PTR(ret);
4118
4119 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4120 if (ret < 0) {
4121 gpiod_put(desc);
4122 return ERR_PTR(ret);
4123 }
4124
4125 blocking_notifier_call_chain(&desc->gdev->notifier,
4126 GPIOLINE_CHANGED_REQUESTED, desc);
4127
4128 return desc;
4129 }
4130 EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4131
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144 struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
4145 const char *con_id,
4146 unsigned int index,
4147 enum gpiod_flags flags)
4148 {
4149 struct gpio_desc *desc;
4150
4151 desc = gpiod_get_index(dev, con_id, index, flags);
4152 if (gpiod_not_found(desc))
4153 return NULL;
4154
4155 return desc;
4156 }
4157 EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
4158
4159
4160
4161
4162
4163
4164
4165
4166
4167 int gpiod_hog(struct gpio_desc *desc, const char *name,
4168 unsigned long lflags, enum gpiod_flags dflags)
4169 {
4170 struct gpio_chip *gc;
4171 struct gpio_desc *local_desc;
4172 int hwnum;
4173 int ret;
4174
4175 gc = gpiod_to_chip(desc);
4176 hwnum = gpio_chip_hwgpio(desc);
4177
4178 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
4179 lflags, dflags);
4180 if (IS_ERR(local_desc)) {
4181 ret = PTR_ERR(local_desc);
4182 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
4183 name, gc->label, hwnum, ret);
4184 return ret;
4185 }
4186
4187
4188 set_bit(FLAG_IS_HOGGED, &desc->flags);
4189
4190 gpiod_info(desc, "hogged as %s%s\n",
4191 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4192 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4193 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
4194
4195 return 0;
4196 }
4197
4198
4199
4200
4201
4202 static void gpiochip_free_hogs(struct gpio_chip *gc)
4203 {
4204 struct gpio_desc *desc;
4205
4206 for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED)
4207 gpiochip_free_own_desc(desc);
4208 }
4209
4210
4211
4212
4213
4214
4215
4216
4217
4218
4219
4220
4221
4222 struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4223 const char *con_id,
4224 enum gpiod_flags flags)
4225 {
4226 struct gpio_desc *desc;
4227 struct gpio_descs *descs;
4228 struct gpio_array *array_info = NULL;
4229 struct gpio_chip *gc;
4230 int count, bitmap_size;
4231
4232 count = gpiod_count(dev, con_id);
4233 if (count < 0)
4234 return ERR_PTR(count);
4235
4236 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
4237 if (!descs)
4238 return ERR_PTR(-ENOMEM);
4239
4240 for (descs->ndescs = 0; descs->ndescs < count; ) {
4241 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4242 if (IS_ERR(desc)) {
4243 gpiod_put_array(descs);
4244 return ERR_CAST(desc);
4245 }
4246
4247 descs->desc[descs->ndescs] = desc;
4248
4249 gc = gpiod_to_chip(desc);
4250
4251
4252
4253
4254 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
4255 struct gpio_descs *array;
4256
4257 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4258 gc->ngpio : count);
4259
4260 array = kzalloc(struct_size(descs, desc, count) +
4261 struct_size(array_info, invert_mask,
4262 3 * bitmap_size), GFP_KERNEL);
4263 if (!array) {
4264 gpiod_put_array(descs);
4265 return ERR_PTR(-ENOMEM);
4266 }
4267
4268 memcpy(array, descs,
4269 struct_size(descs, desc, descs->ndescs + 1));
4270 kfree(descs);
4271
4272 descs = array;
4273 array_info = (void *)(descs->desc + count);
4274 array_info->get_mask = array_info->invert_mask +
4275 bitmap_size;
4276 array_info->set_mask = array_info->get_mask +
4277 bitmap_size;
4278
4279 array_info->desc = descs->desc;
4280 array_info->size = count;
4281 array_info->chip = gc;
4282 bitmap_set(array_info->get_mask, descs->ndescs,
4283 count - descs->ndescs);
4284 bitmap_set(array_info->set_mask, descs->ndescs,
4285 count - descs->ndescs);
4286 descs->info = array_info;
4287 }
4288
4289 if (array_info && array_info->chip != gc) {
4290 __clear_bit(descs->ndescs, array_info->get_mask);
4291 __clear_bit(descs->ndescs, array_info->set_mask);
4292 }
4293
4294
4295
4296
4297 else if (array_info &&
4298 gpio_chip_hwgpio(desc) != descs->ndescs) {
4299
4300
4301
4302
4303
4304 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4305 array_info = NULL;
4306 } else {
4307 __clear_bit(descs->ndescs,
4308 array_info->get_mask);
4309 __clear_bit(descs->ndescs,
4310 array_info->set_mask);
4311 }
4312 } else if (array_info) {
4313
4314 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4315 gpiochip_line_is_open_source(gc, descs->ndescs))
4316 __clear_bit(descs->ndescs,
4317 array_info->set_mask);
4318
4319 if (gpiod_is_active_low(desc))
4320 __set_bit(descs->ndescs,
4321 array_info->invert_mask);
4322 }
4323
4324 descs->ndescs++;
4325 }
4326 if (array_info)
4327 dev_dbg(dev,
4328 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4329 array_info->chip->label, array_info->size,
4330 *array_info->get_mask, *array_info->set_mask,
4331 *array_info->invert_mask);
4332 return descs;
4333 }
4334 EXPORT_SYMBOL_GPL(gpiod_get_array);
4335
4336
4337
4338
4339
4340
4341
4342
4343
4344
4345
4346 struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4347 const char *con_id,
4348 enum gpiod_flags flags)
4349 {
4350 struct gpio_descs *descs;
4351
4352 descs = gpiod_get_array(dev, con_id, flags);
4353 if (gpiod_not_found(descs))
4354 return NULL;
4355
4356 return descs;
4357 }
4358 EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4359
4360
4361
4362
4363
4364
4365
4366 void gpiod_put(struct gpio_desc *desc)
4367 {
4368 if (desc)
4369 gpiod_free(desc);
4370 }
4371 EXPORT_SYMBOL_GPL(gpiod_put);
4372
4373
4374
4375
4376
4377 void gpiod_put_array(struct gpio_descs *descs)
4378 {
4379 unsigned int i;
4380
4381 for (i = 0; i < descs->ndescs; i++)
4382 gpiod_put(descs->desc[i]);
4383
4384 kfree(descs);
4385 }
4386 EXPORT_SYMBOL_GPL(gpiod_put_array);
4387
4388
4389 static int gpio_bus_match(struct device *dev, struct device_driver *drv)
4390 {
4391 struct fwnode_handle *fwnode = dev_fwnode(dev);
4392
4393
4394
4395
4396
4397 if (fwnode && fwnode->dev != dev)
4398 return 0;
4399 return 1;
4400 }
4401
4402 static int gpio_stub_drv_probe(struct device *dev)
4403 {
4404
4405
4406
4407
4408
4409
4410
4411
4412
4413
4414
4415
4416 return 0;
4417 }
4418
4419 static struct device_driver gpio_stub_drv = {
4420 .name = "gpio_stub_drv",
4421 .bus = &gpio_bus_type,
4422 .probe = gpio_stub_drv_probe,
4423 };
4424
4425 static int __init gpiolib_dev_init(void)
4426 {
4427 int ret;
4428
4429
4430 ret = bus_register(&gpio_bus_type);
4431 if (ret < 0) {
4432 pr_err("gpiolib: could not register GPIO bus type\n");
4433 return ret;
4434 }
4435
4436 ret = driver_register(&gpio_stub_drv);
4437 if (ret < 0) {
4438 pr_err("gpiolib: could not register GPIO stub driver\n");
4439 bus_unregister(&gpio_bus_type);
4440 return ret;
4441 }
4442
4443 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
4444 if (ret < 0) {
4445 pr_err("gpiolib: failed to allocate char dev region\n");
4446 driver_unregister(&gpio_stub_drv);
4447 bus_unregister(&gpio_bus_type);
4448 return ret;
4449 }
4450
4451 gpiolib_initialized = true;
4452 gpiochip_setup_devs();
4453
4454 #if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4455 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4456 #endif
4457
4458 return ret;
4459 }
4460 core_initcall(gpiolib_dev_init);
4461
4462 #ifdef CONFIG_DEBUG_FS
4463
4464 static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
4465 {
4466 struct gpio_chip *gc = gdev->chip;
4467 struct gpio_desc *desc;
4468 unsigned gpio = gdev->base;
4469 int value;
4470 bool is_out;
4471 bool is_irq;
4472 bool active_low;
4473
4474 for_each_gpio_desc(gc, desc) {
4475 if (test_bit(FLAG_REQUESTED, &desc->flags)) {
4476 gpiod_get_direction(desc);
4477 is_out = test_bit(FLAG_IS_OUT, &desc->flags);
4478 value = gpio_chip_get_value(gc, desc);
4479 is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags);
4480 active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags);
4481 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n",
4482 gpio, desc->name ?: "", desc->label,
4483 is_out ? "out" : "in ",
4484 value >= 0 ? (value ? "hi" : "lo") : "? ",
4485 is_irq ? "IRQ " : "",
4486 active_low ? "ACTIVE LOW" : "");
4487 } else if (desc->name) {
4488 seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name);
4489 }
4490
4491 gpio++;
4492 }
4493 }
4494
4495 static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
4496 {
4497 unsigned long flags;
4498 struct gpio_device *gdev = NULL;
4499 loff_t index = *pos;
4500
4501 s->private = "";
4502
4503 spin_lock_irqsave(&gpio_lock, flags);
4504 list_for_each_entry(gdev, &gpio_devices, list)
4505 if (index-- == 0) {
4506 spin_unlock_irqrestore(&gpio_lock, flags);
4507 return gdev;
4508 }
4509 spin_unlock_irqrestore(&gpio_lock, flags);
4510
4511 return NULL;
4512 }
4513
4514 static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4515 {
4516 unsigned long flags;
4517 struct gpio_device *gdev = v;
4518 void *ret = NULL;
4519
4520 spin_lock_irqsave(&gpio_lock, flags);
4521 if (list_is_last(&gdev->list, &gpio_devices))
4522 ret = NULL;
4523 else
4524 ret = list_first_entry(&gdev->list, struct gpio_device, list);
4525 spin_unlock_irqrestore(&gpio_lock, flags);
4526
4527 s->private = "\n";
4528 ++*pos;
4529
4530 return ret;
4531 }
4532
4533 static void gpiolib_seq_stop(struct seq_file *s, void *v)
4534 {
4535 }
4536
4537 static int gpiolib_seq_show(struct seq_file *s, void *v)
4538 {
4539 struct gpio_device *gdev = v;
4540 struct gpio_chip *gc = gdev->chip;
4541 struct device *parent;
4542
4543 if (!gc) {
4544 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4545 dev_name(&gdev->dev));
4546 return 0;
4547 }
4548
4549 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4550 dev_name(&gdev->dev),
4551 gdev->base, gdev->base + gdev->ngpio - 1);
4552 parent = gc->parent;
4553 if (parent)
4554 seq_printf(s, ", parent: %s/%s",
4555 parent->bus ? parent->bus->name : "no-bus",
4556 dev_name(parent));
4557 if (gc->label)
4558 seq_printf(s, ", %s", gc->label);
4559 if (gc->can_sleep)
4560 seq_printf(s, ", can sleep");
4561 seq_printf(s, ":\n");
4562
4563 if (gc->dbg_show)
4564 gc->dbg_show(s, gc);
4565 else
4566 gpiolib_dbg_show(s, gdev);
4567
4568 return 0;
4569 }
4570
4571 static const struct seq_operations gpiolib_sops = {
4572 .start = gpiolib_seq_start,
4573 .next = gpiolib_seq_next,
4574 .stop = gpiolib_seq_stop,
4575 .show = gpiolib_seq_show,
4576 };
4577 DEFINE_SEQ_ATTRIBUTE(gpiolib);
4578
4579 static int __init gpiolib_debugfs_init(void)
4580 {
4581
4582 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
4583 return 0;
4584 }
4585 subsys_initcall(gpiolib_debugfs_init);
4586
4587 #endif