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0008 #include <linux/bitops.h>
0009 #include <linux/gpio/driver.h>
0010 #include <linux/kernel.h>
0011 #include <linux/module.h>
0012 #include <linux/mutex.h>
0013 #include <linux/of_device.h>
0014 #include <linux/of_gpio.h>
0015 #include <linux/seq_file.h>
0016 #include <linux/spi/spi.h>
0017 #include <linux/regmap.h>
0018
0019
0020 #define XRA_GSR 0x00
0021 #define XRA_OCR 0x02
0022 #define XRA_PIR 0x04
0023 #define XRA_GCR 0x06
0024 #define XRA_PUR 0x08
0025 #define XRA_IER 0x0A
0026 #define XRA_TSCR 0x0C
0027 #define XRA_ISR 0x0E
0028 #define XRA_REIR 0x10
0029 #define XRA_FEIR 0x12
0030 #define XRA_IFR 0x14
0031 #define XRA_LAST 0x15
0032
0033 struct xra1403 {
0034 struct gpio_chip chip;
0035 struct regmap *regmap;
0036 };
0037
0038 static const struct regmap_config xra1403_regmap_cfg = {
0039 .reg_bits = 7,
0040 .pad_bits = 1,
0041 .val_bits = 8,
0042
0043 .max_register = XRA_LAST,
0044 };
0045
0046 static unsigned int to_reg(unsigned int reg, unsigned int offset)
0047 {
0048 return reg + (offset > 7);
0049 }
0050
0051 static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
0052 {
0053 struct xra1403 *xra = gpiochip_get_data(chip);
0054
0055 return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
0056 BIT(offset % 8), BIT(offset % 8));
0057 }
0058
0059 static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
0060 int value)
0061 {
0062 int ret;
0063 struct xra1403 *xra = gpiochip_get_data(chip);
0064
0065 ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
0066 BIT(offset % 8), 0);
0067 if (ret)
0068 return ret;
0069
0070 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
0071 BIT(offset % 8), value ? BIT(offset % 8) : 0);
0072
0073 return ret;
0074 }
0075
0076 static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
0077 {
0078 int ret;
0079 unsigned int val;
0080 struct xra1403 *xra = gpiochip_get_data(chip);
0081
0082 ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
0083 if (ret)
0084 return ret;
0085
0086 if (val & BIT(offset % 8))
0087 return GPIO_LINE_DIRECTION_IN;
0088
0089 return GPIO_LINE_DIRECTION_OUT;
0090 }
0091
0092 static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
0093 {
0094 int ret;
0095 unsigned int val;
0096 struct xra1403 *xra = gpiochip_get_data(chip);
0097
0098 ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
0099 if (ret)
0100 return ret;
0101
0102 return !!(val & BIT(offset % 8));
0103 }
0104
0105 static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
0106 {
0107 int ret;
0108 struct xra1403 *xra = gpiochip_get_data(chip);
0109
0110 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
0111 BIT(offset % 8), value ? BIT(offset % 8) : 0);
0112 if (ret)
0113 dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
0114 offset, ret);
0115 }
0116
0117 #ifdef CONFIG_DEBUG_FS
0118 static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
0119 {
0120 int reg;
0121 struct xra1403 *xra = gpiochip_get_data(chip);
0122 int value[XRA_LAST];
0123 int i;
0124 const char *label;
0125 unsigned int gcr;
0126 unsigned int gsr;
0127
0128 seq_puts(s, "xra reg:");
0129 for (reg = 0; reg <= XRA_LAST; reg++)
0130 seq_printf(s, " %2.2x", reg);
0131 seq_puts(s, "\n value:");
0132 for (reg = 0; reg < XRA_LAST; reg++) {
0133 regmap_read(xra->regmap, reg, &value[reg]);
0134 seq_printf(s, " %2.2x", value[reg]);
0135 }
0136 seq_puts(s, "\n");
0137
0138 gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
0139 gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
0140 for_each_requested_gpio(chip, i, label) {
0141 seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
0142 chip->base + i, label,
0143 (gcr & BIT(i)) ? "in" : "out",
0144 (gsr & BIT(i)) ? "hi" : "lo");
0145 }
0146 }
0147 #else
0148 #define xra1403_dbg_show NULL
0149 #endif
0150
0151 static int xra1403_probe(struct spi_device *spi)
0152 {
0153 struct xra1403 *xra;
0154 struct gpio_desc *reset_gpio;
0155 int ret;
0156
0157 xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
0158 if (!xra)
0159 return -ENOMEM;
0160
0161
0162 reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
0163 if (IS_ERR(reset_gpio))
0164 dev_warn(&spi->dev, "Could not get reset-gpios\n");
0165
0166 xra->chip.direction_input = xra1403_direction_input;
0167 xra->chip.direction_output = xra1403_direction_output;
0168 xra->chip.get_direction = xra1403_get_direction;
0169 xra->chip.get = xra1403_get;
0170 xra->chip.set = xra1403_set;
0171
0172 xra->chip.dbg_show = xra1403_dbg_show;
0173
0174 xra->chip.ngpio = 16;
0175 xra->chip.label = "xra1403";
0176
0177 xra->chip.base = -1;
0178 xra->chip.can_sleep = true;
0179 xra->chip.parent = &spi->dev;
0180 xra->chip.owner = THIS_MODULE;
0181
0182 xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
0183 if (IS_ERR(xra->regmap)) {
0184 ret = PTR_ERR(xra->regmap);
0185 dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
0186 return ret;
0187 }
0188
0189 return devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
0190 }
0191
0192 static const struct spi_device_id xra1403_ids[] = {
0193 { "xra1403" },
0194 {},
0195 };
0196 MODULE_DEVICE_TABLE(spi, xra1403_ids);
0197
0198 static const struct of_device_id xra1403_spi_of_match[] = {
0199 { .compatible = "exar,xra1403" },
0200 {},
0201 };
0202 MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
0203
0204 static struct spi_driver xra1403_driver = {
0205 .probe = xra1403_probe,
0206 .id_table = xra1403_ids,
0207 .driver = {
0208 .name = "xra1403",
0209 .of_match_table = of_match_ptr(xra1403_spi_of_match),
0210 },
0211 };
0212
0213 module_spi_driver(xra1403_driver);
0214
0215 MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
0216 MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
0217 MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
0218 MODULE_LICENSE("GPL v2");