drivers/gpio/gpio-vx855.c

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
0004  *
0005  * Copyright (C) 2009 VIA Technologies, Inc.
0006  * Copyright (C) 2010 One Laptop per Child
0007  * Author: Harald Welte <HaraldWelte@viatech.com>
0008  * All rights reserved.
0009  */
0010 #include <linux/kernel.h>
0011 #include <linux/module.h>
0012 #include <linux/gpio/driver.h>
0013 #include <linux/slab.h>
0014 #include <linux/device.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/pci.h>
0017 #include <linux/io.h>
0018
0019 #define MODULE_NAME "vx855_gpio"
0020
0021 /* The VX855 south bridge has the following GPIO pins:
0022  *  GPI 0...13  General Purpose Input
0023  *  GPO 0...12  General Purpose Output
0024  *  GPIO 0...14 General Purpose I/O (Open-Drain)
0025  */
0026
0027 #define NR_VX855_GPI    14
0028 #define NR_VX855_GPO    13
0029 #define NR_VX855_GPIO   15
0030
0031 #define NR_VX855_GPInO  (NR_VX855_GPI + NR_VX855_GPO)
0032 #define NR_VX855_GP (NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
0033
0034 struct vx855_gpio {
0035     struct gpio_chip gpio;
0036     spinlock_t lock;
0037     u32 io_gpi;
0038     u32 io_gpo;
0039 };
0040
0041 /* resolve a GPIx into the corresponding bit position */
0042 static inline u_int32_t gpi_i_bit(int i)
0043 {
0044     if (i < 10)
0045         return 1 << i;
0046     else
0047         return 1 << (i + 14);
0048 }
0049
0050 static inline u_int32_t gpo_o_bit(int i)
0051 {
0052     if (i < 11)
0053         return 1 << i;
0054     else
0055         return 1 << (i + 14);
0056 }
0057
0058 static inline u_int32_t gpio_i_bit(int i)
0059 {
0060     if (i < 14)
0061         return 1 << (i + 10);
0062     else
0063         return 1 << (i + 14);
0064 }
0065
0066 static inline u_int32_t gpio_o_bit(int i)
0067 {
0068     if (i < 14)
0069         return 1 << (i + 11);
0070     else
0071         return 1 << (i + 13);
0072 }
0073
0074 /* Mapping between numeric GPIO ID and the actual GPIO hardware numbering:
0075  * 0..13    GPI 0..13
0076  * 14..26   GPO 0..12
0077  * 27..41   GPIO 0..14
0078  */
0079
0080 static int vx855gpio_direction_input(struct gpio_chip *gpio,
0081                      unsigned int nr)
0082 {
0083     struct vx855_gpio *vg = gpiochip_get_data(gpio);
0084     unsigned long flags;
0085     u_int32_t reg_out;
0086
0087     /* Real GPI bits are always in input direction */
0088     if (nr < NR_VX855_GPI)
0089         return 0;
0090
0091     /* Real GPO bits cannot be put in output direction */
0092     if (nr < NR_VX855_GPInO)
0093         return -EINVAL;
0094
0095     /* Open Drain GPIO have to be set to one */
0096     spin_lock_irqsave(&vg->lock, flags);
0097     reg_out = inl(vg->io_gpo);
0098     reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
0099     outl(reg_out, vg->io_gpo);
0100     spin_unlock_irqrestore(&vg->lock, flags);
0101
0102     return 0;
0103 }
0104
0105 static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
0106 {
0107     struct vx855_gpio *vg = gpiochip_get_data(gpio);
0108     u_int32_t reg_in;
0109     int ret = 0;
0110
0111     if (nr < NR_VX855_GPI) {
0112         reg_in = inl(vg->io_gpi);
0113         if (reg_in & gpi_i_bit(nr))
0114             ret = 1;
0115     } else if (nr < NR_VX855_GPInO) {
0116         /* GPO don't have an input bit, we need to read it
0117          * back from the output register */
0118         reg_in = inl(vg->io_gpo);
0119         if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
0120             ret = 1;
0121     } else {
0122         reg_in = inl(vg->io_gpi);
0123         if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
0124             ret = 1;
0125     }
0126
0127     return ret;
0128 }
0129
0130 static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
0131               int val)
0132 {
0133     struct vx855_gpio *vg = gpiochip_get_data(gpio);
0134     unsigned long flags;
0135     u_int32_t reg_out;
0136
0137     /* True GPI cannot be switched to output mode */
0138     if (nr < NR_VX855_GPI)
0139         return;
0140
0141     spin_lock_irqsave(&vg->lock, flags);
0142     reg_out = inl(vg->io_gpo);
0143     if (nr < NR_VX855_GPInO) {
0144         if (val)
0145             reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
0146         else
0147             reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
0148     } else {
0149         if (val)
0150             reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
0151         else
0152             reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
0153     }
0154     outl(reg_out, vg->io_gpo);
0155     spin_unlock_irqrestore(&vg->lock, flags);
0156 }
0157
0158 static int vx855gpio_direction_output(struct gpio_chip *gpio,
0159                       unsigned int nr, int val)
0160 {
0161     /* True GPI cannot be switched to output mode */
0162     if (nr < NR_VX855_GPI)
0163         return -EINVAL;
0164
0165     /* True GPO don't need to be switched to output mode,
0166      * and GPIO are open-drain, i.e. also need no switching,
0167      * so all we do is set the level */
0168     vx855gpio_set(gpio, nr, val);
0169
0170     return 0;
0171 }
0172
0173 static int vx855gpio_set_config(struct gpio_chip *gpio, unsigned int nr,
0174                 unsigned long config)
0175 {
0176     enum pin_config_param param = pinconf_to_config_param(config);
0177
0178     /* The GPI cannot be single-ended */
0179     if (nr < NR_VX855_GPI)
0180         return -EINVAL;
0181
0182     /* The GPO's are push-pull */
0183     if (nr < NR_VX855_GPInO) {
0184         if (param != PIN_CONFIG_DRIVE_PUSH_PULL)
0185             return -ENOTSUPP;
0186         return 0;
0187     }
0188
0189     /* The GPIO's are open drain */
0190     if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN)
0191         return -ENOTSUPP;
0192
0193     return 0;
0194 }
0195
0196 static const char *vx855gpio_names[NR_VX855_GP] = {
0197     "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
0198     "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
0199     "VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
0200     "VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
0201     "VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
0202     "VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
0203     "VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
0204     "VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
0205     "VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
0206     "VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
0207 };
0208
0209 static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
0210 {
0211     struct gpio_chip *c = &vg->gpio;
0212
0213     c->label = "VX855 South Bridge";
0214     c->owner = THIS_MODULE;
0215     c->direction_input = vx855gpio_direction_input;
0216     c->direction_output = vx855gpio_direction_output;
0217     c->get = vx855gpio_get;
0218     c->set = vx855gpio_set;
0219     c->set_config = vx855gpio_set_config;
0220     c->dbg_show = NULL;
0221     c->base = 0;
0222     c->ngpio = NR_VX855_GP;
0223     c->can_sleep = false;
0224     c->names = vx855gpio_names;
0225 }
0226
0227 /* This platform device is ordinarily registered by the vx855 mfd driver */
0228 static int vx855gpio_probe(struct platform_device *pdev)
0229 {
0230     struct resource *res_gpi;
0231     struct resource *res_gpo;
0232     struct vx855_gpio *vg;
0233
0234     res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
0235     res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
0236     if (!res_gpi || !res_gpo)
0237         return -EBUSY;
0238
0239     vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL);
0240     if (!vg)
0241         return -ENOMEM;
0242
0243     platform_set_drvdata(pdev, vg);
0244
0245     dev_info(&pdev->dev, "found VX855 GPIO controller\n");
0246     vg->io_gpi = res_gpi->start;
0247     vg->io_gpo = res_gpo->start;
0248     spin_lock_init(&vg->lock);
0249
0250     /*
0251      * A single byte is used to control various GPIO ports on the VX855,
0252      * and in the case of the OLPC XO-1.5, some of those ports are used
0253      * for switches that are interpreted and exposed through ACPI. ACPI
0254      * will have reserved the region, so our own reservation will not
0255      * succeed. Ignore and continue.
0256      */
0257
0258     if (!devm_request_region(&pdev->dev, res_gpi->start,
0259                  resource_size(res_gpi), MODULE_NAME "_gpi"))
0260         dev_warn(&pdev->dev,
0261             "GPI I/O resource busy, probably claimed by ACPI\n");
0262
0263     if (!devm_request_region(&pdev->dev, res_gpo->start,
0264                  resource_size(res_gpo), MODULE_NAME "_gpo"))
0265         dev_warn(&pdev->dev,
0266             "GPO I/O resource busy, probably claimed by ACPI\n");
0267
0268     vx855gpio_gpio_setup(vg);
0269
0270     return devm_gpiochip_add_data(&pdev->dev, &vg->gpio, vg);
0271 }
0272
0273 static struct platform_driver vx855gpio_driver = {
0274     .driver = {
0275         .name   = MODULE_NAME,
0276     },
0277     .probe      = vx855gpio_probe,
0278 };
0279
0280 module_platform_driver(vx855gpio_driver);
0281
0282 MODULE_LICENSE("GPL");
0283 MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
0284 MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
0285 MODULE_ALIAS("platform:vx855_gpio");