drivers/gpio/gpio-pisosr.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
0004  *  Andrew F. Davis <afd@ti.com>
0005  */
0006
0007 #include <linux/bitmap.h>
0008 #include <linux/bitops.h>
0009 #include <linux/delay.h>
0010 #include <linux/gpio/consumer.h>
0011 #include <linux/gpio/driver.h>
0012 #include <linux/module.h>
0013 #include <linux/mutex.h>
0014 #include <linux/spi/spi.h>
0015
0016 #define DEFAULT_NGPIO 8
0017
0018 /**
0019  * struct pisosr_gpio - GPIO driver data
0020  * @chip: GPIO controller chip
0021  * @spi: SPI device pointer
0022  * @buffer: Buffer for device reads
0023  * @buffer_size: Size of buffer
0024  * @load_gpio: GPIO pin used to load input into device
0025  * @lock: Protects read sequences
0026  */
0027 struct pisosr_gpio {
0028     struct gpio_chip chip;
0029     struct spi_device *spi;
0030     u8 *buffer;
0031     size_t buffer_size;
0032     struct gpio_desc *load_gpio;
0033     struct mutex lock;
0034 };
0035
0036 static int pisosr_gpio_refresh(struct pisosr_gpio *gpio)
0037 {
0038     int ret;
0039
0040     mutex_lock(&gpio->lock);
0041
0042     if (gpio->load_gpio) {
0043         gpiod_set_value_cansleep(gpio->load_gpio, 1);
0044         udelay(1); /* registers load time (~10ns) */
0045         gpiod_set_value_cansleep(gpio->load_gpio, 0);
0046         udelay(1); /* registers recovery time (~5ns) */
0047     }
0048
0049     ret = spi_read(gpio->spi, gpio->buffer, gpio->buffer_size);
0050
0051     mutex_unlock(&gpio->lock);
0052
0053     return ret;
0054 }
0055
0056 static int pisosr_gpio_get_direction(struct gpio_chip *chip,
0057                      unsigned offset)
0058 {
0059     /* This device always input */
0060     return GPIO_LINE_DIRECTION_IN;
0061 }
0062
0063 static int pisosr_gpio_direction_input(struct gpio_chip *chip,
0064                        unsigned offset)
0065 {
0066     /* This device always input */
0067     return 0;
0068 }
0069
0070 static int pisosr_gpio_direction_output(struct gpio_chip *chip,
0071                     unsigned offset, int value)
0072 {
0073     /* This device is input only */
0074     return -EINVAL;
0075 }
0076
0077 static int pisosr_gpio_get(struct gpio_chip *chip, unsigned offset)
0078 {
0079     struct pisosr_gpio *gpio = gpiochip_get_data(chip);
0080
0081     /* Refresh may not always be needed */
0082     pisosr_gpio_refresh(gpio);
0083
0084     return (gpio->buffer[offset / 8] >> (offset % 8)) & 0x1;
0085 }
0086
0087 static int pisosr_gpio_get_multiple(struct gpio_chip *chip,
0088                     unsigned long *mask, unsigned long *bits)
0089 {
0090     struct pisosr_gpio *gpio = gpiochip_get_data(chip);
0091     unsigned long offset;
0092     unsigned long gpio_mask;
0093     unsigned long buffer_state;
0094
0095     pisosr_gpio_refresh(gpio);
0096
0097     bitmap_zero(bits, chip->ngpio);
0098     for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) {
0099         buffer_state = gpio->buffer[offset / 8] & gpio_mask;
0100         bitmap_set_value8(bits, buffer_state, offset);
0101     }
0102
0103     return 0;
0104 }
0105
0106 static const struct gpio_chip template_chip = {
0107     .label          = "pisosr-gpio",
0108     .owner          = THIS_MODULE,
0109     .get_direction      = pisosr_gpio_get_direction,
0110     .direction_input    = pisosr_gpio_direction_input,
0111     .direction_output   = pisosr_gpio_direction_output,
0112     .get            = pisosr_gpio_get,
0113     .get_multiple       = pisosr_gpio_get_multiple,
0114     .base           = -1,
0115     .ngpio          = DEFAULT_NGPIO,
0116     .can_sleep      = true,
0117 };
0118
0119 static int pisosr_gpio_probe(struct spi_device *spi)
0120 {
0121     struct device *dev = &spi->dev;
0122     struct pisosr_gpio *gpio;
0123     int ret;
0124
0125     gpio = devm_kzalloc(dev, sizeof(*gpio), GFP_KERNEL);
0126     if (!gpio)
0127         return -ENOMEM;
0128
0129     spi_set_drvdata(spi, gpio);
0130
0131     gpio->chip = template_chip;
0132     gpio->chip.parent = dev;
0133     of_property_read_u16(dev->of_node, "ngpios", &gpio->chip.ngpio);
0134
0135     gpio->spi = spi;
0136
0137     gpio->buffer_size = DIV_ROUND_UP(gpio->chip.ngpio, 8);
0138     gpio->buffer = devm_kzalloc(dev, gpio->buffer_size, GFP_KERNEL);
0139     if (!gpio->buffer)
0140         return -ENOMEM;
0141
0142     gpio->load_gpio = devm_gpiod_get_optional(dev, "load", GPIOD_OUT_LOW);
0143     if (IS_ERR(gpio->load_gpio))
0144         return dev_err_probe(dev, PTR_ERR(gpio->load_gpio),
0145                      "Unable to allocate load GPIO\n");
0146
0147     mutex_init(&gpio->lock);
0148
0149     ret = gpiochip_add_data(&gpio->chip, gpio);
0150     if (ret < 0) {
0151         dev_err(dev, "Unable to register gpiochip\n");
0152         return ret;
0153     }
0154
0155     return 0;
0156 }
0157
0158 static void pisosr_gpio_remove(struct spi_device *spi)
0159 {
0160     struct pisosr_gpio *gpio = spi_get_drvdata(spi);
0161
0162     gpiochip_remove(&gpio->chip);
0163
0164     mutex_destroy(&gpio->lock);
0165 }
0166
0167 static const struct spi_device_id pisosr_gpio_id_table[] = {
0168     { "pisosr-gpio", },
0169     { /* sentinel */ }
0170 };
0171 MODULE_DEVICE_TABLE(spi, pisosr_gpio_id_table);
0172
0173 static const struct of_device_id pisosr_gpio_of_match_table[] = {
0174     { .compatible = "pisosr-gpio", },
0175     { /* sentinel */ }
0176 };
0177 MODULE_DEVICE_TABLE(of, pisosr_gpio_of_match_table);
0178
0179 static struct spi_driver pisosr_gpio_driver = {
0180     .driver = {
0181         .name = "pisosr-gpio",
0182         .of_match_table = pisosr_gpio_of_match_table,
0183     },
0184     .probe = pisosr_gpio_probe,
0185     .remove = pisosr_gpio_remove,
0186     .id_table = pisosr_gpio_id_table,
0187 };
0188 module_spi_driver(pisosr_gpio_driver);
0189
0190 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
0191 MODULE_DESCRIPTION("SPI Compatible PISO Shift Register GPIO Driver");
0192 MODULE_LICENSE("GPL v2");