drivers/gpio/gpio-pcf857x.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
0004  *
0005  * Copyright (C) 2007 David Brownell
0006  */
0007
0008 #include <linux/gpio/driver.h>
0009 #include <linux/i2c.h>
0010 #include <linux/platform_data/pcf857x.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/irq.h>
0013 #include <linux/irqdomain.h>
0014 #include <linux/kernel.h>
0015 #include <linux/module.h>
0016 #include <linux/of.h>
0017 #include <linux/of_device.h>
0018 #include <linux/slab.h>
0019 #include <linux/spinlock.h>
0020
0021
0022 static const struct i2c_device_id pcf857x_id[] = {
0023     { "pcf8574", 8 },
0024     { "pcf8574a", 8 },
0025     { "pca8574", 8 },
0026     { "pca9670", 8 },
0027     { "pca9672", 8 },
0028     { "pca9674", 8 },
0029     { "pcf8575", 16 },
0030     { "pca8575", 16 },
0031     { "pca9671", 16 },
0032     { "pca9673", 16 },
0033     { "pca9675", 16 },
0034     { "max7328", 8 },
0035     { "max7329", 8 },
0036     { }
0037 };
0038 MODULE_DEVICE_TABLE(i2c, pcf857x_id);
0039
0040 #ifdef CONFIG_OF
0041 static const struct of_device_id pcf857x_of_table[] = {
0042     { .compatible = "nxp,pcf8574" },
0043     { .compatible = "nxp,pcf8574a" },
0044     { .compatible = "nxp,pca8574" },
0045     { .compatible = "nxp,pca9670" },
0046     { .compatible = "nxp,pca9672" },
0047     { .compatible = "nxp,pca9674" },
0048     { .compatible = "nxp,pcf8575" },
0049     { .compatible = "nxp,pca8575" },
0050     { .compatible = "nxp,pca9671" },
0051     { .compatible = "nxp,pca9673" },
0052     { .compatible = "nxp,pca9675" },
0053     { .compatible = "maxim,max7328" },
0054     { .compatible = "maxim,max7329" },
0055     { }
0056 };
0057 MODULE_DEVICE_TABLE(of, pcf857x_of_table);
0058 #endif
0059
0060 /*
0061  * The pcf857x, pca857x, and pca967x chips only expose one read and one
0062  * write register.  Writing a "one" bit (to match the reset state) lets
0063  * that pin be used as an input; it's not an open-drain model, but acts
0064  * a bit like one.  This is described as "quasi-bidirectional"; read the
0065  * chip documentation for details.
0066  *
0067  * Many other I2C GPIO expander chips (like the pca953x models) have
0068  * more complex register models and more conventional circuitry using
0069  * push/pull drivers.  They often use the same 0x20..0x27 addresses as
0070  * pcf857x parts, making the "legacy" I2C driver model problematic.
0071  */
0072 struct pcf857x {
0073     struct gpio_chip    chip;
0074     struct i2c_client   *client;
0075     struct mutex        lock;       /* protect 'out' */
0076     unsigned        out;        /* software latch */
0077     unsigned        status;     /* current status */
0078     unsigned        irq_enabled;    /* enabled irqs */
0079
0080     int (*write)(struct i2c_client *client, unsigned data);
0081     int (*read)(struct i2c_client *client);
0082 };
0083
0084 /*-------------------------------------------------------------------------*/
0085
0086 /* Talk to 8-bit I/O expander */
0087
0088 static int i2c_write_le8(struct i2c_client *client, unsigned data)
0089 {
0090     return i2c_smbus_write_byte(client, data);
0091 }
0092
0093 static int i2c_read_le8(struct i2c_client *client)
0094 {
0095     return (int)i2c_smbus_read_byte(client);
0096 }
0097
0098 /* Talk to 16-bit I/O expander */
0099
0100 static int i2c_write_le16(struct i2c_client *client, unsigned word)
0101 {
0102     u8 buf[2] = { word & 0xff, word >> 8, };
0103     int status;
0104
0105     status = i2c_master_send(client, buf, 2);
0106     return (status < 0) ? status : 0;
0107 }
0108
0109 static int i2c_read_le16(struct i2c_client *client)
0110 {
0111     u8 buf[2];
0112     int status;
0113
0114     status = i2c_master_recv(client, buf, 2);
0115     if (status < 0)
0116         return status;
0117     return (buf[1] << 8) | buf[0];
0118 }
0119
0120 /*-------------------------------------------------------------------------*/
0121
0122 static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
0123 {
0124     struct pcf857x  *gpio = gpiochip_get_data(chip);
0125     int     status;
0126
0127     mutex_lock(&gpio->lock);
0128     gpio->out |= (1 << offset);
0129     status = gpio->write(gpio->client, gpio->out);
0130     mutex_unlock(&gpio->lock);
0131
0132     return status;
0133 }
0134
0135 static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
0136 {
0137     struct pcf857x  *gpio = gpiochip_get_data(chip);
0138     int     value;
0139
0140     value = gpio->read(gpio->client);
0141     return (value < 0) ? value : !!(value & (1 << offset));
0142 }
0143
0144 static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
0145 {
0146     struct pcf857x  *gpio = gpiochip_get_data(chip);
0147     unsigned    bit = 1 << offset;
0148     int     status;
0149
0150     mutex_lock(&gpio->lock);
0151     if (value)
0152         gpio->out |= bit;
0153     else
0154         gpio->out &= ~bit;
0155     status = gpio->write(gpio->client, gpio->out);
0156     mutex_unlock(&gpio->lock);
0157
0158     return status;
0159 }
0160
0161 static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
0162 {
0163     pcf857x_output(chip, offset, value);
0164 }
0165
0166 /*-------------------------------------------------------------------------*/
0167
0168 static irqreturn_t pcf857x_irq(int irq, void *data)
0169 {
0170     struct pcf857x  *gpio = data;
0171     unsigned long change, i, status;
0172
0173     status = gpio->read(gpio->client);
0174
0175     /*
0176      * call the interrupt handler iff gpio is used as
0177      * interrupt source, just to avoid bad irqs
0178      */
0179     mutex_lock(&gpio->lock);
0180     change = (gpio->status ^ status) & gpio->irq_enabled;
0181     gpio->status = status;
0182     mutex_unlock(&gpio->lock);
0183
0184     for_each_set_bit(i, &change, gpio->chip.ngpio)
0185         handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
0186
0187     return IRQ_HANDLED;
0188 }
0189
0190 /*
0191  * NOP functions
0192  */
0193 static void noop(struct irq_data *data) { }
0194
0195 static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
0196 {
0197     struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
0198
0199     return irq_set_irq_wake(gpio->client->irq, on);
0200 }
0201
0202 static void pcf857x_irq_enable(struct irq_data *data)
0203 {
0204     struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
0205     irq_hw_number_t hwirq = irqd_to_hwirq(data);
0206
0207     gpiochip_enable_irq(&gpio->chip, hwirq);
0208     gpio->irq_enabled |= (1 << hwirq);
0209 }
0210
0211 static void pcf857x_irq_disable(struct irq_data *data)
0212 {
0213     struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
0214     irq_hw_number_t hwirq = irqd_to_hwirq(data);
0215
0216     gpio->irq_enabled &= ~(1 << hwirq);
0217     gpiochip_disable_irq(&gpio->chip, hwirq);
0218 }
0219
0220 static void pcf857x_irq_bus_lock(struct irq_data *data)
0221 {
0222     struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
0223
0224     mutex_lock(&gpio->lock);
0225 }
0226
0227 static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
0228 {
0229     struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
0230
0231     mutex_unlock(&gpio->lock);
0232 }
0233
0234 static const struct irq_chip pcf857x_irq_chip = {
0235     .name           = "pcf857x",
0236     .irq_enable     = pcf857x_irq_enable,
0237     .irq_disable        = pcf857x_irq_disable,
0238     .irq_ack        = noop,
0239     .irq_mask       = noop,
0240     .irq_unmask     = noop,
0241     .irq_set_wake       = pcf857x_irq_set_wake,
0242     .irq_bus_lock       = pcf857x_irq_bus_lock,
0243     .irq_bus_sync_unlock    = pcf857x_irq_bus_sync_unlock,
0244     .flags          = IRQCHIP_IMMUTABLE,
0245     GPIOCHIP_IRQ_RESOURCE_HELPERS,
0246 };
0247
0248 /*-------------------------------------------------------------------------*/
0249
0250 static int pcf857x_probe(struct i2c_client *client,
0251              const struct i2c_device_id *id)
0252 {
0253     struct pcf857x_platform_data    *pdata = dev_get_platdata(&client->dev);
0254     struct device_node      *np = client->dev.of_node;
0255     struct pcf857x          *gpio;
0256     unsigned int            n_latch = 0;
0257     int             status;
0258
0259     if (IS_ENABLED(CONFIG_OF) && np)
0260         of_property_read_u32(np, "lines-initial-states", &n_latch);
0261     else if (pdata)
0262         n_latch = pdata->n_latch;
0263     else
0264         dev_dbg(&client->dev, "no platform data\n");
0265
0266     /* Allocate, initialize, and register this gpio_chip. */
0267     gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
0268     if (!gpio)
0269         return -ENOMEM;
0270
0271     mutex_init(&gpio->lock);
0272
0273     gpio->chip.base         = pdata ? pdata->gpio_base : -1;
0274     gpio->chip.can_sleep        = true;
0275     gpio->chip.parent       = &client->dev;
0276     gpio->chip.owner        = THIS_MODULE;
0277     gpio->chip.get          = pcf857x_get;
0278     gpio->chip.set          = pcf857x_set;
0279     gpio->chip.direction_input  = pcf857x_input;
0280     gpio->chip.direction_output = pcf857x_output;
0281     gpio->chip.ngpio        = id->driver_data;
0282
0283     /* NOTE:  the OnSemi jlc1562b is also largely compatible with
0284      * these parts, notably for output.  It has a low-resolution
0285      * DAC instead of pin change IRQs; and its inputs can be the
0286      * result of comparators.
0287      */
0288
0289     /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
0290      * 9670, 9672, 9764, and 9764a use quite a variety.
0291      *
0292      * NOTE: we don't distinguish here between *4 and *4a parts.
0293      */
0294     if (gpio->chip.ngpio == 8) {
0295         gpio->write = i2c_write_le8;
0296         gpio->read  = i2c_read_le8;
0297
0298         if (!i2c_check_functionality(client->adapter,
0299                 I2C_FUNC_SMBUS_BYTE))
0300             status = -EIO;
0301
0302         /* fail if there's no chip present */
0303         else
0304             status = i2c_smbus_read_byte(client);
0305
0306     /* '75/'75c addresses are 0x20..0x27, just like the '74;
0307      * the '75c doesn't have a current source pulling high.
0308      * 9671, 9673, and 9765 use quite a variety of addresses.
0309      *
0310      * NOTE: we don't distinguish here between '75 and '75c parts.
0311      */
0312     } else if (gpio->chip.ngpio == 16) {
0313         gpio->write = i2c_write_le16;
0314         gpio->read  = i2c_read_le16;
0315
0316         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
0317             status = -EIO;
0318
0319         /* fail if there's no chip present */
0320         else
0321             status = i2c_read_le16(client);
0322
0323     } else {
0324         dev_dbg(&client->dev, "unsupported number of gpios\n");
0325         status = -EINVAL;
0326     }
0327
0328     if (status < 0)
0329         goto fail;
0330
0331     gpio->chip.label = client->name;
0332
0333     gpio->client = client;
0334     i2c_set_clientdata(client, gpio);
0335
0336     /* NOTE:  these chips have strange "quasi-bidirectional" I/O pins.
0337      * We can't actually know whether a pin is configured (a) as output
0338      * and driving the signal low, or (b) as input and reporting a low
0339      * value ... without knowing the last value written since the chip
0340      * came out of reset (if any).  We can't read the latched output.
0341      *
0342      * In short, the only reliable solution for setting up pin direction
0343      * is to do it explicitly.  The setup() method can do that, but it
0344      * may cause transient glitching since it can't know the last value
0345      * written (some pins may need to be driven low).
0346      *
0347      * Using n_latch avoids that trouble.  When left initialized to zero,
0348      * our software copy of the "latch" then matches the chip's all-ones
0349      * reset state.  Otherwise it flags pins to be driven low.
0350      */
0351     gpio->out = ~n_latch;
0352     gpio->status = gpio->read(gpio->client);
0353
0354     /* Enable irqchip if we have an interrupt */
0355     if (client->irq) {
0356         struct gpio_irq_chip *girq;
0357
0358         status = devm_request_threaded_irq(&client->dev, client->irq,
0359                     NULL, pcf857x_irq, IRQF_ONESHOT |
0360                     IRQF_TRIGGER_FALLING | IRQF_SHARED,
0361                     dev_name(&client->dev), gpio);
0362         if (status)
0363             goto fail;
0364
0365         girq = &gpio->chip.irq;
0366         gpio_irq_chip_set_chip(girq, &pcf857x_irq_chip);
0367         /* This will let us handle the parent IRQ in the driver */
0368         girq->parent_handler = NULL;
0369         girq->num_parents = 0;
0370         girq->parents = NULL;
0371         girq->default_type = IRQ_TYPE_NONE;
0372         girq->handler = handle_level_irq;
0373         girq->threaded = true;
0374     }
0375
0376     status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
0377     if (status < 0)
0378         goto fail;
0379
0380     /* Let platform code set up the GPIOs and their users.
0381      * Now is the first time anyone could use them.
0382      */
0383     if (pdata && pdata->setup) {
0384         status = pdata->setup(client,
0385                 gpio->chip.base, gpio->chip.ngpio,
0386                 pdata->context);
0387         if (status < 0)
0388             dev_warn(&client->dev, "setup --> %d\n", status);
0389     }
0390
0391     dev_info(&client->dev, "probed\n");
0392
0393     return 0;
0394
0395 fail:
0396     dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
0397         client->name);
0398
0399     return status;
0400 }
0401
0402 static int pcf857x_remove(struct i2c_client *client)
0403 {
0404     struct pcf857x_platform_data    *pdata = dev_get_platdata(&client->dev);
0405     struct pcf857x          *gpio = i2c_get_clientdata(client);
0406
0407     if (pdata && pdata->teardown)
0408         pdata->teardown(client, gpio->chip.base, gpio->chip.ngpio,
0409                 pdata->context);
0410
0411     return 0;
0412 }
0413
0414 static void pcf857x_shutdown(struct i2c_client *client)
0415 {
0416     struct pcf857x *gpio = i2c_get_clientdata(client);
0417
0418     /* Drive all the I/O lines high */
0419     gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1);
0420 }
0421
0422 static struct i2c_driver pcf857x_driver = {
0423     .driver = {
0424         .name   = "pcf857x",
0425         .of_match_table = of_match_ptr(pcf857x_of_table),
0426     },
0427     .probe  = pcf857x_probe,
0428     .remove = pcf857x_remove,
0429     .shutdown = pcf857x_shutdown,
0430     .id_table = pcf857x_id,
0431 };
0432
0433 static int __init pcf857x_init(void)
0434 {
0435     return i2c_add_driver(&pcf857x_driver);
0436 }
0437 /* register after i2c postcore initcall and before
0438  * subsys initcalls that may rely on these GPIOs
0439  */
0440 subsys_initcall(pcf857x_init);
0441
0442 static void __exit pcf857x_exit(void)
0443 {
0444     i2c_del_driver(&pcf857x_driver);
0445 }
0446 module_exit(pcf857x_exit);
0447
0448 MODULE_LICENSE("GPL");
0449 MODULE_AUTHOR("David Brownell");