drivers/gpio/gpio-max3191x.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * gpio-max3191x.c - GPIO driver for Maxim MAX3191x industrial serializer
0004  *
0005  * Copyright (C) 2017 KUNBUS GmbH
0006  *
0007  * The MAX3191x makes 8 digital 24V inputs available via SPI.
0008  * Multiple chips can be daisy-chained, the spec does not impose
0009  * a limit on the number of chips and neither does this driver.
0010  *
0011  * Either of two modes is selectable: In 8-bit mode, only the state
0012  * of the inputs is clocked out to achieve high readout speeds;
0013  * In 16-bit mode, an additional status byte is clocked out with
0014  * a CRC and indicator bits for undervoltage and overtemperature.
0015  * The driver returns an error instead of potentially bogus data
0016  * if any of these fault conditions occur.  However it does allow
0017  * readout of non-faulting chips in the same daisy-chain.
0018  *
0019  * MAX3191x supports four debounce settings and the driver is
0020  * capable of configuring these differently for each chip in the
0021  * daisy-chain.
0022  *
0023  * If the chips are hardwired to 8-bit mode ("modesel" pulled high),
0024  * gpio-pisosr.c can be used alternatively to this driver.
0025  *
0026  * https://datasheets.maximintegrated.com/en/ds/MAX31910.pdf
0027  * https://datasheets.maximintegrated.com/en/ds/MAX31911.pdf
0028  * https://datasheets.maximintegrated.com/en/ds/MAX31912.pdf
0029  * https://datasheets.maximintegrated.com/en/ds/MAX31913.pdf
0030  * https://datasheets.maximintegrated.com/en/ds/MAX31953-MAX31963.pdf
0031  */
0032
0033 #include <linux/bitmap.h>
0034 #include <linux/bitops.h>
0035 #include <linux/crc8.h>
0036 #include <linux/gpio/consumer.h>
0037 #include <linux/gpio/driver.h>
0038 #include <linux/module.h>
0039 #include <linux/spi/spi.h>
0040
0041 enum max3191x_mode {
0042     STATUS_BYTE_ENABLED,
0043     STATUS_BYTE_DISABLED,
0044 };
0045
0046 /**
0047  * struct max3191x_chip - max3191x daisy-chain
0048  * @gpio: GPIO controller struct
0049  * @lock: protects read sequences
0050  * @nchips: number of chips in the daisy-chain
0051  * @mode: current mode, 0 for 16-bit, 1 for 8-bit;
0052  *  for simplicity, all chips in the daisy-chain are assumed
0053  *  to use the same mode
0054  * @modesel_pins: GPIO pins to configure modesel of each chip
0055  * @fault_pins: GPIO pins to detect fault of each chip
0056  * @db0_pins: GPIO pins to configure debounce of each chip
0057  * @db1_pins: GPIO pins to configure debounce of each chip
0058  * @mesg: SPI message to perform a readout
0059  * @xfer: SPI transfer used by @mesg
0060  * @crc_error: bitmap signaling CRC error for each chip
0061  * @overtemp: bitmap signaling overtemperature alarm for each chip
0062  * @undervolt1: bitmap signaling undervoltage alarm for each chip
0063  * @undervolt2: bitmap signaling undervoltage warning for each chip
0064  * @fault: bitmap signaling assertion of @fault_pins for each chip
0065  * @ignore_uv: whether to ignore undervoltage alarms;
0066  *  set by a device property if the chips are powered through
0067  *  5VOUT instead of VCC24V, in which case they will constantly
0068  *  signal undervoltage;
0069  *  for simplicity, all chips in the daisy-chain are assumed
0070  *  to be powered the same way
0071  */
0072 struct max3191x_chip {
0073     struct gpio_chip gpio;
0074     struct mutex lock;
0075     u32 nchips;
0076     enum max3191x_mode mode;
0077     struct gpio_descs *modesel_pins;
0078     struct gpio_descs *fault_pins;
0079     struct gpio_descs *db0_pins;
0080     struct gpio_descs *db1_pins;
0081     struct spi_message mesg;
0082     struct spi_transfer xfer;
0083     unsigned long *crc_error;
0084     unsigned long *overtemp;
0085     unsigned long *undervolt1;
0086     unsigned long *undervolt2;
0087     unsigned long *fault;
0088     bool ignore_uv;
0089 };
0090
0091 #define MAX3191X_NGPIO 8
0092 #define MAX3191X_CRC8_POLYNOMIAL 0xa8 /* (x^5) + x^4 + x^2 + x^0 */
0093
0094 DECLARE_CRC8_TABLE(max3191x_crc8);
0095
0096 static int max3191x_get_direction(struct gpio_chip *gpio, unsigned int offset)
0097 {
0098     return GPIO_LINE_DIRECTION_IN; /* always in */
0099 }
0100
0101 static int max3191x_direction_input(struct gpio_chip *gpio, unsigned int offset)
0102 {
0103     return 0;
0104 }
0105
0106 static int max3191x_direction_output(struct gpio_chip *gpio,
0107                      unsigned int offset, int value)
0108 {
0109     return -EINVAL;
0110 }
0111
0112 static void max3191x_set(struct gpio_chip *gpio, unsigned int offset, int value)
0113 { }
0114
0115 static void max3191x_set_multiple(struct gpio_chip *gpio, unsigned long *mask,
0116                   unsigned long *bits)
0117 { }
0118
0119 static unsigned int max3191x_wordlen(struct max3191x_chip *max3191x)
0120 {
0121     return max3191x->mode == STATUS_BYTE_ENABLED ? 2 : 1;
0122 }
0123
0124 static int max3191x_readout_locked(struct max3191x_chip *max3191x)
0125 {
0126     struct device *dev = max3191x->gpio.parent;
0127     struct spi_device *spi = to_spi_device(dev);
0128     int val, i, ot = 0, uv1 = 0;
0129
0130     val = spi_sync(spi, &max3191x->mesg);
0131     if (val) {
0132         dev_err_ratelimited(dev, "SPI receive error %d\n", val);
0133         return val;
0134     }
0135
0136     for (i = 0; i < max3191x->nchips; i++) {
0137         if (max3191x->mode == STATUS_BYTE_ENABLED) {
0138             u8 in     = ((u8 *)max3191x->xfer.rx_buf)[i * 2];
0139             u8 status = ((u8 *)max3191x->xfer.rx_buf)[i * 2 + 1];
0140
0141             val = (status & 0xf8) != crc8(max3191x_crc8, &in, 1, 0);
0142             __assign_bit(i, max3191x->crc_error, val);
0143             if (val)
0144                 dev_err_ratelimited(dev,
0145                     "chip %d: CRC error\n", i);
0146
0147             ot  = (status >> 1) & 1;
0148             __assign_bit(i, max3191x->overtemp, ot);
0149             if (ot)
0150                 dev_err_ratelimited(dev,
0151                     "chip %d: overtemperature\n", i);
0152
0153             if (!max3191x->ignore_uv) {
0154                 uv1 = !((status >> 2) & 1);
0155                 __assign_bit(i, max3191x->undervolt1, uv1);
0156                 if (uv1)
0157                     dev_err_ratelimited(dev,
0158                         "chip %d: undervoltage\n", i);
0159
0160                 val = !(status & 1);
0161                 __assign_bit(i, max3191x->undervolt2, val);
0162                 if (val && !uv1)
0163                     dev_warn_ratelimited(dev,
0164                         "chip %d: voltage warn\n", i);
0165             }
0166         }
0167
0168         if (max3191x->fault_pins && !max3191x->ignore_uv) {
0169             /* fault pin shared by all chips or per chip */
0170             struct gpio_desc *fault_pin =
0171                 (max3191x->fault_pins->ndescs == 1)
0172                     ? max3191x->fault_pins->desc[0]
0173                     : max3191x->fault_pins->desc[i];
0174
0175             val = gpiod_get_value_cansleep(fault_pin);
0176             if (val < 0) {
0177                 dev_err_ratelimited(dev,
0178                     "GPIO read error %d\n", val);
0179                 return val;
0180             }
0181             __assign_bit(i, max3191x->fault, val);
0182             if (val && !uv1 && !ot)
0183                 dev_err_ratelimited(dev,
0184                     "chip %d: fault\n", i);
0185         }
0186     }
0187
0188     return 0;
0189 }
0190
0191 static bool max3191x_chip_is_faulting(struct max3191x_chip *max3191x,
0192                       unsigned int chipnum)
0193 {
0194     /* without status byte the only diagnostic is the fault pin */
0195     if (!max3191x->ignore_uv && test_bit(chipnum, max3191x->fault))
0196         return true;
0197
0198     if (max3191x->mode == STATUS_BYTE_DISABLED)
0199         return false;
0200
0201     return test_bit(chipnum, max3191x->crc_error) ||
0202            test_bit(chipnum, max3191x->overtemp)  ||
0203            (!max3191x->ignore_uv &&
0204         test_bit(chipnum, max3191x->undervolt1));
0205 }
0206
0207 static int max3191x_get(struct gpio_chip *gpio, unsigned int offset)
0208 {
0209     struct max3191x_chip *max3191x = gpiochip_get_data(gpio);
0210     int ret, chipnum, wordlen = max3191x_wordlen(max3191x);
0211     u8 in;
0212
0213     mutex_lock(&max3191x->lock);
0214     ret = max3191x_readout_locked(max3191x);
0215     if (ret)
0216         goto out_unlock;
0217
0218     chipnum = offset / MAX3191X_NGPIO;
0219     if (max3191x_chip_is_faulting(max3191x, chipnum)) {
0220         ret = -EIO;
0221         goto out_unlock;
0222     }
0223
0224     in = ((u8 *)max3191x->xfer.rx_buf)[chipnum * wordlen];
0225     ret = (in >> (offset % MAX3191X_NGPIO)) & 1;
0226
0227 out_unlock:
0228     mutex_unlock(&max3191x->lock);
0229     return ret;
0230 }
0231
0232 static int max3191x_get_multiple(struct gpio_chip *gpio, unsigned long *mask,
0233                  unsigned long *bits)
0234 {
0235     struct max3191x_chip *max3191x = gpiochip_get_data(gpio);
0236     const unsigned int wordlen = max3191x_wordlen(max3191x);
0237     int ret;
0238     unsigned long bit;
0239     unsigned long gpio_mask;
0240     unsigned long in;
0241
0242     mutex_lock(&max3191x->lock);
0243     ret = max3191x_readout_locked(max3191x);
0244     if (ret)
0245         goto out_unlock;
0246
0247     bitmap_zero(bits, gpio->ngpio);
0248     for_each_set_clump8(bit, gpio_mask, mask, gpio->ngpio) {
0249         unsigned int chipnum = bit / MAX3191X_NGPIO;
0250
0251         if (max3191x_chip_is_faulting(max3191x, chipnum)) {
0252             ret = -EIO;
0253             goto out_unlock;
0254         }
0255
0256         in = ((u8 *)max3191x->xfer.rx_buf)[chipnum * wordlen];
0257         in &= gpio_mask;
0258         bitmap_set_value8(bits, in, bit);
0259     }
0260
0261 out_unlock:
0262     mutex_unlock(&max3191x->lock);
0263     return ret;
0264 }
0265
0266 static int max3191x_set_config(struct gpio_chip *gpio, unsigned int offset,
0267                    unsigned long config)
0268 {
0269     struct max3191x_chip *max3191x = gpiochip_get_data(gpio);
0270     u32 debounce, chipnum, db0_val, db1_val;
0271
0272     if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
0273         return -ENOTSUPP;
0274
0275     if (!max3191x->db0_pins || !max3191x->db1_pins)
0276         return -EINVAL;
0277
0278     debounce = pinconf_to_config_argument(config);
0279     switch (debounce) {
0280     case 0:
0281         db0_val = 0;
0282         db1_val = 0;
0283         break;
0284     case 1 ... 25:
0285         db0_val = 0;
0286         db1_val = 1;
0287         break;
0288     case 26 ... 750:
0289         db0_val = 1;
0290         db1_val = 0;
0291         break;
0292     case 751 ... 3000:
0293         db0_val = 1;
0294         db1_val = 1;
0295         break;
0296     default:
0297         return -EINVAL;
0298     }
0299
0300     if (max3191x->db0_pins->ndescs == 1)
0301         chipnum = 0; /* all chips use the same pair of debounce pins */
0302     else
0303         chipnum = offset / MAX3191X_NGPIO; /* per chip debounce pins */
0304
0305     mutex_lock(&max3191x->lock);
0306     gpiod_set_value_cansleep(max3191x->db0_pins->desc[chipnum], db0_val);
0307     gpiod_set_value_cansleep(max3191x->db1_pins->desc[chipnum], db1_val);
0308     mutex_unlock(&max3191x->lock);
0309     return 0;
0310 }
0311
0312 static void gpiod_set_array_single_value_cansleep(unsigned int ndescs,
0313                           struct gpio_desc **desc,
0314                           struct gpio_array *info,
0315                           int value)
0316 {
0317     unsigned long *values;
0318
0319     values = bitmap_alloc(ndescs, GFP_KERNEL);
0320     if (!values)
0321         return;
0322
0323     if (value)
0324         bitmap_fill(values, ndescs);
0325     else
0326         bitmap_zero(values, ndescs);
0327
0328     gpiod_set_array_value_cansleep(ndescs, desc, info, values);
0329     bitmap_free(values);
0330 }
0331
0332 static struct gpio_descs *devm_gpiod_get_array_optional_count(
0333                 struct device *dev, const char *con_id,
0334                 enum gpiod_flags flags, unsigned int expected)
0335 {
0336     struct gpio_descs *descs;
0337     int found = gpiod_count(dev, con_id);
0338
0339     if (found == -ENOENT)
0340         return NULL;
0341
0342     if (found != expected && found != 1) {
0343         dev_err(dev, "ignoring %s-gpios: found %d, expected %u or 1\n",
0344             con_id, found, expected);
0345         return NULL;
0346     }
0347
0348     descs = devm_gpiod_get_array_optional(dev, con_id, flags);
0349
0350     if (IS_ERR(descs)) {
0351         dev_err(dev, "failed to get %s-gpios: %ld\n",
0352             con_id, PTR_ERR(descs));
0353         return NULL;
0354     }
0355
0356     return descs;
0357 }
0358
0359 static int max3191x_probe(struct spi_device *spi)
0360 {
0361     struct device *dev = &spi->dev;
0362     struct max3191x_chip *max3191x;
0363     int n, ret;
0364
0365     max3191x = devm_kzalloc(dev, sizeof(*max3191x), GFP_KERNEL);
0366     if (!max3191x)
0367         return -ENOMEM;
0368     spi_set_drvdata(spi, max3191x);
0369
0370     max3191x->nchips = 1;
0371     device_property_read_u32(dev, "#daisy-chained-devices",
0372                  &max3191x->nchips);
0373
0374     n = BITS_TO_LONGS(max3191x->nchips);
0375     max3191x->crc_error   = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
0376     max3191x->undervolt1  = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
0377     max3191x->undervolt2  = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
0378     max3191x->overtemp    = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
0379     max3191x->fault       = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
0380     max3191x->xfer.rx_buf = devm_kcalloc(dev, max3191x->nchips,
0381                                 2, GFP_KERNEL);
0382     if (!max3191x->crc_error || !max3191x->undervolt1 ||
0383         !max3191x->overtemp  || !max3191x->undervolt2 ||
0384         !max3191x->fault     || !max3191x->xfer.rx_buf)
0385         return -ENOMEM;
0386
0387     max3191x->modesel_pins = devm_gpiod_get_array_optional_count(dev,
0388                  "maxim,modesel", GPIOD_ASIS, max3191x->nchips);
0389     max3191x->fault_pins   = devm_gpiod_get_array_optional_count(dev,
0390                  "maxim,fault", GPIOD_IN, max3191x->nchips);
0391     max3191x->db0_pins     = devm_gpiod_get_array_optional_count(dev,
0392                  "maxim,db0", GPIOD_OUT_LOW, max3191x->nchips);
0393     max3191x->db1_pins     = devm_gpiod_get_array_optional_count(dev,
0394                  "maxim,db1", GPIOD_OUT_LOW, max3191x->nchips);
0395
0396     max3191x->mode = device_property_read_bool(dev, "maxim,modesel-8bit")
0397                  ? STATUS_BYTE_DISABLED : STATUS_BYTE_ENABLED;
0398     if (max3191x->modesel_pins)
0399         gpiod_set_array_single_value_cansleep(
0400                  max3191x->modesel_pins->ndescs,
0401                  max3191x->modesel_pins->desc,
0402                  max3191x->modesel_pins->info, max3191x->mode);
0403
0404     max3191x->ignore_uv = device_property_read_bool(dev,
0405                           "maxim,ignore-undervoltage");
0406
0407     if (max3191x->db0_pins && max3191x->db1_pins &&
0408         max3191x->db0_pins->ndescs != max3191x->db1_pins->ndescs) {
0409         dev_err(dev, "ignoring maxim,db*-gpios: array len mismatch\n");
0410         devm_gpiod_put_array(dev, max3191x->db0_pins);
0411         devm_gpiod_put_array(dev, max3191x->db1_pins);
0412         max3191x->db0_pins = NULL;
0413         max3191x->db1_pins = NULL;
0414     }
0415
0416     max3191x->xfer.len = max3191x->nchips * max3191x_wordlen(max3191x);
0417     spi_message_init_with_transfers(&max3191x->mesg, &max3191x->xfer, 1);
0418
0419     max3191x->gpio.label = spi->modalias;
0420     max3191x->gpio.owner = THIS_MODULE;
0421     max3191x->gpio.parent = dev;
0422     max3191x->gpio.base = -1;
0423     max3191x->gpio.ngpio = max3191x->nchips * MAX3191X_NGPIO;
0424     max3191x->gpio.can_sleep = true;
0425
0426     max3191x->gpio.get_direction = max3191x_get_direction;
0427     max3191x->gpio.direction_input = max3191x_direction_input;
0428     max3191x->gpio.direction_output = max3191x_direction_output;
0429     max3191x->gpio.set = max3191x_set;
0430     max3191x->gpio.set_multiple = max3191x_set_multiple;
0431     max3191x->gpio.get = max3191x_get;
0432     max3191x->gpio.get_multiple = max3191x_get_multiple;
0433     max3191x->gpio.set_config = max3191x_set_config;
0434
0435     mutex_init(&max3191x->lock);
0436
0437     ret = gpiochip_add_data(&max3191x->gpio, max3191x);
0438     if (ret) {
0439         mutex_destroy(&max3191x->lock);
0440         return ret;
0441     }
0442
0443     return 0;
0444 }
0445
0446 static void max3191x_remove(struct spi_device *spi)
0447 {
0448     struct max3191x_chip *max3191x = spi_get_drvdata(spi);
0449
0450     gpiochip_remove(&max3191x->gpio);
0451     mutex_destroy(&max3191x->lock);
0452 }
0453
0454 static int __init max3191x_register_driver(struct spi_driver *sdrv)
0455 {
0456     crc8_populate_msb(max3191x_crc8, MAX3191X_CRC8_POLYNOMIAL);
0457     return spi_register_driver(sdrv);
0458 }
0459
0460 #ifdef CONFIG_OF
0461 static const struct of_device_id max3191x_of_id[] = {
0462     { .compatible = "maxim,max31910" },
0463     { .compatible = "maxim,max31911" },
0464     { .compatible = "maxim,max31912" },
0465     { .compatible = "maxim,max31913" },
0466     { .compatible = "maxim,max31953" },
0467     { .compatible = "maxim,max31963" },
0468     { }
0469 };
0470 MODULE_DEVICE_TABLE(of, max3191x_of_id);
0471 #endif
0472
0473 static const struct spi_device_id max3191x_spi_id[] = {
0474     { "max31910" },
0475     { "max31911" },
0476     { "max31912" },
0477     { "max31913" },
0478     { "max31953" },
0479     { "max31963" },
0480     { }
0481 };
0482 MODULE_DEVICE_TABLE(spi, max3191x_spi_id);
0483
0484 static struct spi_driver max3191x_driver = {
0485     .driver = {
0486         .name       = "max3191x",
0487         .of_match_table = of_match_ptr(max3191x_of_id),
0488     },
0489     .probe    = max3191x_probe,
0490     .remove   = max3191x_remove,
0491     .id_table = max3191x_spi_id,
0492 };
0493 module_driver(max3191x_driver, max3191x_register_driver, spi_unregister_driver);
0494
0495 MODULE_AUTHOR("Lukas Wunner <lukas@wunner.de>");
0496 MODULE_DESCRIPTION("GPIO driver for Maxim MAX3191x industrial serializer");
0497 MODULE_LICENSE("GPL v2");