drivers/gpio/gpio-74x164.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
0004  *
0005  *  Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
0006  *  Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
0007  */
0008
0009 #include <linux/bitops.h>
0010 #include <linux/gpio/consumer.h>
0011 #include <linux/gpio/driver.h>
0012 #include <linux/module.h>
0013 #include <linux/mutex.h>
0014 #include <linux/property.h>
0015 #include <linux/slab.h>
0016 #include <linux/spi/spi.h>
0017
0018 #define GEN_74X164_NUMBER_GPIOS 8
0019
0020 struct gen_74x164_chip {
0021     struct gpio_chip    gpio_chip;
0022     struct mutex        lock;
0023     struct gpio_desc    *gpiod_oe;
0024     u32         registers;
0025     /*
0026      * Since the registers are chained, every byte sent will make
0027      * the previous byte shift to the next register in the
0028      * chain. Thus, the first byte sent will end up in the last
0029      * register at the end of the transfer. So, to have a logical
0030      * numbering, store the bytes in reverse order.
0031      */
0032     u8          buffer[];
0033 };
0034
0035 static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
0036 {
0037     return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer,
0038              chip->registers);
0039 }
0040
0041 static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
0042 {
0043     struct gen_74x164_chip *chip = gpiochip_get_data(gc);
0044     u8 bank = chip->registers - 1 - offset / 8;
0045     u8 pin = offset % 8;
0046     int ret;
0047
0048     mutex_lock(&chip->lock);
0049     ret = (chip->buffer[bank] >> pin) & 0x1;
0050     mutex_unlock(&chip->lock);
0051
0052     return ret;
0053 }
0054
0055 static void gen_74x164_set_value(struct gpio_chip *gc,
0056         unsigned offset, int val)
0057 {
0058     struct gen_74x164_chip *chip = gpiochip_get_data(gc);
0059     u8 bank = chip->registers - 1 - offset / 8;
0060     u8 pin = offset % 8;
0061
0062     mutex_lock(&chip->lock);
0063     if (val)
0064         chip->buffer[bank] |= (1 << pin);
0065     else
0066         chip->buffer[bank] &= ~(1 << pin);
0067
0068     __gen_74x164_write_config(chip);
0069     mutex_unlock(&chip->lock);
0070 }
0071
0072 static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
0073                     unsigned long *bits)
0074 {
0075     struct gen_74x164_chip *chip = gpiochip_get_data(gc);
0076     unsigned long offset;
0077     unsigned long bankmask;
0078     size_t bank;
0079     unsigned long bitmask;
0080
0081     mutex_lock(&chip->lock);
0082     for_each_set_clump8(offset, bankmask, mask, chip->registers * 8) {
0083         bank = chip->registers - 1 - offset / 8;
0084         bitmask = bitmap_get_value8(bits, offset) & bankmask;
0085
0086         chip->buffer[bank] &= ~bankmask;
0087         chip->buffer[bank] |= bitmask;
0088     }
0089     __gen_74x164_write_config(chip);
0090     mutex_unlock(&chip->lock);
0091 }
0092
0093 static int gen_74x164_direction_output(struct gpio_chip *gc,
0094         unsigned offset, int val)
0095 {
0096     gen_74x164_set_value(gc, offset, val);
0097     return 0;
0098 }
0099
0100 static int gen_74x164_probe(struct spi_device *spi)
0101 {
0102     struct gen_74x164_chip *chip;
0103     u32 nregs;
0104     int ret;
0105
0106     /*
0107      * bits_per_word cannot be configured in platform data
0108      */
0109     spi->bits_per_word = 8;
0110
0111     ret = spi_setup(spi);
0112     if (ret < 0)
0113         return ret;
0114
0115     ret = device_property_read_u32(&spi->dev, "registers-number", &nregs);
0116     if (ret) {
0117         dev_err(&spi->dev, "Missing 'registers-number' property.\n");
0118         return -EINVAL;
0119     }
0120
0121     chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
0122     if (!chip)
0123         return -ENOMEM;
0124
0125     chip->gpiod_oe = devm_gpiod_get_optional(&spi->dev, "enable",
0126                          GPIOD_OUT_LOW);
0127     if (IS_ERR(chip->gpiod_oe))
0128         return PTR_ERR(chip->gpiod_oe);
0129
0130     gpiod_set_value_cansleep(chip->gpiod_oe, 1);
0131
0132     spi_set_drvdata(spi, chip);
0133
0134     chip->gpio_chip.label = spi->modalias;
0135     chip->gpio_chip.direction_output = gen_74x164_direction_output;
0136     chip->gpio_chip.get = gen_74x164_get_value;
0137     chip->gpio_chip.set = gen_74x164_set_value;
0138     chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
0139     chip->gpio_chip.base = -1;
0140
0141     chip->registers = nregs;
0142     chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
0143
0144     chip->gpio_chip.can_sleep = true;
0145     chip->gpio_chip.parent = &spi->dev;
0146     chip->gpio_chip.owner = THIS_MODULE;
0147
0148     mutex_init(&chip->lock);
0149
0150     ret = __gen_74x164_write_config(chip);
0151     if (ret) {
0152         dev_err(&spi->dev, "Failed writing: %d\n", ret);
0153         goto exit_destroy;
0154     }
0155
0156     ret = gpiochip_add_data(&chip->gpio_chip, chip);
0157     if (!ret)
0158         return 0;
0159
0160 exit_destroy:
0161     mutex_destroy(&chip->lock);
0162
0163     return ret;
0164 }
0165
0166 static void gen_74x164_remove(struct spi_device *spi)
0167 {
0168     struct gen_74x164_chip *chip = spi_get_drvdata(spi);
0169
0170     gpiod_set_value_cansleep(chip->gpiod_oe, 0);
0171     gpiochip_remove(&chip->gpio_chip);
0172     mutex_destroy(&chip->lock);
0173 }
0174
0175 static const struct spi_device_id gen_74x164_spi_ids[] = {
0176     { .name = "74hc595" },
0177     { .name = "74lvc594" },
0178     {},
0179 };
0180 MODULE_DEVICE_TABLE(spi, gen_74x164_spi_ids);
0181
0182 static const struct of_device_id gen_74x164_dt_ids[] = {
0183     { .compatible = "fairchild,74hc595" },
0184     { .compatible = "nxp,74lvc594" },
0185     {},
0186 };
0187 MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
0188
0189 static struct spi_driver gen_74x164_driver = {
0190     .driver = {
0191         .name       = "74x164",
0192         .of_match_table = gen_74x164_dt_ids,
0193     },
0194     .probe      = gen_74x164_probe,
0195     .remove     = gen_74x164_remove,
0196     .id_table   = gen_74x164_spi_ids,
0197 };
0198 module_spi_driver(gen_74x164_driver);
0199
0200 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
0201 MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
0202 MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
0203 MODULE_LICENSE("GPL v2");