drivers/fsi/fsi-master.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * FSI master definitions. These comprise the core <--> master interface,
0004  * to allow the core to interact with the (hardware-specific) masters.
0005  *
0006  * Copyright (C) IBM Corporation 2016
0007  */
0008
0009 #ifndef DRIVERS_FSI_MASTER_H
0010 #define DRIVERS_FSI_MASTER_H
0011
0012 #include <linux/device.h>
0013 #include <linux/mutex.h>
0014
0015 /*
0016  * Master registers
0017  *
0018  * These are used by hardware masters, such as the one in the FSP2, AST2600 and
0019  * the hub master in POWER processors.
0020  */
0021
0022 /* Control Registers */
0023 #define FSI_MMODE       0x0     /* R/W: mode */
0024 #define FSI_MDLYR       0x4     /* R/W: delay */
0025 #define FSI_MCRSP       0x8     /* R/W: clock rate */
0026 #define FSI_MENP0       0x10        /* R/W: enable */
0027 #define FSI_MLEVP0      0x18        /* R: plug detect */
0028 #define FSI_MSENP0      0x18        /* S: Set enable */
0029 #define FSI_MCENP0      0x20        /* C: Clear enable */
0030 #define FSI_MAEB        0x70        /* R: Error address */
0031 #define FSI_MVER        0x74        /* R: master version/type */
0032 #define FSI_MSTAP0      0xd0        /* R: Port status */
0033 #define FSI_MRESP0      0xd0        /* W: Port reset */
0034 #define FSI_MESRB0      0x1d0       /* R: Master error status */
0035 #define FSI_MRESB0      0x1d0       /* W: Reset bridge */
0036 #define FSI_MSCSB0      0x1d4       /* R: Master sub command stack */
0037 #define FSI_MATRB0      0x1d8       /* R: Master address trace */
0038 #define FSI_MDTRB0      0x1dc       /* R: Master data trace */
0039 #define FSI_MECTRL      0x2e0       /* W: Error control */
0040
0041 /* MMODE: Mode control */
0042 #define FSI_MMODE_EIP       0x80000000  /* Enable interrupt polling */
0043 #define FSI_MMODE_ECRC      0x40000000  /* Enable error recovery */
0044 #define FSI_MMODE_RELA      0x20000000  /* Enable relative address commands */
0045 #define FSI_MMODE_EPC       0x10000000  /* Enable parity checking */
0046 #define FSI_MMODE_P8_TO_LSB 0x00000010  /* Timeout value LSB */
0047                         /*   MSB=1, LSB=0 is 0.8 ms */
0048                         /*   MSB=0, LSB=1 is 0.9 ms */
0049 #define FSI_MMODE_CRS0SHFT  18      /* Clk rate selection 0 shift */
0050 #define FSI_MMODE_CRS0MASK  0x3ff       /* Clk rate selection 0 mask */
0051 #define FSI_MMODE_CRS1SHFT  8       /* Clk rate selection 1 shift */
0052 #define FSI_MMODE_CRS1MASK  0x3ff       /* Clk rate selection 1 mask */
0053
0054 /* MRESB: Reset brindge */
0055 #define FSI_MRESB_RST_GEN   0x80000000  /* General reset */
0056 #define FSI_MRESB_RST_ERR   0x40000000  /* Error Reset */
0057
0058 /* MRESP: Reset port */
0059 #define FSI_MRESP_RST_ALL_MASTER 0x20000000 /* Reset all FSI masters */
0060 #define FSI_MRESP_RST_ALL_LINK  0x10000000  /* Reset all FSI port contr. */
0061 #define FSI_MRESP_RST_MCR   0x08000000  /* Reset FSI master reg. */
0062 #define FSI_MRESP_RST_PYE   0x04000000  /* Reset FSI parity error */
0063 #define FSI_MRESP_RST_ALL   0xfc000000  /* Reset any error */
0064
0065 /* MECTRL: Error control */
0066 #define FSI_MECTRL_EOAE     0x8000      /* Enable machine check when */
0067                         /* master 0 in error */
0068 #define FSI_MECTRL_P8_AUTO_TERM 0x4000      /* Auto terminate */
0069
0070 #define FSI_HUB_LINK_OFFSET     0x80000
0071 #define FSI_HUB_LINK_SIZE       0x80000
0072 #define FSI_HUB_MASTER_MAX_LINKS    8
0073
0074 /*
0075  * Protocol definitions
0076  *
0077  * These are used by low level masters that bit-bang out the protocol
0078  */
0079
0080 /* Various protocol delays */
0081 #define FSI_ECHO_DELAY_CLOCKS   16  /* Number clocks for echo delay */
0082 #define FSI_SEND_DELAY_CLOCKS   16  /* Number clocks for send delay */
0083 #define FSI_PRE_BREAK_CLOCKS    50  /* Number clocks to prep for break */
0084 #define FSI_BREAK_CLOCKS    256 /* Number of clocks to issue break */
0085 #define FSI_POST_BREAK_CLOCKS   16000   /* Number clocks to set up cfam */
0086 #define FSI_INIT_CLOCKS     5000    /* Clock out any old data */
0087 #define FSI_MASTER_DPOLL_CLOCKS 50      /* < 21 will cause slave to hang */
0088 #define FSI_MASTER_EPOLL_CLOCKS 50      /* Number of clocks for E_POLL retry */
0089
0090 /* Various retry maximums */
0091 #define FSI_CRC_ERR_RETRIES 10
0092 #define FSI_MASTER_MAX_BUSY 200
0093 #define FSI_MASTER_MTOE_COUNT   1000
0094
0095 /* Command encodings */
0096 #define FSI_CMD_DPOLL       0x2
0097 #define FSI_CMD_EPOLL       0x3
0098 #define FSI_CMD_TERM        0x3f
0099 #define FSI_CMD_ABS_AR      0x4
0100 #define FSI_CMD_REL_AR      0x5
0101 #define FSI_CMD_SAME_AR     0x3 /* but only a 2-bit opcode... */
0102
0103 /* Slave responses */
0104 #define FSI_RESP_ACK        0   /* Success */
0105 #define FSI_RESP_BUSY       1   /* Slave busy */
0106 #define FSI_RESP_ERRA       2   /* Any (misc) Error */
0107 #define FSI_RESP_ERRC       3   /* Slave reports master CRC error */
0108
0109 /* Misc */
0110 #define FSI_CRC_SIZE        4
0111
0112 /* fsi-master definition and flags */
0113 #define FSI_MASTER_FLAG_SWCLOCK     0x1
0114
0115 /*
0116  * Structures and function prototypes
0117  *
0118  * These are common to all masters
0119  */
0120
0121 struct fsi_master {
0122     struct device   dev;
0123     int     idx;
0124     int     n_links;
0125     int     flags;
0126     struct mutex    scan_lock;
0127     int     (*read)(struct fsi_master *, int link, uint8_t id,
0128                 uint32_t addr, void *val, size_t size);
0129     int     (*write)(struct fsi_master *, int link, uint8_t id,
0130                 uint32_t addr, const void *val, size_t size);
0131     int     (*term)(struct fsi_master *, int link, uint8_t id);
0132     int     (*send_break)(struct fsi_master *, int link);
0133     int     (*link_enable)(struct fsi_master *, int link,
0134                        bool enable);
0135     int     (*link_config)(struct fsi_master *, int link,
0136                        u8 t_send_delay, u8 t_echo_delay);
0137 };
0138
0139 #define dev_to_fsi_master(d) container_of(d, struct fsi_master, dev)
0140
0141 /**
0142  * fsi_master registration & lifetime: the fsi_master_register() and
0143  * fsi_master_unregister() functions will take ownership of the master, and
0144  * ->dev in particular. The registration path performs a get_device(), which
0145  * takes the first reference on the device. Similarly, the unregistration path
0146  * performs a put_device(), which may well drop the last reference.
0147  *
0148  * This means that master implementations *may* need to hold their own
0149  * reference (via get_device()) on master->dev. In particular, if the device's
0150  * ->release callback frees the fsi_master, then fsi_master_unregister will
0151  * invoke this free if no other reference is held.
0152  *
0153  * The same applies for the error path of fsi_master_register; if the call
0154  * fails, dev->release will have been invoked.
0155  */
0156 extern int fsi_master_register(struct fsi_master *master);
0157 extern void fsi_master_unregister(struct fsi_master *master);
0158
0159 extern int fsi_master_rescan(struct fsi_master *master);
0160
0161 #endif /* DRIVERS_FSI_MASTER_H */