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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * A FSI master controller, using a simple GPIO bit-banging interface
0004  */
0005 
0006 #include <linux/crc4.h>
0007 #include <linux/delay.h>
0008 #include <linux/device.h>
0009 #include <linux/fsi.h>
0010 #include <linux/gpio/consumer.h>
0011 #include <linux/io.h>
0012 #include <linux/irqflags.h>
0013 #include <linux/module.h>
0014 #include <linux/of.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/slab.h>
0017 
0018 #include "fsi-master.h"
0019 
0020 #define FSI_GPIO_STD_DLY    1   /* Standard pin delay in nS */
0021 #define LAST_ADDR_INVALID       0x1
0022 
0023 struct fsi_master_gpio {
0024     struct fsi_master   master;
0025     struct device       *dev;
0026     struct mutex        cmd_lock;   /* mutex for command ordering */
0027     struct gpio_desc    *gpio_clk;
0028     struct gpio_desc    *gpio_data;
0029     struct gpio_desc    *gpio_trans;    /* Voltage translator */
0030     struct gpio_desc    *gpio_enable;   /* FSI enable */
0031     struct gpio_desc    *gpio_mux;  /* Mux control */
0032     bool            external_mode;
0033     bool            no_delays;
0034     uint32_t        last_addr;
0035     uint8_t         t_send_delay;
0036     uint8_t         t_echo_delay;
0037 };
0038 
0039 #define CREATE_TRACE_POINTS
0040 #include <trace/events/fsi_master_gpio.h>
0041 
0042 #define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master)
0043 
0044 struct fsi_gpio_msg {
0045     uint64_t    msg;
0046     uint8_t     bits;
0047 };
0048 
0049 static void clock_toggle(struct fsi_master_gpio *master, int count)
0050 {
0051     int i;
0052 
0053     for (i = 0; i < count; i++) {
0054         if (!master->no_delays)
0055             ndelay(FSI_GPIO_STD_DLY);
0056         gpiod_set_value(master->gpio_clk, 0);
0057         if (!master->no_delays)
0058             ndelay(FSI_GPIO_STD_DLY);
0059         gpiod_set_value(master->gpio_clk, 1);
0060     }
0061 }
0062 
0063 static int sda_clock_in(struct fsi_master_gpio *master)
0064 {
0065     int in;
0066 
0067     if (!master->no_delays)
0068         ndelay(FSI_GPIO_STD_DLY);
0069     gpiod_set_value(master->gpio_clk, 0);
0070 
0071     /* Dummy read to feed the synchronizers */
0072     gpiod_get_value(master->gpio_data);
0073 
0074     /* Actual data read */
0075     in = gpiod_get_value(master->gpio_data);
0076     if (!master->no_delays)
0077         ndelay(FSI_GPIO_STD_DLY);
0078     gpiod_set_value(master->gpio_clk, 1);
0079     return in ? 1 : 0;
0080 }
0081 
0082 static void sda_out(struct fsi_master_gpio *master, int value)
0083 {
0084     gpiod_set_value(master->gpio_data, value);
0085 }
0086 
0087 static void set_sda_input(struct fsi_master_gpio *master)
0088 {
0089     gpiod_direction_input(master->gpio_data);
0090     gpiod_set_value(master->gpio_trans, 0);
0091 }
0092 
0093 static void set_sda_output(struct fsi_master_gpio *master, int value)
0094 {
0095     gpiod_set_value(master->gpio_trans, 1);
0096     gpiod_direction_output(master->gpio_data, value);
0097 }
0098 
0099 static void clock_zeros(struct fsi_master_gpio *master, int count)
0100 {
0101     trace_fsi_master_gpio_clock_zeros(master, count);
0102     set_sda_output(master, 1);
0103     clock_toggle(master, count);
0104 }
0105 
0106 static void echo_delay(struct fsi_master_gpio *master)
0107 {
0108     clock_zeros(master, master->t_echo_delay);
0109 }
0110 
0111 
0112 static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg,
0113             uint8_t num_bits)
0114 {
0115     uint8_t bit, in_bit;
0116 
0117     set_sda_input(master);
0118 
0119     for (bit = 0; bit < num_bits; bit++) {
0120         in_bit = sda_clock_in(master);
0121         msg->msg <<= 1;
0122         msg->msg |= ~in_bit & 0x1;  /* Data is active low */
0123     }
0124     msg->bits += num_bits;
0125 
0126     trace_fsi_master_gpio_in(master, num_bits, msg->msg);
0127 }
0128 
0129 static void serial_out(struct fsi_master_gpio *master,
0130             const struct fsi_gpio_msg *cmd)
0131 {
0132     uint8_t bit;
0133     uint64_t msg = ~cmd->msg;   /* Data is active low */
0134     uint64_t sda_mask = 0x1ULL << (cmd->bits - 1);
0135     uint64_t last_bit = ~0;
0136     int next_bit;
0137 
0138     trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg);
0139 
0140     if (!cmd->bits) {
0141         dev_warn(master->dev, "trying to output 0 bits\n");
0142         return;
0143     }
0144     set_sda_output(master, 0);
0145 
0146     /* Send the start bit */
0147     sda_out(master, 0);
0148     clock_toggle(master, 1);
0149 
0150     /* Send the message */
0151     for (bit = 0; bit < cmd->bits; bit++) {
0152         next_bit = (msg & sda_mask) >> (cmd->bits - 1);
0153         if (last_bit ^ next_bit) {
0154             sda_out(master, next_bit);
0155             last_bit = next_bit;
0156         }
0157         clock_toggle(master, 1);
0158         msg <<= 1;
0159     }
0160 }
0161 
0162 static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits)
0163 {
0164     msg->msg <<= bits;
0165     msg->msg |= data & ((1ull << bits) - 1);
0166     msg->bits += bits;
0167 }
0168 
0169 static void msg_push_crc(struct fsi_gpio_msg *msg)
0170 {
0171     uint8_t crc;
0172     int top;
0173 
0174     top = msg->bits & 0x3;
0175 
0176     /* start bit, and any non-aligned top bits */
0177     crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1);
0178 
0179     /* aligned bits */
0180     crc = crc4(crc, msg->msg, msg->bits - top);
0181 
0182     msg_push_bits(msg, crc, 4);
0183 }
0184 
0185 static bool check_same_address(struct fsi_master_gpio *master, int id,
0186         uint32_t addr)
0187 {
0188     /* this will also handle LAST_ADDR_INVALID */
0189     return master->last_addr == (((id & 0x3) << 21) | (addr & ~0x3));
0190 }
0191 
0192 static bool check_relative_address(struct fsi_master_gpio *master, int id,
0193         uint32_t addr, uint32_t *rel_addrp)
0194 {
0195     uint32_t last_addr = master->last_addr;
0196     int32_t rel_addr;
0197 
0198     if (last_addr == LAST_ADDR_INVALID)
0199         return false;
0200 
0201     /* We may be in 23-bit addressing mode, which uses the id as the
0202      * top two address bits. So, if we're referencing a different ID,
0203      * use absolute addresses.
0204      */
0205     if (((last_addr >> 21) & 0x3) != id)
0206         return false;
0207 
0208     /* remove the top two bits from any 23-bit addressing */
0209     last_addr &= (1 << 21) - 1;
0210 
0211     /* We know that the addresses are limited to 21 bits, so this won't
0212      * overflow the signed rel_addr */
0213     rel_addr = addr - last_addr;
0214     if (rel_addr > 255 || rel_addr < -256)
0215         return false;
0216 
0217     *rel_addrp = (uint32_t)rel_addr;
0218 
0219     return true;
0220 }
0221 
0222 static void last_address_update(struct fsi_master_gpio *master,
0223         int id, bool valid, uint32_t addr)
0224 {
0225     if (!valid)
0226         master->last_addr = LAST_ADDR_INVALID;
0227     else
0228         master->last_addr = ((id & 0x3) << 21) | (addr & ~0x3);
0229 }
0230 
0231 /*
0232  * Encode an Absolute/Relative/Same Address command
0233  */
0234 static void build_ar_command(struct fsi_master_gpio *master,
0235         struct fsi_gpio_msg *cmd, uint8_t id,
0236         uint32_t addr, size_t size, const void *data)
0237 {
0238     int i, addr_bits, opcode_bits;
0239     bool write = !!data;
0240     uint8_t ds, opcode;
0241     uint32_t rel_addr;
0242 
0243     cmd->bits = 0;
0244     cmd->msg = 0;
0245 
0246     /* we have 21 bits of address max */
0247     addr &= ((1 << 21) - 1);
0248 
0249     /* cmd opcodes are variable length - SAME_AR is only two bits */
0250     opcode_bits = 3;
0251 
0252     if (check_same_address(master, id, addr)) {
0253         /* we still address the byte offset within the word */
0254         addr_bits = 2;
0255         opcode_bits = 2;
0256         opcode = FSI_CMD_SAME_AR;
0257         trace_fsi_master_gpio_cmd_same_addr(master);
0258 
0259     } else if (check_relative_address(master, id, addr, &rel_addr)) {
0260         /* 8 bits plus sign */
0261         addr_bits = 9;
0262         addr = rel_addr;
0263         opcode = FSI_CMD_REL_AR;
0264         trace_fsi_master_gpio_cmd_rel_addr(master, rel_addr);
0265 
0266     } else {
0267         addr_bits = 21;
0268         opcode = FSI_CMD_ABS_AR;
0269         trace_fsi_master_gpio_cmd_abs_addr(master, addr);
0270     }
0271 
0272     /*
0273      * The read/write size is encoded in the lower bits of the address
0274      * (as it must be naturally-aligned), and the following ds bit.
0275      *
0276      *  size    addr:1  addr:0  ds
0277      *  1   x   x   0
0278      *  2   x   0   1
0279      *  4   0   1   1
0280      *
0281      */
0282     ds = size > 1 ? 1 : 0;
0283     addr &= ~(size - 1);
0284     if (size == 4)
0285         addr |= 1;
0286 
0287     msg_push_bits(cmd, id, 2);
0288     msg_push_bits(cmd, opcode, opcode_bits);
0289     msg_push_bits(cmd, write ? 0 : 1, 1);
0290     msg_push_bits(cmd, addr, addr_bits);
0291     msg_push_bits(cmd, ds, 1);
0292     for (i = 0; write && i < size; i++)
0293         msg_push_bits(cmd, ((uint8_t *)data)[i], 8);
0294 
0295     msg_push_crc(cmd);
0296 }
0297 
0298 static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
0299 {
0300     cmd->bits = 0;
0301     cmd->msg = 0;
0302 
0303     msg_push_bits(cmd, slave_id, 2);
0304     msg_push_bits(cmd, FSI_CMD_DPOLL, 3);
0305     msg_push_crc(cmd);
0306 }
0307 
0308 static void build_epoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
0309 {
0310     cmd->bits = 0;
0311     cmd->msg = 0;
0312 
0313     msg_push_bits(cmd, slave_id, 2);
0314     msg_push_bits(cmd, FSI_CMD_EPOLL, 3);
0315     msg_push_crc(cmd);
0316 }
0317 
0318 static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
0319 {
0320     cmd->bits = 0;
0321     cmd->msg = 0;
0322 
0323     msg_push_bits(cmd, slave_id, 2);
0324     msg_push_bits(cmd, FSI_CMD_TERM, 6);
0325     msg_push_crc(cmd);
0326 }
0327 
0328 /*
0329  * Note: callers rely specifically on this returning -EAGAIN for
0330  * a CRC error detected in the response. Use other error code
0331  * for other situations. It will be converted to something else
0332  * higher up the stack before it reaches userspace.
0333  */
0334 static int read_one_response(struct fsi_master_gpio *master,
0335         uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp)
0336 {
0337     struct fsi_gpio_msg msg;
0338     unsigned long flags;
0339     uint32_t crc;
0340     uint8_t tag;
0341     int i;
0342 
0343     local_irq_save(flags);
0344 
0345     /* wait for the start bit */
0346     for (i = 0; i < FSI_MASTER_MTOE_COUNT; i++) {
0347         msg.bits = 0;
0348         msg.msg = 0;
0349         serial_in(master, &msg, 1);
0350         if (msg.msg)
0351             break;
0352     }
0353     if (i == FSI_MASTER_MTOE_COUNT) {
0354         dev_dbg(master->dev,
0355             "Master time out waiting for response\n");
0356         local_irq_restore(flags);
0357         return -ETIMEDOUT;
0358     }
0359 
0360     msg.bits = 0;
0361     msg.msg = 0;
0362 
0363     /* Read slave ID & response tag */
0364     serial_in(master, &msg, 4);
0365 
0366     tag = msg.msg & 0x3;
0367 
0368     /* If we have an ACK and we're expecting data, clock the data in too */
0369     if (tag == FSI_RESP_ACK && data_size)
0370         serial_in(master, &msg, data_size * 8);
0371 
0372     /* read CRC */
0373     serial_in(master, &msg, FSI_CRC_SIZE);
0374 
0375     local_irq_restore(flags);
0376 
0377     /* we have a whole message now; check CRC */
0378     crc = crc4(0, 1, 1);
0379     crc = crc4(crc, msg.msg, msg.bits);
0380     if (crc) {
0381         /* Check if it's all 1's, that probably means the host is off */
0382         if (((~msg.msg) & ((1ull << msg.bits) - 1)) == 0)
0383             return -ENODEV;
0384         dev_dbg(master->dev, "ERR response CRC msg: 0x%016llx (%d bits)\n",
0385             msg.msg, msg.bits);
0386         return -EAGAIN;
0387     }
0388 
0389     if (msgp)
0390         *msgp = msg;
0391     if (tagp)
0392         *tagp = tag;
0393 
0394     return 0;
0395 }
0396 
0397 static int issue_term(struct fsi_master_gpio *master, uint8_t slave)
0398 {
0399     struct fsi_gpio_msg cmd;
0400     unsigned long flags;
0401     uint8_t tag;
0402     int rc;
0403 
0404     build_term_command(&cmd, slave);
0405 
0406     local_irq_save(flags);
0407     serial_out(master, &cmd);
0408     echo_delay(master);
0409     local_irq_restore(flags);
0410 
0411     rc = read_one_response(master, 0, NULL, &tag);
0412     if (rc < 0) {
0413         dev_err(master->dev,
0414                 "TERM failed; lost communication with slave\n");
0415         return -EIO;
0416     } else if (tag != FSI_RESP_ACK) {
0417         dev_err(master->dev, "TERM failed; response %d\n", tag);
0418         return -EIO;
0419     }
0420 
0421     return 0;
0422 }
0423 
0424 static int poll_for_response(struct fsi_master_gpio *master,
0425         uint8_t slave, uint8_t size, void *data)
0426 {
0427     struct fsi_gpio_msg response, cmd;
0428     int busy_count = 0, rc, i;
0429     unsigned long flags;
0430     uint8_t tag;
0431     uint8_t *data_byte = data;
0432     int crc_err_retries = 0;
0433 retry:
0434     rc = read_one_response(master, size, &response, &tag);
0435 
0436     /* Handle retries on CRC errors */
0437     if (rc == -EAGAIN) {
0438         /* Too many retries ? */
0439         if (crc_err_retries++ > FSI_CRC_ERR_RETRIES) {
0440             /*
0441              * Pass it up as a -EIO otherwise upper level will retry
0442              * the whole command which isn't what we want here.
0443              */
0444             rc = -EIO;
0445             goto fail;
0446         }
0447         dev_dbg(master->dev,
0448              "CRC error retry %d\n", crc_err_retries);
0449         trace_fsi_master_gpio_crc_rsp_error(master);
0450         build_epoll_command(&cmd, slave);
0451         local_irq_save(flags);
0452         clock_zeros(master, FSI_MASTER_EPOLL_CLOCKS);
0453         serial_out(master, &cmd);
0454         echo_delay(master);
0455         local_irq_restore(flags);
0456         goto retry;
0457     } else if (rc)
0458         goto fail;
0459 
0460     switch (tag) {
0461     case FSI_RESP_ACK:
0462         if (size && data) {
0463             uint64_t val = response.msg;
0464             /* clear crc & mask */
0465             val >>= 4;
0466             val &= (1ull << (size * 8)) - 1;
0467 
0468             for (i = 0; i < size; i++) {
0469                 data_byte[size-i-1] = val;
0470                 val >>= 8;
0471             }
0472         }
0473         break;
0474     case FSI_RESP_BUSY:
0475         /*
0476          * Its necessary to clock slave before issuing
0477          * d-poll, not indicated in the hardware protocol
0478          * spec. < 20 clocks causes slave to hang, 21 ok.
0479          */
0480         if (busy_count++ < FSI_MASTER_MAX_BUSY) {
0481             build_dpoll_command(&cmd, slave);
0482             local_irq_save(flags);
0483             clock_zeros(master, FSI_MASTER_DPOLL_CLOCKS);
0484             serial_out(master, &cmd);
0485             echo_delay(master);
0486             local_irq_restore(flags);
0487             goto retry;
0488         }
0489         dev_warn(master->dev,
0490             "ERR slave is stuck in busy state, issuing TERM\n");
0491         local_irq_save(flags);
0492         clock_zeros(master, FSI_MASTER_DPOLL_CLOCKS);
0493         local_irq_restore(flags);
0494         issue_term(master, slave);
0495         rc = -EIO;
0496         break;
0497 
0498     case FSI_RESP_ERRA:
0499         dev_dbg(master->dev, "ERRA received: 0x%x\n", (int)response.msg);
0500         rc = -EIO;
0501         break;
0502     case FSI_RESP_ERRC:
0503         dev_dbg(master->dev, "ERRC received: 0x%x\n", (int)response.msg);
0504         trace_fsi_master_gpio_crc_cmd_error(master);
0505         rc = -EAGAIN;
0506         break;
0507     }
0508 
0509     if (busy_count > 0)
0510         trace_fsi_master_gpio_poll_response_busy(master, busy_count);
0511  fail:
0512     /*
0513      * tSendDelay clocks, avoids signal reflections when switching
0514      * from receive of response back to send of data.
0515      */
0516     local_irq_save(flags);
0517     clock_zeros(master, master->t_send_delay);
0518     local_irq_restore(flags);
0519 
0520     return rc;
0521 }
0522 
0523 static int send_request(struct fsi_master_gpio *master,
0524         struct fsi_gpio_msg *cmd)
0525 {
0526     unsigned long flags;
0527 
0528     if (master->external_mode)
0529         return -EBUSY;
0530 
0531     local_irq_save(flags);
0532     serial_out(master, cmd);
0533     echo_delay(master);
0534     local_irq_restore(flags);
0535 
0536     return 0;
0537 }
0538 
0539 static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave,
0540         struct fsi_gpio_msg *cmd, size_t resp_len, void *resp)
0541 {
0542     int rc = -EAGAIN, retries = 0;
0543 
0544     while ((retries++) < FSI_CRC_ERR_RETRIES) {
0545         rc = send_request(master, cmd);
0546         if (rc)
0547             break;
0548         rc = poll_for_response(master, slave, resp_len, resp);
0549         if (rc != -EAGAIN)
0550             break;
0551         rc = -EIO;
0552         dev_warn(master->dev, "ECRC retry %d\n", retries);
0553 
0554         /* Pace it a bit before retry */
0555         msleep(1);
0556     }
0557 
0558     return rc;
0559 }
0560 
0561 static int fsi_master_gpio_read(struct fsi_master *_master, int link,
0562         uint8_t id, uint32_t addr, void *val, size_t size)
0563 {
0564     struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
0565     struct fsi_gpio_msg cmd;
0566     int rc;
0567 
0568     if (link != 0)
0569         return -ENODEV;
0570 
0571     mutex_lock(&master->cmd_lock);
0572     build_ar_command(master, &cmd, id, addr, size, NULL);
0573     rc = fsi_master_gpio_xfer(master, id, &cmd, size, val);
0574     last_address_update(master, id, rc == 0, addr);
0575     mutex_unlock(&master->cmd_lock);
0576 
0577     return rc;
0578 }
0579 
0580 static int fsi_master_gpio_write(struct fsi_master *_master, int link,
0581         uint8_t id, uint32_t addr, const void *val, size_t size)
0582 {
0583     struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
0584     struct fsi_gpio_msg cmd;
0585     int rc;
0586 
0587     if (link != 0)
0588         return -ENODEV;
0589 
0590     mutex_lock(&master->cmd_lock);
0591     build_ar_command(master, &cmd, id, addr, size, val);
0592     rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
0593     last_address_update(master, id, rc == 0, addr);
0594     mutex_unlock(&master->cmd_lock);
0595 
0596     return rc;
0597 }
0598 
0599 static int fsi_master_gpio_term(struct fsi_master *_master,
0600         int link, uint8_t id)
0601 {
0602     struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
0603     struct fsi_gpio_msg cmd;
0604     int rc;
0605 
0606     if (link != 0)
0607         return -ENODEV;
0608 
0609     mutex_lock(&master->cmd_lock);
0610     build_term_command(&cmd, id);
0611     rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
0612     last_address_update(master, id, false, 0);
0613     mutex_unlock(&master->cmd_lock);
0614 
0615     return rc;
0616 }
0617 
0618 static int fsi_master_gpio_break(struct fsi_master *_master, int link)
0619 {
0620     struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
0621     unsigned long flags;
0622 
0623     if (link != 0)
0624         return -ENODEV;
0625 
0626     trace_fsi_master_gpio_break(master);
0627 
0628     mutex_lock(&master->cmd_lock);
0629     if (master->external_mode) {
0630         mutex_unlock(&master->cmd_lock);
0631         return -EBUSY;
0632     }
0633 
0634     local_irq_save(flags);
0635 
0636     set_sda_output(master, 1);
0637     sda_out(master, 1);
0638     clock_toggle(master, FSI_PRE_BREAK_CLOCKS);
0639     sda_out(master, 0);
0640     clock_toggle(master, FSI_BREAK_CLOCKS);
0641     echo_delay(master);
0642     sda_out(master, 1);
0643     clock_toggle(master, FSI_POST_BREAK_CLOCKS);
0644 
0645     local_irq_restore(flags);
0646 
0647     last_address_update(master, 0, false, 0);
0648     mutex_unlock(&master->cmd_lock);
0649 
0650     /* Wait for logic reset to take effect */
0651     udelay(200);
0652 
0653     return 0;
0654 }
0655 
0656 static void fsi_master_gpio_init(struct fsi_master_gpio *master)
0657 {
0658     unsigned long flags;
0659 
0660     gpiod_direction_output(master->gpio_mux, 1);
0661     gpiod_direction_output(master->gpio_trans, 1);
0662     gpiod_direction_output(master->gpio_enable, 1);
0663     gpiod_direction_output(master->gpio_clk, 1);
0664     gpiod_direction_output(master->gpio_data, 1);
0665 
0666     /* todo: evaluate if clocks can be reduced */
0667     local_irq_save(flags);
0668     clock_zeros(master, FSI_INIT_CLOCKS);
0669     local_irq_restore(flags);
0670 }
0671 
0672 static void fsi_master_gpio_init_external(struct fsi_master_gpio *master)
0673 {
0674     gpiod_direction_output(master->gpio_mux, 0);
0675     gpiod_direction_output(master->gpio_trans, 0);
0676     gpiod_direction_output(master->gpio_enable, 1);
0677     gpiod_direction_input(master->gpio_clk);
0678     gpiod_direction_input(master->gpio_data);
0679 }
0680 
0681 static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link,
0682                        bool enable)
0683 {
0684     struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
0685     int rc = -EBUSY;
0686 
0687     if (link != 0)
0688         return -ENODEV;
0689 
0690     mutex_lock(&master->cmd_lock);
0691     if (!master->external_mode) {
0692         gpiod_set_value(master->gpio_enable, enable ? 1 : 0);
0693         rc = 0;
0694     }
0695     mutex_unlock(&master->cmd_lock);
0696 
0697     return rc;
0698 }
0699 
0700 static int fsi_master_gpio_link_config(struct fsi_master *_master, int link,
0701                        u8 t_send_delay, u8 t_echo_delay)
0702 {
0703     struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
0704 
0705     if (link != 0)
0706         return -ENODEV;
0707 
0708     mutex_lock(&master->cmd_lock);
0709     master->t_send_delay = t_send_delay;
0710     master->t_echo_delay = t_echo_delay;
0711     mutex_unlock(&master->cmd_lock);
0712 
0713     return 0;
0714 }
0715 
0716 static ssize_t external_mode_show(struct device *dev,
0717         struct device_attribute *attr, char *buf)
0718 {
0719     struct fsi_master_gpio *master = dev_get_drvdata(dev);
0720 
0721     return snprintf(buf, PAGE_SIZE - 1, "%u\n",
0722             master->external_mode ? 1 : 0);
0723 }
0724 
0725 static ssize_t external_mode_store(struct device *dev,
0726         struct device_attribute *attr, const char *buf, size_t count)
0727 {
0728     struct fsi_master_gpio *master = dev_get_drvdata(dev);
0729     unsigned long val;
0730     bool external_mode;
0731     int err;
0732 
0733     err = kstrtoul(buf, 0, &val);
0734     if (err)
0735         return err;
0736 
0737     external_mode = !!val;
0738 
0739     mutex_lock(&master->cmd_lock);
0740 
0741     if (external_mode == master->external_mode) {
0742         mutex_unlock(&master->cmd_lock);
0743         return count;
0744     }
0745 
0746     master->external_mode = external_mode;
0747     if (master->external_mode)
0748         fsi_master_gpio_init_external(master);
0749     else
0750         fsi_master_gpio_init(master);
0751 
0752     mutex_unlock(&master->cmd_lock);
0753 
0754     fsi_master_rescan(&master->master);
0755 
0756     return count;
0757 }
0758 
0759 static DEVICE_ATTR(external_mode, 0664,
0760         external_mode_show, external_mode_store);
0761 
0762 static void fsi_master_gpio_release(struct device *dev)
0763 {
0764     struct fsi_master_gpio *master = to_fsi_master_gpio(dev_to_fsi_master(dev));
0765 
0766     of_node_put(dev_of_node(master->dev));
0767 
0768     kfree(master);
0769 }
0770 
0771 static int fsi_master_gpio_probe(struct platform_device *pdev)
0772 {
0773     struct fsi_master_gpio *master;
0774     struct gpio_desc *gpio;
0775     int rc;
0776 
0777     master = kzalloc(sizeof(*master), GFP_KERNEL);
0778     if (!master)
0779         return -ENOMEM;
0780 
0781     master->dev = &pdev->dev;
0782     master->master.dev.parent = master->dev;
0783     master->master.dev.of_node = of_node_get(dev_of_node(master->dev));
0784     master->master.dev.release = fsi_master_gpio_release;
0785     master->last_addr = LAST_ADDR_INVALID;
0786 
0787     gpio = devm_gpiod_get(&pdev->dev, "clock", 0);
0788     if (IS_ERR(gpio)) {
0789         dev_err(&pdev->dev, "failed to get clock gpio\n");
0790         rc = PTR_ERR(gpio);
0791         goto err_free;
0792     }
0793     master->gpio_clk = gpio;
0794 
0795     gpio = devm_gpiod_get(&pdev->dev, "data", 0);
0796     if (IS_ERR(gpio)) {
0797         dev_err(&pdev->dev, "failed to get data gpio\n");
0798         rc = PTR_ERR(gpio);
0799         goto err_free;
0800     }
0801     master->gpio_data = gpio;
0802 
0803     /* Optional GPIOs */
0804     gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0);
0805     if (IS_ERR(gpio)) {
0806         dev_err(&pdev->dev, "failed to get trans gpio\n");
0807         rc = PTR_ERR(gpio);
0808         goto err_free;
0809     }
0810     master->gpio_trans = gpio;
0811 
0812     gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0);
0813     if (IS_ERR(gpio)) {
0814         dev_err(&pdev->dev, "failed to get enable gpio\n");
0815         rc = PTR_ERR(gpio);
0816         goto err_free;
0817     }
0818     master->gpio_enable = gpio;
0819 
0820     gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0);
0821     if (IS_ERR(gpio)) {
0822         dev_err(&pdev->dev, "failed to get mux gpio\n");
0823         rc = PTR_ERR(gpio);
0824         goto err_free;
0825     }
0826     master->gpio_mux = gpio;
0827 
0828     /*
0829      * Check if GPIO block is slow enought that no extra delays
0830      * are necessary. This improves performance on ast2500 by
0831      * an order of magnitude.
0832      */
0833     master->no_delays = device_property_present(&pdev->dev, "no-gpio-delays");
0834 
0835     /* Default FSI command delays */
0836     master->t_send_delay = FSI_SEND_DELAY_CLOCKS;
0837     master->t_echo_delay = FSI_ECHO_DELAY_CLOCKS;
0838 
0839     master->master.n_links = 1;
0840     master->master.flags = FSI_MASTER_FLAG_SWCLOCK;
0841     master->master.read = fsi_master_gpio_read;
0842     master->master.write = fsi_master_gpio_write;
0843     master->master.term = fsi_master_gpio_term;
0844     master->master.send_break = fsi_master_gpio_break;
0845     master->master.link_enable = fsi_master_gpio_link_enable;
0846     master->master.link_config = fsi_master_gpio_link_config;
0847     platform_set_drvdata(pdev, master);
0848     mutex_init(&master->cmd_lock);
0849 
0850     fsi_master_gpio_init(master);
0851 
0852     rc = device_create_file(&pdev->dev, &dev_attr_external_mode);
0853     if (rc)
0854         goto err_free;
0855 
0856     rc = fsi_master_register(&master->master);
0857     if (rc) {
0858         device_remove_file(&pdev->dev, &dev_attr_external_mode);
0859         put_device(&master->master.dev);
0860         return rc;
0861     }
0862     return 0;
0863  err_free:
0864     kfree(master);
0865     return rc;
0866 }
0867 
0868 
0869 
0870 static int fsi_master_gpio_remove(struct platform_device *pdev)
0871 {
0872     struct fsi_master_gpio *master = platform_get_drvdata(pdev);
0873 
0874     device_remove_file(&pdev->dev, &dev_attr_external_mode);
0875 
0876     fsi_master_unregister(&master->master);
0877 
0878     return 0;
0879 }
0880 
0881 static const struct of_device_id fsi_master_gpio_match[] = {
0882     { .compatible = "fsi-master-gpio" },
0883     { },
0884 };
0885 MODULE_DEVICE_TABLE(of, fsi_master_gpio_match);
0886 
0887 static struct platform_driver fsi_master_gpio_driver = {
0888     .driver = {
0889         .name       = "fsi-master-gpio",
0890         .of_match_table = fsi_master_gpio_match,
0891     },
0892     .probe  = fsi_master_gpio_probe,
0893     .remove = fsi_master_gpio_remove,
0894 };
0895 
0896 module_platform_driver(fsi_master_gpio_driver);
0897 MODULE_LICENSE("GPL");
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