drivers/fpga/versal-fpga.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2019-2021 Xilinx, Inc.
0004  */
0005
0006 #include <linux/dma-mapping.h>
0007 #include <linux/fpga/fpga-mgr.h>
0008 #include <linux/io.h>
0009 #include <linux/kernel.h>
0010 #include <linux/module.h>
0011 #include <linux/of_address.h>
0012 #include <linux/string.h>
0013 #include <linux/firmware/xlnx-zynqmp.h>
0014
0015 static int versal_fpga_ops_write_init(struct fpga_manager *mgr,
0016                       struct fpga_image_info *info,
0017                       const char *buf, size_t size)
0018 {
0019     return 0;
0020 }
0021
0022 static int versal_fpga_ops_write(struct fpga_manager *mgr,
0023                  const char *buf, size_t size)
0024 {
0025     dma_addr_t dma_addr = 0;
0026     char *kbuf;
0027     int ret;
0028
0029     kbuf = dma_alloc_coherent(mgr->dev.parent, size, &dma_addr, GFP_KERNEL);
0030     if (!kbuf)
0031         return -ENOMEM;
0032
0033     memcpy(kbuf, buf, size);
0034     ret = zynqmp_pm_load_pdi(PDI_SRC_DDR, dma_addr);
0035     dma_free_coherent(mgr->dev.parent, size, kbuf, dma_addr);
0036
0037     return ret;
0038 }
0039
0040 static const struct fpga_manager_ops versal_fpga_ops = {
0041     .write_init = versal_fpga_ops_write_init,
0042     .write = versal_fpga_ops_write,
0043 };
0044
0045 static int versal_fpga_probe(struct platform_device *pdev)
0046 {
0047     struct device *dev = &pdev->dev;
0048     struct fpga_manager *mgr;
0049     int ret;
0050
0051     ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
0052     if (ret < 0) {
0053         dev_err(dev, "no usable DMA configuration\n");
0054         return ret;
0055     }
0056
0057     mgr = devm_fpga_mgr_register(dev, "Xilinx Versal FPGA Manager",
0058                      &versal_fpga_ops, NULL);
0059     return PTR_ERR_OR_ZERO(mgr);
0060 }
0061
0062 static const struct of_device_id versal_fpga_of_match[] = {
0063     { .compatible = "xlnx,versal-fpga", },
0064     {},
0065 };
0066 MODULE_DEVICE_TABLE(of, versal_fpga_of_match);
0067
0068 static struct platform_driver versal_fpga_driver = {
0069     .probe = versal_fpga_probe,
0070     .driver = {
0071         .name = "versal_fpga_manager",
0072         .of_match_table = of_match_ptr(versal_fpga_of_match),
0073     },
0074 };
0075 module_platform_driver(versal_fpga_driver);
0076
0077 MODULE_AUTHOR("Nava kishore Manne <nava.manne@xilinx.com>");
0078 MODULE_AUTHOR("Appana Durga Kedareswara rao <appanad.durga.rao@xilinx.com>");
0079 MODULE_DESCRIPTION("Xilinx Versal FPGA Manager");
0080 MODULE_LICENSE("GPL");