drivers/fpga/dfl-n3000-nios.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * DFL device driver for Nios private feature on Intel PAC (Programmable
0004  * Acceleration Card) N3000
0005  *
0006  * Copyright (C) 2019-2020 Intel Corporation, Inc.
0007  *
0008  * Authors:
0009  *   Wu Hao <hao.wu@intel.com>
0010  *   Xu Yilun <yilun.xu@intel.com>
0011  */
0012 #include <linux/bitfield.h>
0013 #include <linux/dfl.h>
0014 #include <linux/errno.h>
0015 #include <linux/io.h>
0016 #include <linux/io-64-nonatomic-lo-hi.h>
0017 #include <linux/kernel.h>
0018 #include <linux/module.h>
0019 #include <linux/platform_device.h>
0020 #include <linux/regmap.h>
0021 #include <linux/stddef.h>
0022 #include <linux/spi/altera.h>
0023 #include <linux/spi/spi.h>
0024 #include <linux/types.h>
0025
0026 /*
0027  * N3000 Nios private feature registers, named as NIOS_SPI_XX on spec.
0028  * NS is the abbreviation of NIOS_SPI.
0029  */
0030 #define N3000_NS_PARAM              0x8
0031 #define N3000_NS_PARAM_SHIFT_MODE_MSK       BIT_ULL(1)
0032 #define N3000_NS_PARAM_SHIFT_MODE_MSB       0
0033 #define N3000_NS_PARAM_SHIFT_MODE_LSB       1
0034 #define N3000_NS_PARAM_DATA_WIDTH       GENMASK_ULL(7, 2)
0035 #define N3000_NS_PARAM_NUM_CS           GENMASK_ULL(13, 8)
0036 #define N3000_NS_PARAM_CLK_POL          BIT_ULL(14)
0037 #define N3000_NS_PARAM_CLK_PHASE        BIT_ULL(15)
0038 #define N3000_NS_PARAM_PERIPHERAL_ID        GENMASK_ULL(47, 32)
0039
0040 #define N3000_NS_CTRL               0x10
0041 #define N3000_NS_CTRL_WR_DATA           GENMASK_ULL(31, 0)
0042 #define N3000_NS_CTRL_ADDR          GENMASK_ULL(44, 32)
0043 #define N3000_NS_CTRL_CMD_MSK           GENMASK_ULL(63, 62)
0044 #define N3000_NS_CTRL_CMD_NOP           0
0045 #define N3000_NS_CTRL_CMD_RD            1
0046 #define N3000_NS_CTRL_CMD_WR            2
0047
0048 #define N3000_NS_STAT               0x18
0049 #define N3000_NS_STAT_RD_DATA           GENMASK_ULL(31, 0)
0050 #define N3000_NS_STAT_RW_VAL            BIT_ULL(32)
0051
0052 /* Nios handshake registers, indirect access */
0053 #define N3000_NIOS_INIT             0x1000
0054 #define N3000_NIOS_INIT_DONE            BIT(0)
0055 #define N3000_NIOS_INIT_START           BIT(1)
0056 /* Mode for retimer A, link 0, the same below */
0057 #define N3000_NIOS_INIT_REQ_FEC_MODE_A0_MSK GENMASK(9, 8)
0058 #define N3000_NIOS_INIT_REQ_FEC_MODE_A1_MSK GENMASK(11, 10)
0059 #define N3000_NIOS_INIT_REQ_FEC_MODE_A2_MSK GENMASK(13, 12)
0060 #define N3000_NIOS_INIT_REQ_FEC_MODE_A3_MSK GENMASK(15, 14)
0061 #define N3000_NIOS_INIT_REQ_FEC_MODE_B0_MSK GENMASK(17, 16)
0062 #define N3000_NIOS_INIT_REQ_FEC_MODE_B1_MSK GENMASK(19, 18)
0063 #define N3000_NIOS_INIT_REQ_FEC_MODE_B2_MSK GENMASK(21, 20)
0064 #define N3000_NIOS_INIT_REQ_FEC_MODE_B3_MSK GENMASK(23, 22)
0065 #define N3000_NIOS_INIT_REQ_FEC_MODE_NO     0x0
0066 #define N3000_NIOS_INIT_REQ_FEC_MODE_KR     0x1
0067 #define N3000_NIOS_INIT_REQ_FEC_MODE_RS     0x2
0068
0069 #define N3000_NIOS_FW_VERSION           0x1004
0070 #define N3000_NIOS_FW_VERSION_PATCH     GENMASK(23, 20)
0071 #define N3000_NIOS_FW_VERSION_MINOR     GENMASK(27, 24)
0072 #define N3000_NIOS_FW_VERSION_MAJOR     GENMASK(31, 28)
0073
0074 /* The retimers we use on Intel PAC N3000 is Parkvale, abbreviated to PKVL */
0075 #define N3000_NIOS_PKVL_A_MODE_STS      0x1020
0076 #define N3000_NIOS_PKVL_B_MODE_STS      0x1024
0077 #define N3000_NIOS_PKVL_MODE_STS_GROUP_MSK  GENMASK(15, 8)
0078 #define N3000_NIOS_PKVL_MODE_STS_GROUP_OK   0x0
0079 #define N3000_NIOS_PKVL_MODE_STS_ID_MSK     GENMASK(7, 0)
0080 /* When GROUP MASK field == GROUP_OK  */
0081 #define N3000_NIOS_PKVL_MODE_ID_RESET       0x0
0082 #define N3000_NIOS_PKVL_MODE_ID_4X10G       0x1
0083 #define N3000_NIOS_PKVL_MODE_ID_4X25G       0x2
0084 #define N3000_NIOS_PKVL_MODE_ID_2X25G       0x3
0085 #define N3000_NIOS_PKVL_MODE_ID_2X25G_2X10G 0x4
0086 #define N3000_NIOS_PKVL_MODE_ID_1X25G       0x5
0087
0088 #define N3000_NIOS_REGBUS_RETRY_COUNT       10000   /* loop count */
0089
0090 #define N3000_NIOS_INIT_TIMEOUT         10000000    /* usec */
0091 #define N3000_NIOS_INIT_TIME_INTV       100000      /* usec */
0092
0093 #define N3000_NIOS_INIT_REQ_FEC_MODE_MSK_ALL    \
0094     (N3000_NIOS_INIT_REQ_FEC_MODE_A0_MSK |  \
0095      N3000_NIOS_INIT_REQ_FEC_MODE_A1_MSK |  \
0096      N3000_NIOS_INIT_REQ_FEC_MODE_A2_MSK |  \
0097      N3000_NIOS_INIT_REQ_FEC_MODE_A3_MSK |  \
0098      N3000_NIOS_INIT_REQ_FEC_MODE_B0_MSK |  \
0099      N3000_NIOS_INIT_REQ_FEC_MODE_B1_MSK |  \
0100      N3000_NIOS_INIT_REQ_FEC_MODE_B2_MSK |  \
0101      N3000_NIOS_INIT_REQ_FEC_MODE_B3_MSK)
0102
0103 #define N3000_NIOS_INIT_REQ_FEC_MODE_NO_ALL         \
0104     (FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A0_MSK,    \
0105             N3000_NIOS_INIT_REQ_FEC_MODE_NO) |      \
0106      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A1_MSK,    \
0107             N3000_NIOS_INIT_REQ_FEC_MODE_NO) |      \
0108      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A2_MSK,    \
0109             N3000_NIOS_INIT_REQ_FEC_MODE_NO) |      \
0110      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A3_MSK,    \
0111             N3000_NIOS_INIT_REQ_FEC_MODE_NO) |      \
0112      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B0_MSK,    \
0113             N3000_NIOS_INIT_REQ_FEC_MODE_NO) |      \
0114      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B1_MSK,    \
0115             N3000_NIOS_INIT_REQ_FEC_MODE_NO) |      \
0116      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B2_MSK,    \
0117             N3000_NIOS_INIT_REQ_FEC_MODE_NO) |      \
0118      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B3_MSK,    \
0119             N3000_NIOS_INIT_REQ_FEC_MODE_NO))
0120
0121 #define N3000_NIOS_INIT_REQ_FEC_MODE_KR_ALL         \
0122     (FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A0_MSK,    \
0123             N3000_NIOS_INIT_REQ_FEC_MODE_KR) |      \
0124      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A1_MSK,    \
0125             N3000_NIOS_INIT_REQ_FEC_MODE_KR) |      \
0126      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A2_MSK,    \
0127             N3000_NIOS_INIT_REQ_FEC_MODE_KR) |      \
0128      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A3_MSK,    \
0129             N3000_NIOS_INIT_REQ_FEC_MODE_KR) |      \
0130      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B0_MSK,    \
0131             N3000_NIOS_INIT_REQ_FEC_MODE_KR) |      \
0132      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B1_MSK,    \
0133             N3000_NIOS_INIT_REQ_FEC_MODE_KR) |      \
0134      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B2_MSK,    \
0135             N3000_NIOS_INIT_REQ_FEC_MODE_KR) |      \
0136      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B3_MSK,    \
0137             N3000_NIOS_INIT_REQ_FEC_MODE_KR))
0138
0139 #define N3000_NIOS_INIT_REQ_FEC_MODE_RS_ALL         \
0140     (FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A0_MSK,    \
0141             N3000_NIOS_INIT_REQ_FEC_MODE_RS) |      \
0142      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A1_MSK,    \
0143             N3000_NIOS_INIT_REQ_FEC_MODE_RS) |      \
0144      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A2_MSK,    \
0145             N3000_NIOS_INIT_REQ_FEC_MODE_RS) |      \
0146      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A3_MSK,    \
0147             N3000_NIOS_INIT_REQ_FEC_MODE_RS) |      \
0148      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B0_MSK,    \
0149             N3000_NIOS_INIT_REQ_FEC_MODE_RS) |      \
0150      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B1_MSK,    \
0151             N3000_NIOS_INIT_REQ_FEC_MODE_RS) |      \
0152      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B2_MSK,    \
0153             N3000_NIOS_INIT_REQ_FEC_MODE_RS) |      \
0154      FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B3_MSK,    \
0155             N3000_NIOS_INIT_REQ_FEC_MODE_RS))
0156
0157 struct n3000_nios {
0158     void __iomem *base;
0159     struct regmap *regmap;
0160     struct device *dev;
0161     struct platform_device *altera_spi;
0162 };
0163
0164 static ssize_t nios_fw_version_show(struct device *dev,
0165                     struct device_attribute *attr, char *buf)
0166 {
0167     struct n3000_nios *nn = dev_get_drvdata(dev);
0168     unsigned int val;
0169     int ret;
0170
0171     ret = regmap_read(nn->regmap, N3000_NIOS_FW_VERSION, &val);
0172     if (ret)
0173         return ret;
0174
0175     return sysfs_emit(buf, "%x.%x.%x\n",
0176               (u8)FIELD_GET(N3000_NIOS_FW_VERSION_MAJOR, val),
0177               (u8)FIELD_GET(N3000_NIOS_FW_VERSION_MINOR, val),
0178               (u8)FIELD_GET(N3000_NIOS_FW_VERSION_PATCH, val));
0179 }
0180 static DEVICE_ATTR_RO(nios_fw_version);
0181
0182 #define IS_MODE_STATUS_OK(mode_stat)                    \
0183     (FIELD_GET(N3000_NIOS_PKVL_MODE_STS_GROUP_MSK, (mode_stat)) ==  \
0184      N3000_NIOS_PKVL_MODE_STS_GROUP_OK)
0185
0186 #define IS_RETIMER_FEC_SUPPORTED(retimer_mode)          \
0187     ((retimer_mode) != N3000_NIOS_PKVL_MODE_ID_RESET && \
0188      (retimer_mode) != N3000_NIOS_PKVL_MODE_ID_4X10G)
0189
0190 static int get_retimer_mode(struct n3000_nios *nn, unsigned int mode_stat_reg,
0191                 unsigned int *retimer_mode)
0192 {
0193     unsigned int val;
0194     int ret;
0195
0196     ret = regmap_read(nn->regmap, mode_stat_reg, &val);
0197     if (ret)
0198         return ret;
0199
0200     if (!IS_MODE_STATUS_OK(val))
0201         return -EFAULT;
0202
0203     *retimer_mode = FIELD_GET(N3000_NIOS_PKVL_MODE_STS_ID_MSK, val);
0204
0205     return 0;
0206 }
0207
0208 static ssize_t retimer_A_mode_show(struct device *dev,
0209                    struct device_attribute *attr, char *buf)
0210 {
0211     struct n3000_nios *nn = dev_get_drvdata(dev);
0212     unsigned int mode;
0213     int ret;
0214
0215     ret = get_retimer_mode(nn, N3000_NIOS_PKVL_A_MODE_STS, &mode);
0216     if (ret)
0217         return ret;
0218
0219     return sysfs_emit(buf, "0x%x\n", mode);
0220 }
0221 static DEVICE_ATTR_RO(retimer_A_mode);
0222
0223 static ssize_t retimer_B_mode_show(struct device *dev,
0224                    struct device_attribute *attr, char *buf)
0225 {
0226     struct n3000_nios *nn = dev_get_drvdata(dev);
0227     unsigned int mode;
0228     int ret;
0229
0230     ret = get_retimer_mode(nn, N3000_NIOS_PKVL_B_MODE_STS, &mode);
0231     if (ret)
0232         return ret;
0233
0234     return sysfs_emit(buf, "0x%x\n", mode);
0235 }
0236 static DEVICE_ATTR_RO(retimer_B_mode);
0237
0238 static ssize_t fec_mode_show(struct device *dev,
0239                  struct device_attribute *attr, char *buf)
0240 {
0241     unsigned int val, retimer_a_mode, retimer_b_mode, fec_modes;
0242     struct n3000_nios *nn = dev_get_drvdata(dev);
0243     int ret;
0244
0245     /* FEC mode setting is not supported in early FW versions */
0246     ret = regmap_read(nn->regmap, N3000_NIOS_FW_VERSION, &val);
0247     if (ret)
0248         return ret;
0249
0250     if (FIELD_GET(N3000_NIOS_FW_VERSION_MAJOR, val) < 3)
0251         return sysfs_emit(buf, "not supported\n");
0252
0253     /* If no 25G links, FEC mode setting is not supported either */
0254     ret = get_retimer_mode(nn, N3000_NIOS_PKVL_A_MODE_STS, &retimer_a_mode);
0255     if (ret)
0256         return ret;
0257
0258     ret = get_retimer_mode(nn, N3000_NIOS_PKVL_B_MODE_STS, &retimer_b_mode);
0259     if (ret)
0260         return ret;
0261
0262     if (!IS_RETIMER_FEC_SUPPORTED(retimer_a_mode) &&
0263         !IS_RETIMER_FEC_SUPPORTED(retimer_b_mode))
0264         return sysfs_emit(buf, "not supported\n");
0265
0266     /* get the valid FEC mode for 25G links */
0267     ret = regmap_read(nn->regmap, N3000_NIOS_INIT, &val);
0268     if (ret)
0269         return ret;
0270
0271     /*
0272      * FEC mode should always be the same for all links, as we set them
0273      * in this way.
0274      */
0275     fec_modes = (val & N3000_NIOS_INIT_REQ_FEC_MODE_MSK_ALL);
0276     if (fec_modes == N3000_NIOS_INIT_REQ_FEC_MODE_NO_ALL)
0277         return sysfs_emit(buf, "no\n");
0278     else if (fec_modes == N3000_NIOS_INIT_REQ_FEC_MODE_KR_ALL)
0279         return sysfs_emit(buf, "kr\n");
0280     else if (fec_modes == N3000_NIOS_INIT_REQ_FEC_MODE_RS_ALL)
0281         return sysfs_emit(buf, "rs\n");
0282
0283     return -EFAULT;
0284 }
0285 static DEVICE_ATTR_RO(fec_mode);
0286
0287 static struct attribute *n3000_nios_attrs[] = {
0288     &dev_attr_nios_fw_version.attr,
0289     &dev_attr_retimer_A_mode.attr,
0290     &dev_attr_retimer_B_mode.attr,
0291     &dev_attr_fec_mode.attr,
0292     NULL,
0293 };
0294 ATTRIBUTE_GROUPS(n3000_nios);
0295
0296 static int n3000_nios_init_done_check(struct n3000_nios *nn)
0297 {
0298     unsigned int val, state_a, state_b;
0299     struct device *dev = nn->dev;
0300     int ret, ret2;
0301
0302     /*
0303      * The SPI is shared by the Nios core inside the FPGA, Nios will use
0304      * this SPI master to do some one time initialization after power up,
0305      * and then release the control to OS. The driver needs to poll on
0306      * INIT_DONE to see when driver could take the control.
0307      *
0308      * Please note that after Nios firmware version 3.0.0, INIT_START is
0309      * introduced, so driver needs to trigger START firstly and then check
0310      * INIT_DONE.
0311      */
0312
0313     ret = regmap_read(nn->regmap, N3000_NIOS_FW_VERSION, &val);
0314     if (ret)
0315         return ret;
0316
0317     /*
0318      * If Nios version register is totally uninitialized(== 0x0), then the
0319      * Nios firmware is missing. So host could take control of SPI master
0320      * safely, but initialization work for Nios is not done. To restore the
0321      * card, we need to reprogram a new Nios firmware via the BMC chip on
0322      * SPI bus. So the driver doesn't error out, it continues to create the
0323      * spi controller device and spi_board_info for BMC.
0324      */
0325     if (val == 0) {
0326         dev_err(dev, "Nios version reg = 0x%x, skip INIT_DONE check, but the retimer may be uninitialized\n",
0327             val);
0328         return 0;
0329     }
0330
0331     if (FIELD_GET(N3000_NIOS_FW_VERSION_MAJOR, val) >= 3) {
0332         /* read NIOS_INIT to check if retimer initialization is done */
0333         ret = regmap_read(nn->regmap, N3000_NIOS_INIT, &val);
0334         if (ret)
0335             return ret;
0336
0337         /* check if retimers are initialized already */
0338         if (val & (N3000_NIOS_INIT_DONE | N3000_NIOS_INIT_START))
0339             goto nios_init_done;
0340
0341         /* configure FEC mode per module param */
0342         val = N3000_NIOS_INIT_START;
0343
0344         /*
0345          * When the retimer is to be set to 10G mode, there is no FEC
0346          * mode setting, so the REQ_FEC_MODE field will be ignored by
0347          * Nios firmware in this case. But we should still fill the FEC
0348          * mode field cause host could not get the retimer working mode
0349          * until the Nios init is done.
0350          *
0351          * For now the driver doesn't support the retimer FEC mode
0352          * switching per user's request. It is always set to Reed
0353          * Solomon FEC.
0354          *
0355          * The driver will set the same FEC mode for all links.
0356          */
0357         val |= N3000_NIOS_INIT_REQ_FEC_MODE_RS_ALL;
0358
0359         ret = regmap_write(nn->regmap, N3000_NIOS_INIT, val);
0360         if (ret)
0361             return ret;
0362     }
0363
0364 nios_init_done:
0365     /* polls on NIOS_INIT_DONE */
0366     ret = regmap_read_poll_timeout(nn->regmap, N3000_NIOS_INIT, val,
0367                        val & N3000_NIOS_INIT_DONE,
0368                        N3000_NIOS_INIT_TIME_INTV,
0369                        N3000_NIOS_INIT_TIMEOUT);
0370     if (ret)
0371         dev_err(dev, "NIOS_INIT_DONE %s\n",
0372             (ret == -ETIMEDOUT) ? "timed out" : "check error");
0373
0374     ret2 = regmap_read(nn->regmap, N3000_NIOS_PKVL_A_MODE_STS, &state_a);
0375     if (ret2)
0376         return ret2;
0377
0378     ret2 = regmap_read(nn->regmap, N3000_NIOS_PKVL_B_MODE_STS, &state_b);
0379     if (ret2)
0380         return ret2;
0381
0382     if (!ret) {
0383         /*
0384          * After INIT_DONE is detected, it still needs to check if the
0385          * Nios firmware reports any error during the retimer
0386          * configuration.
0387          */
0388         if (IS_MODE_STATUS_OK(state_a) && IS_MODE_STATUS_OK(state_b))
0389             return 0;
0390
0391         /*
0392          * If the retimer configuration is failed, the Nios firmware
0393          * will still release the spi controller for host to
0394          * communicate with the BMC. It makes possible for people to
0395          * reprogram a new Nios firmware and restore the card. So the
0396          * driver doesn't error out, it continues to create the spi
0397          * controller device and spi_board_info for BMC.
0398          */
0399         dev_err(dev, "NIOS_INIT_DONE OK, but err on retimer init\n");
0400     }
0401
0402     dev_err(nn->dev, "PKVL_A_MODE_STS 0x%x\n", state_a);
0403     dev_err(nn->dev, "PKVL_B_MODE_STS 0x%x\n", state_b);
0404
0405     return ret;
0406 }
0407
0408 static struct spi_board_info m10_n3000_info = {
0409     .modalias = "m10-n3000",
0410     .max_speed_hz = 12500000,
0411     .bus_num = 0,
0412     .chip_select = 0,
0413 };
0414
0415 static int create_altera_spi_controller(struct n3000_nios *nn)
0416 {
0417     struct altera_spi_platform_data pdata = { 0 };
0418     struct platform_device_info pdevinfo = { 0 };
0419     void __iomem *base = nn->base;
0420     u64 v;
0421
0422     v = readq(base + N3000_NS_PARAM);
0423
0424     pdata.mode_bits = SPI_CS_HIGH;
0425     if (FIELD_GET(N3000_NS_PARAM_CLK_POL, v))
0426         pdata.mode_bits |= SPI_CPOL;
0427     if (FIELD_GET(N3000_NS_PARAM_CLK_PHASE, v))
0428         pdata.mode_bits |= SPI_CPHA;
0429
0430     pdata.num_chipselect = FIELD_GET(N3000_NS_PARAM_NUM_CS, v);
0431     pdata.bits_per_word_mask =
0432         SPI_BPW_RANGE_MASK(1, FIELD_GET(N3000_NS_PARAM_DATA_WIDTH, v));
0433
0434     pdata.num_devices = 1;
0435     pdata.devices = &m10_n3000_info;
0436
0437     dev_dbg(nn->dev, "%s cs %u bpm 0x%x mode 0x%x\n", __func__,
0438         pdata.num_chipselect, pdata.bits_per_word_mask,
0439         pdata.mode_bits);
0440
0441     pdevinfo.name = "subdev_spi_altera";
0442     pdevinfo.id = PLATFORM_DEVID_AUTO;
0443     pdevinfo.parent = nn->dev;
0444     pdevinfo.data = &pdata;
0445     pdevinfo.size_data = sizeof(pdata);
0446
0447     nn->altera_spi = platform_device_register_full(&pdevinfo);
0448     return PTR_ERR_OR_ZERO(nn->altera_spi);
0449 }
0450
0451 static void destroy_altera_spi_controller(struct n3000_nios *nn)
0452 {
0453     platform_device_unregister(nn->altera_spi);
0454 }
0455
0456 static int n3000_nios_poll_stat_timeout(void __iomem *base, u64 *v)
0457 {
0458     int loops;
0459
0460     /*
0461      * We don't use the time based timeout here for performance.
0462      *
0463      * The regbus read/write is on the critical path of Intel PAC N3000
0464      * image programming. The time based timeout checking will add too much
0465      * overhead on it. Usually the state changes in 1 or 2 loops on the
0466      * test server, and we set 10000 times loop here for safety.
0467      */
0468     for (loops = N3000_NIOS_REGBUS_RETRY_COUNT; loops > 0 ; loops--) {
0469         *v = readq(base + N3000_NS_STAT);
0470         if (*v & N3000_NS_STAT_RW_VAL)
0471             break;
0472         cpu_relax();
0473     }
0474
0475     return (loops > 0) ? 0 : -ETIMEDOUT;
0476 }
0477
0478 static int n3000_nios_reg_write(void *context, unsigned int reg, unsigned int val)
0479 {
0480     struct n3000_nios *nn = context;
0481     u64 v;
0482     int ret;
0483
0484     v = FIELD_PREP(N3000_NS_CTRL_CMD_MSK, N3000_NS_CTRL_CMD_WR) |
0485         FIELD_PREP(N3000_NS_CTRL_ADDR, reg) |
0486         FIELD_PREP(N3000_NS_CTRL_WR_DATA, val);
0487     writeq(v, nn->base + N3000_NS_CTRL);
0488
0489     ret = n3000_nios_poll_stat_timeout(nn->base, &v);
0490     if (ret)
0491         dev_err(nn->dev, "fail to write reg 0x%x val 0x%x: %d\n",
0492             reg, val, ret);
0493
0494     return ret;
0495 }
0496
0497 static int n3000_nios_reg_read(void *context, unsigned int reg, unsigned int *val)
0498 {
0499     struct n3000_nios *nn = context;
0500     u64 v;
0501     int ret;
0502
0503     v = FIELD_PREP(N3000_NS_CTRL_CMD_MSK, N3000_NS_CTRL_CMD_RD) |
0504         FIELD_PREP(N3000_NS_CTRL_ADDR, reg);
0505     writeq(v, nn->base + N3000_NS_CTRL);
0506
0507     ret = n3000_nios_poll_stat_timeout(nn->base, &v);
0508     if (ret)
0509         dev_err(nn->dev, "fail to read reg 0x%x: %d\n", reg, ret);
0510     else
0511         *val = FIELD_GET(N3000_NS_STAT_RD_DATA, v);
0512
0513     return ret;
0514 }
0515
0516 static const struct regmap_config n3000_nios_regbus_cfg = {
0517     .reg_bits = 32,
0518     .reg_stride = 4,
0519     .val_bits = 32,
0520     .fast_io = true,
0521
0522     .reg_write = n3000_nios_reg_write,
0523     .reg_read = n3000_nios_reg_read,
0524 };
0525
0526 static int n3000_nios_probe(struct dfl_device *ddev)
0527 {
0528     struct device *dev = &ddev->dev;
0529     struct n3000_nios *nn;
0530     int ret;
0531
0532     nn = devm_kzalloc(dev, sizeof(*nn), GFP_KERNEL);
0533     if (!nn)
0534         return -ENOMEM;
0535
0536     dev_set_drvdata(&ddev->dev, nn);
0537
0538     nn->dev = dev;
0539
0540     nn->base = devm_ioremap_resource(&ddev->dev, &ddev->mmio_res);
0541     if (IS_ERR(nn->base))
0542         return PTR_ERR(nn->base);
0543
0544     nn->regmap = devm_regmap_init(dev, NULL, nn, &n3000_nios_regbus_cfg);
0545     if (IS_ERR(nn->regmap))
0546         return PTR_ERR(nn->regmap);
0547
0548     ret = n3000_nios_init_done_check(nn);
0549     if (ret)
0550         return ret;
0551
0552     ret = create_altera_spi_controller(nn);
0553     if (ret)
0554         dev_err(dev, "altera spi controller create failed: %d\n", ret);
0555
0556     return ret;
0557 }
0558
0559 static void n3000_nios_remove(struct dfl_device *ddev)
0560 {
0561     struct n3000_nios *nn = dev_get_drvdata(&ddev->dev);
0562
0563     destroy_altera_spi_controller(nn);
0564 }
0565
0566 #define FME_FEATURE_ID_N3000_NIOS   0xd
0567
0568 static const struct dfl_device_id n3000_nios_ids[] = {
0569     { FME_ID, FME_FEATURE_ID_N3000_NIOS },
0570     { }
0571 };
0572 MODULE_DEVICE_TABLE(dfl, n3000_nios_ids);
0573
0574 static struct dfl_driver n3000_nios_driver = {
0575     .drv    = {
0576         .name       = "dfl-n3000-nios",
0577         .dev_groups = n3000_nios_groups,
0578     },
0579     .id_table = n3000_nios_ids,
0580     .probe   = n3000_nios_probe,
0581     .remove  = n3000_nios_remove,
0582 };
0583
0584 module_dfl_driver(n3000_nios_driver);
0585
0586 MODULE_DESCRIPTION("Driver for Nios private feature on Intel PAC N3000");
0587 MODULE_AUTHOR("Intel Corporation");
0588 MODULE_LICENSE("GPL v2");