drivers/fpga/altera-pr-ip-core-plat.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Driver for Altera Partial Reconfiguration IP Core
0004  *
0005  * Copyright (C) 2016-2017 Intel Corporation
0006  *
0007  * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
0008  *  by Alan Tull <atull@opensource.altera.com>
0009  */
0010 #include <linux/fpga/altera-pr-ip-core.h>
0011 #include <linux/module.h>
0012 #include <linux/of_device.h>
0013
0014 static int alt_pr_platform_probe(struct platform_device *pdev)
0015 {
0016     struct device *dev = &pdev->dev;
0017     void __iomem *reg_base;
0018     struct resource *res;
0019
0020     /* First mmio base is for register access */
0021     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0022
0023     reg_base = devm_ioremap_resource(dev, res);
0024
0025     if (IS_ERR(reg_base))
0026         return PTR_ERR(reg_base);
0027
0028     return alt_pr_register(dev, reg_base);
0029 }
0030
0031 static const struct of_device_id alt_pr_of_match[] = {
0032     { .compatible = "altr,a10-pr-ip", },
0033     {},
0034 };
0035
0036 MODULE_DEVICE_TABLE(of, alt_pr_of_match);
0037
0038 static struct platform_driver alt_pr_platform_driver = {
0039     .probe = alt_pr_platform_probe,
0040     .driver = {
0041         .name   = "alt_a10_pr_ip",
0042         .of_match_table = alt_pr_of_match,
0043     },
0044 };
0045
0046 module_platform_driver(alt_pr_platform_driver);
0047 MODULE_AUTHOR("Matthew Gerlach <matthew.gerlach@linux.intel.com>");
0048 MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Platform Driver");
0049 MODULE_LICENSE("GPL v2");