0001
0002
0003
0004
0005
0006 #include <linux/completion.h>
0007 #include <linux/delay.h>
0008 #include <linux/genalloc.h>
0009 #include <linux/io.h>
0010 #include <linux/kfifo.h>
0011 #include <linux/kthread.h>
0012 #include <linux/module.h>
0013 #include <linux/mutex.h>
0014 #include <linux/of.h>
0015 #include <linux/of_platform.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/slab.h>
0018 #include <linux/spinlock.h>
0019 #include <linux/firmware/intel/stratix10-smc.h>
0020 #include <linux/firmware/intel/stratix10-svc-client.h>
0021 #include <linux/types.h>
0022
0023
0024
0025
0026
0027
0028
0029
0030
0031
0032
0033
0034
0035
0036 #define SVC_NUM_DATA_IN_FIFO 32
0037 #define SVC_NUM_CHANNEL 3
0038 #define FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS 200
0039 #define FPGA_CONFIG_STATUS_TIMEOUT_SEC 30
0040
0041
0042 #define STRATIX10_RSU "stratix10-rsu"
0043 #define INTEL_FCS "intel-fcs"
0044
0045 typedef void (svc_invoke_fn)(unsigned long, unsigned long, unsigned long,
0046 unsigned long, unsigned long, unsigned long,
0047 unsigned long, unsigned long,
0048 struct arm_smccc_res *);
0049 struct stratix10_svc_chan;
0050
0051
0052
0053
0054
0055 struct stratix10_svc {
0056 struct platform_device *stratix10_svc_rsu;
0057 struct platform_device *intel_svc_fcs;
0058 };
0059
0060
0061
0062
0063
0064
0065
0066
0067
0068
0069
0070
0071
0072
0073
0074 struct stratix10_svc_sh_memory {
0075 struct completion sync_complete;
0076 unsigned long addr;
0077 unsigned long size;
0078 svc_invoke_fn *invoke_fn;
0079 };
0080
0081
0082
0083
0084
0085
0086
0087
0088
0089
0090
0091
0092 struct stratix10_svc_data_mem {
0093 void *vaddr;
0094 phys_addr_t paddr;
0095 size_t size;
0096 struct list_head node;
0097 };
0098
0099
0100
0101
0102
0103
0104
0105
0106
0107
0108
0109
0110
0111
0112 struct stratix10_svc_data {
0113 struct stratix10_svc_chan *chan;
0114 phys_addr_t paddr;
0115 size_t size;
0116 phys_addr_t paddr_output;
0117 size_t size_output;
0118 u32 command;
0119 u32 flag;
0120 u64 arg[3];
0121 };
0122
0123
0124
0125
0126
0127
0128
0129
0130
0131
0132
0133
0134
0135
0136
0137
0138
0139
0140 struct stratix10_svc_controller {
0141 struct device *dev;
0142 struct stratix10_svc_chan *chans;
0143 int num_chans;
0144 int num_active_client;
0145 struct list_head node;
0146 struct gen_pool *genpool;
0147 struct task_struct *task;
0148 struct kfifo svc_fifo;
0149 struct completion complete_status;
0150 spinlock_t svc_fifo_lock;
0151 svc_invoke_fn *invoke_fn;
0152 };
0153
0154
0155
0156
0157
0158
0159
0160
0161
0162
0163
0164 struct stratix10_svc_chan {
0165 struct stratix10_svc_controller *ctrl;
0166 struct stratix10_svc_client *scl;
0167 char *name;
0168 spinlock_t lock;
0169 };
0170
0171 static LIST_HEAD(svc_ctrl);
0172 static LIST_HEAD(svc_data_mem);
0173
0174
0175
0176
0177
0178
0179
0180
0181 static void *svc_pa_to_va(unsigned long addr)
0182 {
0183 struct stratix10_svc_data_mem *pmem;
0184
0185 pr_debug("claim back P-addr=0x%016x\n", (unsigned int)addr);
0186 list_for_each_entry(pmem, &svc_data_mem, node)
0187 if (pmem->paddr == addr)
0188 return pmem->vaddr;
0189
0190
0191 return NULL;
0192 }
0193
0194
0195
0196
0197
0198
0199
0200
0201
0202
0203 static void svc_thread_cmd_data_claim(struct stratix10_svc_controller *ctrl,
0204 struct stratix10_svc_data *p_data,
0205 struct stratix10_svc_cb_data *cb_data)
0206 {
0207 struct arm_smccc_res res;
0208 unsigned long timeout;
0209
0210 reinit_completion(&ctrl->complete_status);
0211 timeout = msecs_to_jiffies(FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS);
0212
0213 pr_debug("%s: claim back the submitted buffer\n", __func__);
0214 do {
0215 ctrl->invoke_fn(INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE,
0216 0, 0, 0, 0, 0, 0, 0, &res);
0217
0218 if (res.a0 == INTEL_SIP_SMC_STATUS_OK) {
0219 if (!res.a1) {
0220 complete(&ctrl->complete_status);
0221 break;
0222 }
0223 cb_data->status = BIT(SVC_STATUS_BUFFER_DONE);
0224 cb_data->kaddr1 = svc_pa_to_va(res.a1);
0225 cb_data->kaddr2 = (res.a2) ?
0226 svc_pa_to_va(res.a2) : NULL;
0227 cb_data->kaddr3 = (res.a3) ?
0228 svc_pa_to_va(res.a3) : NULL;
0229 p_data->chan->scl->receive_cb(p_data->chan->scl,
0230 cb_data);
0231 } else {
0232 pr_debug("%s: secure world busy, polling again\n",
0233 __func__);
0234 }
0235 } while (res.a0 == INTEL_SIP_SMC_STATUS_OK ||
0236 res.a0 == INTEL_SIP_SMC_STATUS_BUSY ||
0237 wait_for_completion_timeout(&ctrl->complete_status, timeout));
0238 }
0239
0240
0241
0242
0243
0244
0245
0246
0247
0248
0249 static void svc_thread_cmd_config_status(struct stratix10_svc_controller *ctrl,
0250 struct stratix10_svc_data *p_data,
0251 struct stratix10_svc_cb_data *cb_data)
0252 {
0253 struct arm_smccc_res res;
0254 int count_in_sec;
0255 unsigned long a0, a1, a2;
0256
0257 cb_data->kaddr1 = NULL;
0258 cb_data->kaddr2 = NULL;
0259 cb_data->kaddr3 = NULL;
0260 cb_data->status = BIT(SVC_STATUS_ERROR);
0261
0262 pr_debug("%s: polling config status\n", __func__);
0263
0264 a0 = INTEL_SIP_SMC_FPGA_CONFIG_ISDONE;
0265 a1 = (unsigned long)p_data->paddr;
0266 a2 = (unsigned long)p_data->size;
0267
0268 if (p_data->command == COMMAND_POLL_SERVICE_STATUS)
0269 a0 = INTEL_SIP_SMC_SERVICE_COMPLETED;
0270
0271 count_in_sec = FPGA_CONFIG_STATUS_TIMEOUT_SEC;
0272 while (count_in_sec) {
0273 ctrl->invoke_fn(a0, a1, a2, 0, 0, 0, 0, 0, &res);
0274 if ((res.a0 == INTEL_SIP_SMC_STATUS_OK) ||
0275 (res.a0 == INTEL_SIP_SMC_STATUS_ERROR) ||
0276 (res.a0 == INTEL_SIP_SMC_STATUS_REJECTED))
0277 break;
0278
0279
0280
0281
0282
0283 msleep(1000);
0284 count_in_sec--;
0285 }
0286
0287 if (!count_in_sec) {
0288 pr_err("%s: poll status timeout\n", __func__);
0289 cb_data->status = BIT(SVC_STATUS_BUSY);
0290 } else if (res.a0 == INTEL_SIP_SMC_STATUS_OK) {
0291 cb_data->status = BIT(SVC_STATUS_COMPLETED);
0292 cb_data->kaddr2 = (res.a2) ?
0293 svc_pa_to_va(res.a2) : NULL;
0294 cb_data->kaddr3 = (res.a3) ? &res.a3 : NULL;
0295 } else {
0296 pr_err("%s: poll status error\n", __func__);
0297 cb_data->kaddr1 = &res.a1;
0298 cb_data->kaddr2 = (res.a2) ?
0299 svc_pa_to_va(res.a2) : NULL;
0300 cb_data->kaddr3 = (res.a3) ? &res.a3 : NULL;
0301 cb_data->status = BIT(SVC_STATUS_ERROR);
0302 }
0303
0304 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data);
0305 }
0306
0307
0308
0309
0310
0311
0312
0313
0314
0315 static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data,
0316 struct stratix10_svc_cb_data *cb_data,
0317 struct arm_smccc_res res)
0318 {
0319 cb_data->kaddr1 = NULL;
0320 cb_data->kaddr2 = NULL;
0321 cb_data->kaddr3 = NULL;
0322
0323 switch (p_data->command) {
0324 case COMMAND_RECONFIG:
0325 case COMMAND_RSU_UPDATE:
0326 case COMMAND_RSU_NOTIFY:
0327 case COMMAND_FCS_REQUEST_SERVICE:
0328 case COMMAND_FCS_SEND_CERTIFICATE:
0329 case COMMAND_FCS_DATA_ENCRYPTION:
0330 case COMMAND_FCS_DATA_DECRYPTION:
0331 cb_data->status = BIT(SVC_STATUS_OK);
0332 break;
0333 case COMMAND_RECONFIG_DATA_SUBMIT:
0334 cb_data->status = BIT(SVC_STATUS_BUFFER_SUBMITTED);
0335 break;
0336 case COMMAND_RECONFIG_STATUS:
0337 cb_data->status = BIT(SVC_STATUS_COMPLETED);
0338 break;
0339 case COMMAND_RSU_RETRY:
0340 case COMMAND_RSU_MAX_RETRY:
0341 case COMMAND_RSU_DCMF_STATUS:
0342 case COMMAND_FIRMWARE_VERSION:
0343 cb_data->status = BIT(SVC_STATUS_OK);
0344 cb_data->kaddr1 = &res.a1;
0345 break;
0346 case COMMAND_SMC_SVC_VERSION:
0347 cb_data->status = BIT(SVC_STATUS_OK);
0348 cb_data->kaddr1 = &res.a1;
0349 cb_data->kaddr2 = &res.a2;
0350 break;
0351 case COMMAND_RSU_DCMF_VERSION:
0352 cb_data->status = BIT(SVC_STATUS_OK);
0353 cb_data->kaddr1 = &res.a1;
0354 cb_data->kaddr2 = &res.a2;
0355 break;
0356 case COMMAND_FCS_RANDOM_NUMBER_GEN:
0357 case COMMAND_FCS_GET_PROVISION_DATA:
0358 case COMMAND_POLL_SERVICE_STATUS:
0359 cb_data->status = BIT(SVC_STATUS_OK);
0360 cb_data->kaddr1 = &res.a1;
0361 cb_data->kaddr2 = svc_pa_to_va(res.a2);
0362 cb_data->kaddr3 = &res.a3;
0363 break;
0364 default:
0365 pr_warn("it shouldn't happen\n");
0366 break;
0367 }
0368
0369 pr_debug("%s: call receive_cb\n", __func__);
0370 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data);
0371 }
0372
0373
0374
0375
0376
0377
0378
0379
0380
0381
0382
0383 static int svc_normal_to_secure_thread(void *data)
0384 {
0385 struct stratix10_svc_controller
0386 *ctrl = (struct stratix10_svc_controller *)data;
0387 struct stratix10_svc_data *pdata;
0388 struct stratix10_svc_cb_data *cbdata;
0389 struct arm_smccc_res res;
0390 unsigned long a0, a1, a2, a3, a4, a5, a6, a7;
0391 int ret_fifo = 0;
0392
0393 pdata = kmalloc(sizeof(*pdata), GFP_KERNEL);
0394 if (!pdata)
0395 return -ENOMEM;
0396
0397 cbdata = kmalloc(sizeof(*cbdata), GFP_KERNEL);
0398 if (!cbdata) {
0399 kfree(pdata);
0400 return -ENOMEM;
0401 }
0402
0403
0404 a0 = INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK;
0405 a1 = 0;
0406 a2 = 0;
0407 a3 = 0;
0408 a4 = 0;
0409 a5 = 0;
0410 a6 = 0;
0411 a7 = 0;
0412
0413 pr_debug("smc_hvc_shm_thread is running\n");
0414
0415 while (!kthread_should_stop()) {
0416 ret_fifo = kfifo_out_spinlocked(&ctrl->svc_fifo,
0417 pdata, sizeof(*pdata),
0418 &ctrl->svc_fifo_lock);
0419
0420 if (!ret_fifo)
0421 continue;
0422
0423 pr_debug("get from FIFO pa=0x%016x, command=%u, size=%u\n",
0424 (unsigned int)pdata->paddr, pdata->command,
0425 (unsigned int)pdata->size);
0426
0427 switch (pdata->command) {
0428 case COMMAND_RECONFIG_DATA_CLAIM:
0429 svc_thread_cmd_data_claim(ctrl, pdata, cbdata);
0430 continue;
0431 case COMMAND_RECONFIG:
0432 a0 = INTEL_SIP_SMC_FPGA_CONFIG_START;
0433 pr_debug("conf_type=%u\n", (unsigned int)pdata->flag);
0434 a1 = pdata->flag;
0435 a2 = 0;
0436 break;
0437 case COMMAND_RECONFIG_DATA_SUBMIT:
0438 a0 = INTEL_SIP_SMC_FPGA_CONFIG_WRITE;
0439 a1 = (unsigned long)pdata->paddr;
0440 a2 = (unsigned long)pdata->size;
0441 break;
0442 case COMMAND_RECONFIG_STATUS:
0443 a0 = INTEL_SIP_SMC_FPGA_CONFIG_ISDONE;
0444 a1 = 0;
0445 a2 = 0;
0446 break;
0447 case COMMAND_RSU_STATUS:
0448 a0 = INTEL_SIP_SMC_RSU_STATUS;
0449 a1 = 0;
0450 a2 = 0;
0451 break;
0452 case COMMAND_RSU_UPDATE:
0453 a0 = INTEL_SIP_SMC_RSU_UPDATE;
0454 a1 = pdata->arg[0];
0455 a2 = 0;
0456 break;
0457 case COMMAND_RSU_NOTIFY:
0458 a0 = INTEL_SIP_SMC_RSU_NOTIFY;
0459 a1 = pdata->arg[0];
0460 a2 = 0;
0461 break;
0462 case COMMAND_RSU_RETRY:
0463 a0 = INTEL_SIP_SMC_RSU_RETRY_COUNTER;
0464 a1 = 0;
0465 a2 = 0;
0466 break;
0467 case COMMAND_RSU_MAX_RETRY:
0468 a0 = INTEL_SIP_SMC_RSU_MAX_RETRY;
0469 a1 = 0;
0470 a2 = 0;
0471 break;
0472 case COMMAND_RSU_DCMF_VERSION:
0473 a0 = INTEL_SIP_SMC_RSU_DCMF_VERSION;
0474 a1 = 0;
0475 a2 = 0;
0476 break;
0477 case COMMAND_FIRMWARE_VERSION:
0478 a0 = INTEL_SIP_SMC_FIRMWARE_VERSION;
0479 a1 = 0;
0480 a2 = 0;
0481 break;
0482
0483
0484 case COMMAND_FCS_DATA_ENCRYPTION:
0485 a0 = INTEL_SIP_SMC_FCS_CRYPTION;
0486 a1 = 1;
0487 a2 = (unsigned long)pdata->paddr;
0488 a3 = (unsigned long)pdata->size;
0489 a4 = (unsigned long)pdata->paddr_output;
0490 a5 = (unsigned long)pdata->size_output;
0491 break;
0492 case COMMAND_FCS_DATA_DECRYPTION:
0493 a0 = INTEL_SIP_SMC_FCS_CRYPTION;
0494 a1 = 0;
0495 a2 = (unsigned long)pdata->paddr;
0496 a3 = (unsigned long)pdata->size;
0497 a4 = (unsigned long)pdata->paddr_output;
0498 a5 = (unsigned long)pdata->size_output;
0499 break;
0500 case COMMAND_FCS_RANDOM_NUMBER_GEN:
0501 a0 = INTEL_SIP_SMC_FCS_RANDOM_NUMBER;
0502 a1 = (unsigned long)pdata->paddr;
0503 a2 = 0;
0504 break;
0505 case COMMAND_FCS_REQUEST_SERVICE:
0506 a0 = INTEL_SIP_SMC_FCS_SERVICE_REQUEST;
0507 a1 = (unsigned long)pdata->paddr;
0508 a2 = (unsigned long)pdata->size;
0509 break;
0510 case COMMAND_FCS_SEND_CERTIFICATE:
0511 a0 = INTEL_SIP_SMC_FCS_SEND_CERTIFICATE;
0512 a1 = (unsigned long)pdata->paddr;
0513 a2 = (unsigned long)pdata->size;
0514 break;
0515 case COMMAND_FCS_GET_PROVISION_DATA:
0516 a0 = INTEL_SIP_SMC_FCS_GET_PROVISION_DATA;
0517 a1 = (unsigned long)pdata->paddr;
0518 a2 = 0;
0519 break;
0520
0521
0522 case COMMAND_POLL_SERVICE_STATUS:
0523 a0 = INTEL_SIP_SMC_SERVICE_COMPLETED;
0524 a1 = (unsigned long)pdata->paddr;
0525 a2 = (unsigned long)pdata->size;
0526 break;
0527 case COMMAND_RSU_DCMF_STATUS:
0528 a0 = INTEL_SIP_SMC_RSU_DCMF_STATUS;
0529 a1 = 0;
0530 a2 = 0;
0531 break;
0532 case COMMAND_SMC_SVC_VERSION:
0533 a0 = INTEL_SIP_SMC_SVC_VERSION;
0534 a1 = 0;
0535 a2 = 0;
0536 break;
0537 default:
0538 pr_warn("it shouldn't happen\n");
0539 break;
0540 }
0541 pr_debug("%s: before SMC call -- a0=0x%016x a1=0x%016x",
0542 __func__,
0543 (unsigned int)a0,
0544 (unsigned int)a1);
0545 pr_debug(" a2=0x%016x\n", (unsigned int)a2);
0546 pr_debug(" a3=0x%016x\n", (unsigned int)a3);
0547 pr_debug(" a4=0x%016x\n", (unsigned int)a4);
0548 pr_debug(" a5=0x%016x\n", (unsigned int)a5);
0549 ctrl->invoke_fn(a0, a1, a2, a3, a4, a5, a6, a7, &res);
0550
0551 pr_debug("%s: after SMC call -- res.a0=0x%016x",
0552 __func__, (unsigned int)res.a0);
0553 pr_debug(" res.a1=0x%016x, res.a2=0x%016x",
0554 (unsigned int)res.a1, (unsigned int)res.a2);
0555 pr_debug(" res.a3=0x%016x\n", (unsigned int)res.a3);
0556
0557 if (pdata->command == COMMAND_RSU_STATUS) {
0558 if (res.a0 == INTEL_SIP_SMC_RSU_ERROR)
0559 cbdata->status = BIT(SVC_STATUS_ERROR);
0560 else
0561 cbdata->status = BIT(SVC_STATUS_OK);
0562
0563 cbdata->kaddr1 = &res;
0564 cbdata->kaddr2 = NULL;
0565 cbdata->kaddr3 = NULL;
0566 pdata->chan->scl->receive_cb(pdata->chan->scl, cbdata);
0567 continue;
0568 }
0569
0570 switch (res.a0) {
0571 case INTEL_SIP_SMC_STATUS_OK:
0572 svc_thread_recv_status_ok(pdata, cbdata, res);
0573 break;
0574 case INTEL_SIP_SMC_STATUS_BUSY:
0575 switch (pdata->command) {
0576 case COMMAND_RECONFIG_DATA_SUBMIT:
0577 svc_thread_cmd_data_claim(ctrl,
0578 pdata, cbdata);
0579 break;
0580 case COMMAND_RECONFIG_STATUS:
0581 case COMMAND_POLL_SERVICE_STATUS:
0582 svc_thread_cmd_config_status(ctrl,
0583 pdata, cbdata);
0584 break;
0585 default:
0586 pr_warn("it shouldn't happen\n");
0587 break;
0588 }
0589 break;
0590 case INTEL_SIP_SMC_STATUS_REJECTED:
0591 pr_debug("%s: STATUS_REJECTED\n", __func__);
0592
0593 switch (pdata->command) {
0594 case COMMAND_FCS_REQUEST_SERVICE:
0595 case COMMAND_FCS_SEND_CERTIFICATE:
0596 case COMMAND_FCS_GET_PROVISION_DATA:
0597 case COMMAND_FCS_DATA_ENCRYPTION:
0598 case COMMAND_FCS_DATA_DECRYPTION:
0599 case COMMAND_FCS_RANDOM_NUMBER_GEN:
0600 cbdata->status = BIT(SVC_STATUS_INVALID_PARAM);
0601 cbdata->kaddr1 = NULL;
0602 cbdata->kaddr2 = NULL;
0603 cbdata->kaddr3 = NULL;
0604 pdata->chan->scl->receive_cb(pdata->chan->scl,
0605 cbdata);
0606 break;
0607 }
0608 break;
0609 case INTEL_SIP_SMC_STATUS_ERROR:
0610 case INTEL_SIP_SMC_RSU_ERROR:
0611 pr_err("%s: STATUS_ERROR\n", __func__);
0612 cbdata->status = BIT(SVC_STATUS_ERROR);
0613 cbdata->kaddr1 = &res.a1;
0614 cbdata->kaddr2 = (res.a2) ?
0615 svc_pa_to_va(res.a2) : NULL;
0616 cbdata->kaddr3 = (res.a3) ? &res.a3 : NULL;
0617 pdata->chan->scl->receive_cb(pdata->chan->scl, cbdata);
0618 break;
0619 default:
0620 pr_warn("Secure firmware doesn't support...\n");
0621
0622
0623
0624
0625
0626 if ((pdata->command != COMMAND_RSU_UPDATE) &&
0627 (pdata->command != COMMAND_RSU_STATUS)) {
0628 cbdata->status =
0629 BIT(SVC_STATUS_NO_SUPPORT);
0630 cbdata->kaddr1 = NULL;
0631 cbdata->kaddr2 = NULL;
0632 cbdata->kaddr3 = NULL;
0633 pdata->chan->scl->receive_cb(
0634 pdata->chan->scl, cbdata);
0635 }
0636 break;
0637
0638 }
0639 }
0640
0641 kfree(cbdata);
0642 kfree(pdata);
0643
0644 return 0;
0645 }
0646
0647
0648
0649
0650
0651
0652
0653
0654
0655
0656
0657
0658
0659
0660 static int svc_normal_to_secure_shm_thread(void *data)
0661 {
0662 struct stratix10_svc_sh_memory
0663 *sh_mem = (struct stratix10_svc_sh_memory *)data;
0664 struct arm_smccc_res res;
0665
0666
0667 sh_mem->invoke_fn(INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM,
0668 0, 0, 0, 0, 0, 0, 0, &res);
0669 if (res.a0 == INTEL_SIP_SMC_STATUS_OK) {
0670 sh_mem->addr = res.a1;
0671 sh_mem->size = res.a2;
0672 } else {
0673 pr_err("%s: after SMC call -- res.a0=0x%016x", __func__,
0674 (unsigned int)res.a0);
0675 sh_mem->addr = 0;
0676 sh_mem->size = 0;
0677 }
0678
0679 complete(&sh_mem->sync_complete);
0680 return 0;
0681 }
0682
0683
0684
0685
0686
0687
0688
0689
0690
0691 static int svc_get_sh_memory(struct platform_device *pdev,
0692 struct stratix10_svc_sh_memory *sh_memory)
0693 {
0694 struct device *dev = &pdev->dev;
0695 struct task_struct *sh_memory_task;
0696 unsigned int cpu = 0;
0697
0698 init_completion(&sh_memory->sync_complete);
0699
0700
0701 sh_memory_task = kthread_create_on_node(svc_normal_to_secure_shm_thread,
0702 (void *)sh_memory,
0703 cpu_to_node(cpu),
0704 "svc_smc_hvc_shm_thread");
0705 if (IS_ERR(sh_memory_task)) {
0706 dev_err(dev, "fail to create stratix10_svc_smc_shm_thread\n");
0707 return -EINVAL;
0708 }
0709
0710 wake_up_process(sh_memory_task);
0711
0712 if (!wait_for_completion_timeout(&sh_memory->sync_complete, 10 * HZ)) {
0713 dev_err(dev,
0714 "timeout to get sh-memory paras from secure world\n");
0715 return -ETIMEDOUT;
0716 }
0717
0718 if (!sh_memory->addr || !sh_memory->size) {
0719 dev_err(dev,
0720 "failed to get shared memory info from secure world\n");
0721 return -ENOMEM;
0722 }
0723
0724 dev_dbg(dev, "SM software provides paddr: 0x%016x, size: 0x%08x\n",
0725 (unsigned int)sh_memory->addr,
0726 (unsigned int)sh_memory->size);
0727
0728 return 0;
0729 }
0730
0731
0732
0733
0734
0735
0736
0737
0738 static struct gen_pool *
0739 svc_create_memory_pool(struct platform_device *pdev,
0740 struct stratix10_svc_sh_memory *sh_memory)
0741 {
0742 struct device *dev = &pdev->dev;
0743 struct gen_pool *genpool;
0744 unsigned long vaddr;
0745 phys_addr_t paddr;
0746 size_t size;
0747 phys_addr_t begin;
0748 phys_addr_t end;
0749 void *va;
0750 size_t page_mask = PAGE_SIZE - 1;
0751 int min_alloc_order = 3;
0752 int ret;
0753
0754 begin = roundup(sh_memory->addr, PAGE_SIZE);
0755 end = rounddown(sh_memory->addr + sh_memory->size, PAGE_SIZE);
0756 paddr = begin;
0757 size = end - begin;
0758 va = memremap(paddr, size, MEMREMAP_WC);
0759 if (!va) {
0760 dev_err(dev, "fail to remap shared memory\n");
0761 return ERR_PTR(-EINVAL);
0762 }
0763 vaddr = (unsigned long)va;
0764 dev_dbg(dev,
0765 "reserved memory vaddr: %p, paddr: 0x%16x size: 0x%8x\n",
0766 va, (unsigned int)paddr, (unsigned int)size);
0767 if ((vaddr & page_mask) || (paddr & page_mask) ||
0768 (size & page_mask)) {
0769 dev_err(dev, "page is not aligned\n");
0770 return ERR_PTR(-EINVAL);
0771 }
0772 genpool = gen_pool_create(min_alloc_order, -1);
0773 if (!genpool) {
0774 dev_err(dev, "fail to create genpool\n");
0775 return ERR_PTR(-ENOMEM);
0776 }
0777 gen_pool_set_algo(genpool, gen_pool_best_fit, NULL);
0778 ret = gen_pool_add_virt(genpool, vaddr, paddr, size, -1);
0779 if (ret) {
0780 dev_err(dev, "fail to add memory chunk to the pool\n");
0781 gen_pool_destroy(genpool);
0782 return ERR_PTR(ret);
0783 }
0784
0785 return genpool;
0786 }
0787
0788
0789
0790
0791
0792
0793
0794
0795
0796
0797
0798
0799
0800 static void svc_smccc_smc(unsigned long a0, unsigned long a1,
0801 unsigned long a2, unsigned long a3,
0802 unsigned long a4, unsigned long a5,
0803 unsigned long a6, unsigned long a7,
0804 struct arm_smccc_res *res)
0805 {
0806 arm_smccc_smc(a0, a1, a2, a3, a4, a5, a6, a7, res);
0807 }
0808
0809
0810
0811
0812
0813
0814
0815
0816
0817
0818
0819
0820
0821 static void svc_smccc_hvc(unsigned long a0, unsigned long a1,
0822 unsigned long a2, unsigned long a3,
0823 unsigned long a4, unsigned long a5,
0824 unsigned long a6, unsigned long a7,
0825 struct arm_smccc_res *res)
0826 {
0827 arm_smccc_hvc(a0, a1, a2, a3, a4, a5, a6, a7, res);
0828 }
0829
0830
0831
0832
0833
0834
0835
0836 static svc_invoke_fn *get_invoke_func(struct device *dev)
0837 {
0838 const char *method;
0839
0840 if (of_property_read_string(dev->of_node, "method", &method)) {
0841 dev_warn(dev, "missing \"method\" property\n");
0842 return ERR_PTR(-ENXIO);
0843 }
0844
0845 if (!strcmp(method, "smc"))
0846 return svc_smccc_smc;
0847 if (!strcmp(method, "hvc"))
0848 return svc_smccc_hvc;
0849
0850 dev_warn(dev, "invalid \"method\" property: %s\n", method);
0851
0852 return ERR_PTR(-EINVAL);
0853 }
0854
0855
0856
0857
0858
0859
0860
0861
0862
0863
0864
0865 struct stratix10_svc_chan *stratix10_svc_request_channel_byname(
0866 struct stratix10_svc_client *client, const char *name)
0867 {
0868 struct device *dev = client->dev;
0869 struct stratix10_svc_controller *controller;
0870 struct stratix10_svc_chan *chan = NULL;
0871 unsigned long flag;
0872 int i;
0873
0874
0875 if (list_empty(&svc_ctrl))
0876 return ERR_PTR(-EPROBE_DEFER);
0877
0878 controller = list_first_entry(&svc_ctrl,
0879 struct stratix10_svc_controller, node);
0880 for (i = 0; i < SVC_NUM_CHANNEL; i++) {
0881 if (!strcmp(controller->chans[i].name, name)) {
0882 chan = &controller->chans[i];
0883 break;
0884 }
0885 }
0886
0887
0888 if (i == SVC_NUM_CHANNEL) {
0889 dev_err(dev, "%s: channel not allocated\n", __func__);
0890 return ERR_PTR(-EINVAL);
0891 }
0892
0893 if (chan->scl || !try_module_get(controller->dev->driver->owner)) {
0894 dev_dbg(dev, "%s: svc not free\n", __func__);
0895 return ERR_PTR(-EBUSY);
0896 }
0897
0898 spin_lock_irqsave(&chan->lock, flag);
0899 chan->scl = client;
0900 chan->ctrl->num_active_client++;
0901 spin_unlock_irqrestore(&chan->lock, flag);
0902
0903 return chan;
0904 }
0905 EXPORT_SYMBOL_GPL(stratix10_svc_request_channel_byname);
0906
0907
0908
0909
0910
0911
0912
0913 void stratix10_svc_free_channel(struct stratix10_svc_chan *chan)
0914 {
0915 unsigned long flag;
0916
0917 spin_lock_irqsave(&chan->lock, flag);
0918 chan->scl = NULL;
0919 chan->ctrl->num_active_client--;
0920 module_put(chan->ctrl->dev->driver->owner);
0921 spin_unlock_irqrestore(&chan->lock, flag);
0922 }
0923 EXPORT_SYMBOL_GPL(stratix10_svc_free_channel);
0924
0925
0926
0927
0928
0929
0930
0931
0932
0933
0934
0935
0936 int stratix10_svc_send(struct stratix10_svc_chan *chan, void *msg)
0937 {
0938 struct stratix10_svc_client_msg
0939 *p_msg = (struct stratix10_svc_client_msg *)msg;
0940 struct stratix10_svc_data_mem *p_mem;
0941 struct stratix10_svc_data *p_data;
0942 int ret = 0;
0943 unsigned int cpu = 0;
0944
0945 p_data = kzalloc(sizeof(*p_data), GFP_KERNEL);
0946 if (!p_data)
0947 return -ENOMEM;
0948
0949
0950 if (!chan->ctrl->task) {
0951 chan->ctrl->task =
0952 kthread_create_on_node(svc_normal_to_secure_thread,
0953 (void *)chan->ctrl,
0954 cpu_to_node(cpu),
0955 "svc_smc_hvc_thread");
0956 if (IS_ERR(chan->ctrl->task)) {
0957 dev_err(chan->ctrl->dev,
0958 "failed to create svc_smc_hvc_thread\n");
0959 kfree(p_data);
0960 return -EINVAL;
0961 }
0962 kthread_bind(chan->ctrl->task, cpu);
0963 wake_up_process(chan->ctrl->task);
0964 }
0965
0966 pr_debug("%s: sent P-va=%p, P-com=%x, P-size=%u\n", __func__,
0967 p_msg->payload, p_msg->command,
0968 (unsigned int)p_msg->payload_length);
0969
0970 if (list_empty(&svc_data_mem)) {
0971 if (p_msg->command == COMMAND_RECONFIG) {
0972 struct stratix10_svc_command_config_type *ct =
0973 (struct stratix10_svc_command_config_type *)
0974 p_msg->payload;
0975 p_data->flag = ct->flags;
0976 }
0977 } else {
0978 list_for_each_entry(p_mem, &svc_data_mem, node)
0979 if (p_mem->vaddr == p_msg->payload) {
0980 p_data->paddr = p_mem->paddr;
0981 p_data->size = p_msg->payload_length;
0982 break;
0983 }
0984 if (p_msg->payload_output) {
0985 list_for_each_entry(p_mem, &svc_data_mem, node)
0986 if (p_mem->vaddr == p_msg->payload_output) {
0987 p_data->paddr_output =
0988 p_mem->paddr;
0989 p_data->size_output =
0990 p_msg->payload_length_output;
0991 break;
0992 }
0993 }
0994 }
0995
0996 p_data->command = p_msg->command;
0997 p_data->arg[0] = p_msg->arg[0];
0998 p_data->arg[1] = p_msg->arg[1];
0999 p_data->arg[2] = p_msg->arg[2];
1000 p_data->size = p_msg->payload_length;
1001 p_data->chan = chan;
1002 pr_debug("%s: put to FIFO pa=0x%016x, cmd=%x, size=%u\n", __func__,
1003 (unsigned int)p_data->paddr, p_data->command,
1004 (unsigned int)p_data->size);
1005 ret = kfifo_in_spinlocked(&chan->ctrl->svc_fifo, p_data,
1006 sizeof(*p_data),
1007 &chan->ctrl->svc_fifo_lock);
1008
1009 kfree(p_data);
1010
1011 if (!ret)
1012 return -ENOBUFS;
1013
1014 return 0;
1015 }
1016 EXPORT_SYMBOL_GPL(stratix10_svc_send);
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026 void stratix10_svc_done(struct stratix10_svc_chan *chan)
1027 {
1028
1029 if (chan->ctrl->task && chan->ctrl->num_active_client <= 1) {
1030 pr_debug("svc_smc_hvc_shm_thread is stopped\n");
1031 kthread_stop(chan->ctrl->task);
1032 chan->ctrl->task = NULL;
1033 }
1034 }
1035 EXPORT_SYMBOL_GPL(stratix10_svc_done);
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047 void *stratix10_svc_allocate_memory(struct stratix10_svc_chan *chan,
1048 size_t size)
1049 {
1050 struct stratix10_svc_data_mem *pmem;
1051 unsigned long va;
1052 phys_addr_t pa;
1053 struct gen_pool *genpool = chan->ctrl->genpool;
1054 size_t s = roundup(size, 1 << genpool->min_alloc_order);
1055
1056 pmem = devm_kzalloc(chan->ctrl->dev, sizeof(*pmem), GFP_KERNEL);
1057 if (!pmem)
1058 return ERR_PTR(-ENOMEM);
1059
1060 va = gen_pool_alloc(genpool, s);
1061 if (!va)
1062 return ERR_PTR(-ENOMEM);
1063
1064 memset((void *)va, 0, s);
1065 pa = gen_pool_virt_to_phys(genpool, va);
1066
1067 pmem->vaddr = (void *)va;
1068 pmem->paddr = pa;
1069 pmem->size = s;
1070 list_add_tail(&pmem->node, &svc_data_mem);
1071 pr_debug("%s: va=%p, pa=0x%016x\n", __func__,
1072 pmem->vaddr, (unsigned int)pmem->paddr);
1073
1074 return (void *)va;
1075 }
1076 EXPORT_SYMBOL_GPL(stratix10_svc_allocate_memory);
1077
1078
1079
1080
1081
1082
1083
1084
1085 void stratix10_svc_free_memory(struct stratix10_svc_chan *chan, void *kaddr)
1086 {
1087 struct stratix10_svc_data_mem *pmem;
1088
1089 list_for_each_entry(pmem, &svc_data_mem, node)
1090 if (pmem->vaddr == kaddr) {
1091 gen_pool_free(chan->ctrl->genpool,
1092 (unsigned long)kaddr, pmem->size);
1093 pmem->vaddr = NULL;
1094 list_del(&pmem->node);
1095 return;
1096 }
1097
1098 list_del(&svc_data_mem);
1099 }
1100 EXPORT_SYMBOL_GPL(stratix10_svc_free_memory);
1101
1102 static const struct of_device_id stratix10_svc_drv_match[] = {
1103 {.compatible = "intel,stratix10-svc"},
1104 {.compatible = "intel,agilex-svc"},
1105 {},
1106 };
1107
1108 static int stratix10_svc_drv_probe(struct platform_device *pdev)
1109 {
1110 struct device *dev = &pdev->dev;
1111 struct stratix10_svc_controller *controller;
1112 struct stratix10_svc_chan *chans;
1113 struct gen_pool *genpool;
1114 struct stratix10_svc_sh_memory *sh_memory;
1115 struct stratix10_svc *svc;
1116
1117 svc_invoke_fn *invoke_fn;
1118 size_t fifo_size;
1119 int ret;
1120
1121
1122 invoke_fn = get_invoke_func(dev);
1123 if (IS_ERR(invoke_fn))
1124 return -EINVAL;
1125
1126 sh_memory = devm_kzalloc(dev, sizeof(*sh_memory), GFP_KERNEL);
1127 if (!sh_memory)
1128 return -ENOMEM;
1129
1130 sh_memory->invoke_fn = invoke_fn;
1131 ret = svc_get_sh_memory(pdev, sh_memory);
1132 if (ret)
1133 return ret;
1134
1135 genpool = svc_create_memory_pool(pdev, sh_memory);
1136 if (!genpool)
1137 return -ENOMEM;
1138
1139
1140 controller = devm_kzalloc(dev, sizeof(*controller), GFP_KERNEL);
1141 if (!controller)
1142 return -ENOMEM;
1143
1144 chans = devm_kmalloc_array(dev, SVC_NUM_CHANNEL,
1145 sizeof(*chans), GFP_KERNEL | __GFP_ZERO);
1146 if (!chans)
1147 return -ENOMEM;
1148
1149 controller->dev = dev;
1150 controller->num_chans = SVC_NUM_CHANNEL;
1151 controller->num_active_client = 0;
1152 controller->chans = chans;
1153 controller->genpool = genpool;
1154 controller->task = NULL;
1155 controller->invoke_fn = invoke_fn;
1156 init_completion(&controller->complete_status);
1157
1158 fifo_size = sizeof(struct stratix10_svc_data) * SVC_NUM_DATA_IN_FIFO;
1159 ret = kfifo_alloc(&controller->svc_fifo, fifo_size, GFP_KERNEL);
1160 if (ret) {
1161 dev_err(dev, "failed to allocate FIFO\n");
1162 return ret;
1163 }
1164 spin_lock_init(&controller->svc_fifo_lock);
1165
1166 chans[0].scl = NULL;
1167 chans[0].ctrl = controller;
1168 chans[0].name = SVC_CLIENT_FPGA;
1169 spin_lock_init(&chans[0].lock);
1170
1171 chans[1].scl = NULL;
1172 chans[1].ctrl = controller;
1173 chans[1].name = SVC_CLIENT_RSU;
1174 spin_lock_init(&chans[1].lock);
1175
1176 chans[2].scl = NULL;
1177 chans[2].ctrl = controller;
1178 chans[2].name = SVC_CLIENT_FCS;
1179 spin_lock_init(&chans[2].lock);
1180
1181 list_add_tail(&controller->node, &svc_ctrl);
1182 platform_set_drvdata(pdev, controller);
1183
1184
1185 svc = devm_kzalloc(dev, sizeof(*svc), GFP_KERNEL);
1186 if (!svc) {
1187 ret = -ENOMEM;
1188 goto err_free_kfifo;
1189 }
1190
1191 svc->stratix10_svc_rsu = platform_device_alloc(STRATIX10_RSU, 0);
1192 if (!svc->stratix10_svc_rsu) {
1193 dev_err(dev, "failed to allocate %s device\n", STRATIX10_RSU);
1194 ret = -ENOMEM;
1195 goto err_free_kfifo;
1196 }
1197
1198 ret = platform_device_add(svc->stratix10_svc_rsu);
1199 if (ret) {
1200 platform_device_put(svc->stratix10_svc_rsu);
1201 return ret;
1202 }
1203
1204 svc->intel_svc_fcs = platform_device_alloc(INTEL_FCS, 1);
1205 if (!svc->intel_svc_fcs) {
1206 dev_err(dev, "failed to allocate %s device\n", INTEL_FCS);
1207 return -ENOMEM;
1208 }
1209
1210 ret = platform_device_add(svc->intel_svc_fcs);
1211 if (ret) {
1212 platform_device_put(svc->intel_svc_fcs);
1213 return ret;
1214 }
1215
1216 dev_set_drvdata(dev, svc);
1217
1218 pr_info("Intel Service Layer Driver Initialized\n");
1219
1220 return 0;
1221
1222 err_free_kfifo:
1223 kfifo_free(&controller->svc_fifo);
1224 return ret;
1225 }
1226
1227 static int stratix10_svc_drv_remove(struct platform_device *pdev)
1228 {
1229 struct stratix10_svc *svc = dev_get_drvdata(&pdev->dev);
1230 struct stratix10_svc_controller *ctrl = platform_get_drvdata(pdev);
1231
1232 platform_device_unregister(svc->intel_svc_fcs);
1233 platform_device_unregister(svc->stratix10_svc_rsu);
1234
1235 kfifo_free(&ctrl->svc_fifo);
1236 if (ctrl->task) {
1237 kthread_stop(ctrl->task);
1238 ctrl->task = NULL;
1239 }
1240 if (ctrl->genpool)
1241 gen_pool_destroy(ctrl->genpool);
1242 list_del(&ctrl->node);
1243
1244 return 0;
1245 }
1246
1247 static struct platform_driver stratix10_svc_driver = {
1248 .probe = stratix10_svc_drv_probe,
1249 .remove = stratix10_svc_drv_remove,
1250 .driver = {
1251 .name = "stratix10-svc",
1252 .of_match_table = stratix10_svc_drv_match,
1253 },
1254 };
1255
1256 static int __init stratix10_svc_init(void)
1257 {
1258 struct device_node *fw_np;
1259 struct device_node *np;
1260 int ret;
1261
1262 fw_np = of_find_node_by_name(NULL, "firmware");
1263 if (!fw_np)
1264 return -ENODEV;
1265
1266 np = of_find_matching_node(fw_np, stratix10_svc_drv_match);
1267 if (!np)
1268 return -ENODEV;
1269
1270 of_node_put(np);
1271 ret = of_platform_populate(fw_np, stratix10_svc_drv_match, NULL, NULL);
1272 if (ret)
1273 return ret;
1274
1275 return platform_driver_register(&stratix10_svc_driver);
1276 }
1277
1278 static void __exit stratix10_svc_exit(void)
1279 {
1280 return platform_driver_unregister(&stratix10_svc_driver);
1281 }
1282
1283 subsys_initcall(stratix10_svc_init);
1284 module_exit(stratix10_svc_exit);
1285
1286 MODULE_LICENSE("GPL v2");
1287 MODULE_DESCRIPTION("Intel Stratix10 Service Layer Driver");
1288 MODULE_AUTHOR("Richard Gong <richard.gong@intel.com>");
1289 MODULE_ALIAS("platform:stratix10-svc");