drivers/firmware/qcom_scm-legacy.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /* Copyright (c) 2010,2015,2019 The Linux Foundation. All rights reserved.
0003  * Copyright (C) 2015 Linaro Ltd.
0004  */
0005
0006 #include <linux/slab.h>
0007 #include <linux/io.h>
0008 #include <linux/module.h>
0009 #include <linux/mutex.h>
0010 #include <linux/errno.h>
0011 #include <linux/err.h>
0012 #include <linux/qcom_scm.h>
0013 #include <linux/arm-smccc.h>
0014 #include <linux/dma-mapping.h>
0015
0016 #include "qcom_scm.h"
0017
0018 static DEFINE_MUTEX(qcom_scm_lock);
0019
0020
0021 /**
0022  * struct arm_smccc_args
0023  * @args:   The array of values used in registers in smc instruction
0024  */
0025 struct arm_smccc_args {
0026     unsigned long args[8];
0027 };
0028
0029
0030 /**
0031  * struct scm_legacy_command - one SCM command buffer
0032  * @len: total available memory for command and response
0033  * @buf_offset: start of command buffer
0034  * @resp_hdr_offset: start of response buffer
0035  * @id: command to be executed
0036  * @buf: buffer returned from scm_legacy_get_command_buffer()
0037  *
0038  * An SCM command is laid out in memory as follows:
0039  *
0040  *  ------------------- <--- struct scm_legacy_command
0041  *  | command header  |
0042  *  ------------------- <--- scm_legacy_get_command_buffer()
0043  *  | command buffer  |
0044  *  ------------------- <--- struct scm_legacy_response and
0045  *  | response header |      scm_legacy_command_to_response()
0046  *  ------------------- <--- scm_legacy_get_response_buffer()
0047  *  | response buffer |
0048  *  -------------------
0049  *
0050  * There can be arbitrary padding between the headers and buffers so
0051  * you should always use the appropriate scm_legacy_get_*_buffer() routines
0052  * to access the buffers in a safe manner.
0053  */
0054 struct scm_legacy_command {
0055     __le32 len;
0056     __le32 buf_offset;
0057     __le32 resp_hdr_offset;
0058     __le32 id;
0059     __le32 buf[];
0060 };
0061
0062 /**
0063  * struct scm_legacy_response - one SCM response buffer
0064  * @len: total available memory for response
0065  * @buf_offset: start of response data relative to start of scm_legacy_response
0066  * @is_complete: indicates if the command has finished processing
0067  */
0068 struct scm_legacy_response {
0069     __le32 len;
0070     __le32 buf_offset;
0071     __le32 is_complete;
0072 };
0073
0074 /**
0075  * scm_legacy_command_to_response() - Get a pointer to a scm_legacy_response
0076  * @cmd: command
0077  *
0078  * Returns a pointer to a response for a command.
0079  */
0080 static inline struct scm_legacy_response *scm_legacy_command_to_response(
0081         const struct scm_legacy_command *cmd)
0082 {
0083     return (void *)cmd + le32_to_cpu(cmd->resp_hdr_offset);
0084 }
0085
0086 /**
0087  * scm_legacy_get_command_buffer() - Get a pointer to a command buffer
0088  * @cmd: command
0089  *
0090  * Returns a pointer to the command buffer of a command.
0091  */
0092 static inline void *scm_legacy_get_command_buffer(
0093         const struct scm_legacy_command *cmd)
0094 {
0095     return (void *)cmd->buf;
0096 }
0097
0098 /**
0099  * scm_legacy_get_response_buffer() - Get a pointer to a response buffer
0100  * @rsp: response
0101  *
0102  * Returns a pointer to a response buffer of a response.
0103  */
0104 static inline void *scm_legacy_get_response_buffer(
0105         const struct scm_legacy_response *rsp)
0106 {
0107     return (void *)rsp + le32_to_cpu(rsp->buf_offset);
0108 }
0109
0110 static void __scm_legacy_do(const struct arm_smccc_args *smc,
0111                 struct arm_smccc_res *res)
0112 {
0113     do {
0114         arm_smccc_smc(smc->args[0], smc->args[1], smc->args[2],
0115                   smc->args[3], smc->args[4], smc->args[5],
0116                   smc->args[6], smc->args[7], res);
0117     } while (res->a0 == QCOM_SCM_INTERRUPTED);
0118 }
0119
0120 /**
0121  * scm_legacy_call() - Sends a command to the SCM and waits for the command to
0122  * finish processing.
0123  * @dev:    device
0124  * @desc:   descriptor structure containing arguments and return values
0125  * @res:        results from SMC call
0126  *
0127  * A note on cache maintenance:
0128  * Note that any buffers that are expected to be accessed by the secure world
0129  * must be flushed before invoking qcom_scm_call and invalidated in the cache
0130  * immediately after qcom_scm_call returns. Cache maintenance on the command
0131  * and response buffers is taken care of by qcom_scm_call; however, callers are
0132  * responsible for any other cached buffers passed over to the secure world.
0133  */
0134 int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
0135             struct qcom_scm_res *res)
0136 {
0137     u8 arglen = desc->arginfo & 0xf;
0138     int ret = 0, context_id;
0139     unsigned int i;
0140     struct scm_legacy_command *cmd;
0141     struct scm_legacy_response *rsp;
0142     struct arm_smccc_args smc = {0};
0143     struct arm_smccc_res smc_res;
0144     const size_t cmd_len = arglen * sizeof(__le32);
0145     const size_t resp_len = MAX_QCOM_SCM_RETS * sizeof(__le32);
0146     size_t alloc_len = sizeof(*cmd) + cmd_len + sizeof(*rsp) + resp_len;
0147     dma_addr_t cmd_phys;
0148     __le32 *arg_buf;
0149     const __le32 *res_buf;
0150
0151     cmd = kzalloc(PAGE_ALIGN(alloc_len), GFP_KERNEL);
0152     if (!cmd)
0153         return -ENOMEM;
0154
0155     cmd->len = cpu_to_le32(alloc_len);
0156     cmd->buf_offset = cpu_to_le32(sizeof(*cmd));
0157     cmd->resp_hdr_offset = cpu_to_le32(sizeof(*cmd) + cmd_len);
0158     cmd->id = cpu_to_le32(SCM_LEGACY_FNID(desc->svc, desc->cmd));
0159
0160     arg_buf = scm_legacy_get_command_buffer(cmd);
0161     for (i = 0; i < arglen; i++)
0162         arg_buf[i] = cpu_to_le32(desc->args[i]);
0163
0164     rsp = scm_legacy_command_to_response(cmd);
0165
0166     cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
0167     if (dma_mapping_error(dev, cmd_phys)) {
0168         kfree(cmd);
0169         return -ENOMEM;
0170     }
0171
0172     smc.args[0] = 1;
0173     smc.args[1] = (unsigned long)&context_id;
0174     smc.args[2] = cmd_phys;
0175
0176     mutex_lock(&qcom_scm_lock);
0177     __scm_legacy_do(&smc, &smc_res);
0178     if (smc_res.a0)
0179         ret = qcom_scm_remap_error(smc_res.a0);
0180     mutex_unlock(&qcom_scm_lock);
0181     if (ret)
0182         goto out;
0183
0184     do {
0185         dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len,
0186                     sizeof(*rsp), DMA_FROM_DEVICE);
0187     } while (!rsp->is_complete);
0188
0189     dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
0190                 le32_to_cpu(rsp->buf_offset),
0191                 resp_len, DMA_FROM_DEVICE);
0192
0193     if (res) {
0194         res_buf = scm_legacy_get_response_buffer(rsp);
0195         for (i = 0; i < MAX_QCOM_SCM_RETS; i++)
0196             res->result[i] = le32_to_cpu(res_buf[i]);
0197     }
0198 out:
0199     dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
0200     kfree(cmd);
0201     return ret;
0202 }
0203
0204 #define SCM_LEGACY_ATOMIC_N_REG_ARGS    5
0205 #define SCM_LEGACY_ATOMIC_FIRST_REG_IDX 2
0206 #define SCM_LEGACY_CLASS_REGISTER       (0x2 << 8)
0207 #define SCM_LEGACY_MASK_IRQS        BIT(5)
0208 #define SCM_LEGACY_ATOMIC_ID(svc, cmd, n) \
0209                 ((SCM_LEGACY_FNID(svc, cmd) << 12) | \
0210                 SCM_LEGACY_CLASS_REGISTER | \
0211                 SCM_LEGACY_MASK_IRQS | \
0212                 (n & 0xf))
0213
0214 /**
0215  * scm_legacy_call_atomic() - Send an atomic SCM command with up to 5 arguments
0216  * and 3 return values
0217  * @unused: device, legacy argument, not used, can be NULL
0218  * @desc: SCM call descriptor containing arguments
0219  * @res:  SCM call return values
0220  *
0221  * This shall only be used with commands that are guaranteed to be
0222  * uninterruptable, atomic and SMP safe.
0223  */
0224 int scm_legacy_call_atomic(struct device *unused,
0225                const struct qcom_scm_desc *desc,
0226                struct qcom_scm_res *res)
0227 {
0228     int context_id;
0229     struct arm_smccc_res smc_res;
0230     size_t arglen = desc->arginfo & 0xf;
0231
0232     BUG_ON(arglen > SCM_LEGACY_ATOMIC_N_REG_ARGS);
0233
0234     arm_smccc_smc(SCM_LEGACY_ATOMIC_ID(desc->svc, desc->cmd, arglen),
0235               (unsigned long)&context_id,
0236               desc->args[0], desc->args[1], desc->args[2],
0237               desc->args[3], desc->args[4], 0, &smc_res);
0238
0239     if (res) {
0240         res->result[0] = smc_res.a1;
0241         res->result[1] = smc_res.a2;
0242         res->result[2] = smc_res.a3;
0243     }
0244
0245     return smc_res.a0;
0246 }