firmware/efi/cper-x86.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 // Copyright (C) 2018, Advanced Micro Devices, Inc.
0003
0004 #include <linux/cper.h>
0005 #include <linux/acpi.h>
0006
0007 /*
0008  * We don't need a "CPER_IA" prefix since these are all locally defined.
0009  * This will save us a lot of line space.
0010  */
0011 #define VALID_LAPIC_ID          BIT_ULL(0)
0012 #define VALID_CPUID_INFO        BIT_ULL(1)
0013 #define VALID_PROC_ERR_INFO_NUM(bits)   (((bits) & GENMASK_ULL(7, 2)) >> 2)
0014 #define VALID_PROC_CXT_INFO_NUM(bits)   (((bits) & GENMASK_ULL(13, 8)) >> 8)
0015
0016 #define INFO_ERR_STRUCT_TYPE_CACHE                  \
0017     GUID_INIT(0xA55701F5, 0xE3EF, 0x43DE, 0xAC, 0x72, 0x24, 0x9B,   \
0018           0x57, 0x3F, 0xAD, 0x2C)
0019 #define INFO_ERR_STRUCT_TYPE_TLB                    \
0020     GUID_INIT(0xFC06B535, 0x5E1F, 0x4562, 0x9F, 0x25, 0x0A, 0x3B,   \
0021           0x9A, 0xDB, 0x63, 0xC3)
0022 #define INFO_ERR_STRUCT_TYPE_BUS                    \
0023     GUID_INIT(0x1CF3F8B3, 0xC5B1, 0x49a2, 0xAA, 0x59, 0x5E, 0xEF,   \
0024           0x92, 0xFF, 0xA6, 0x3C)
0025 #define INFO_ERR_STRUCT_TYPE_MS                     \
0026     GUID_INIT(0x48AB7F57, 0xDC34, 0x4f6c, 0xA7, 0xD3, 0xB0, 0xB5,   \
0027           0xB0, 0xA7, 0x43, 0x14)
0028
0029 #define INFO_VALID_CHECK_INFO       BIT_ULL(0)
0030 #define INFO_VALID_TARGET_ID        BIT_ULL(1)
0031 #define INFO_VALID_REQUESTOR_ID     BIT_ULL(2)
0032 #define INFO_VALID_RESPONDER_ID     BIT_ULL(3)
0033 #define INFO_VALID_IP           BIT_ULL(4)
0034
0035 #define CHECK_VALID_TRANS_TYPE      BIT_ULL(0)
0036 #define CHECK_VALID_OPERATION       BIT_ULL(1)
0037 #define CHECK_VALID_LEVEL       BIT_ULL(2)
0038 #define CHECK_VALID_PCC         BIT_ULL(3)
0039 #define CHECK_VALID_UNCORRECTED     BIT_ULL(4)
0040 #define CHECK_VALID_PRECISE_IP      BIT_ULL(5)
0041 #define CHECK_VALID_RESTARTABLE_IP  BIT_ULL(6)
0042 #define CHECK_VALID_OVERFLOW        BIT_ULL(7)
0043
0044 #define CHECK_VALID_BUS_PART_TYPE   BIT_ULL(8)
0045 #define CHECK_VALID_BUS_TIME_OUT    BIT_ULL(9)
0046 #define CHECK_VALID_BUS_ADDR_SPACE  BIT_ULL(10)
0047
0048 #define CHECK_VALID_BITS(check)     (((check) & GENMASK_ULL(15, 0)))
0049 #define CHECK_TRANS_TYPE(check)     (((check) & GENMASK_ULL(17, 16)) >> 16)
0050 #define CHECK_OPERATION(check)      (((check) & GENMASK_ULL(21, 18)) >> 18)
0051 #define CHECK_LEVEL(check)      (((check) & GENMASK_ULL(24, 22)) >> 22)
0052 #define CHECK_PCC           BIT_ULL(25)
0053 #define CHECK_UNCORRECTED       BIT_ULL(26)
0054 #define CHECK_PRECISE_IP        BIT_ULL(27)
0055 #define CHECK_RESTARTABLE_IP        BIT_ULL(28)
0056 #define CHECK_OVERFLOW          BIT_ULL(29)
0057
0058 #define CHECK_BUS_PART_TYPE(check)  (((check) & GENMASK_ULL(31, 30)) >> 30)
0059 #define CHECK_BUS_TIME_OUT      BIT_ULL(32)
0060 #define CHECK_BUS_ADDR_SPACE(check) (((check) & GENMASK_ULL(34, 33)) >> 33)
0061
0062 #define CHECK_VALID_MS_ERR_TYPE     BIT_ULL(0)
0063 #define CHECK_VALID_MS_PCC      BIT_ULL(1)
0064 #define CHECK_VALID_MS_UNCORRECTED  BIT_ULL(2)
0065 #define CHECK_VALID_MS_PRECISE_IP   BIT_ULL(3)
0066 #define CHECK_VALID_MS_RESTARTABLE_IP   BIT_ULL(4)
0067 #define CHECK_VALID_MS_OVERFLOW     BIT_ULL(5)
0068
0069 #define CHECK_MS_ERR_TYPE(check)    (((check) & GENMASK_ULL(18, 16)) >> 16)
0070 #define CHECK_MS_PCC            BIT_ULL(19)
0071 #define CHECK_MS_UNCORRECTED        BIT_ULL(20)
0072 #define CHECK_MS_PRECISE_IP     BIT_ULL(21)
0073 #define CHECK_MS_RESTARTABLE_IP     BIT_ULL(22)
0074 #define CHECK_MS_OVERFLOW       BIT_ULL(23)
0075
0076 #define CTX_TYPE_MSR            1
0077 #define CTX_TYPE_MMREG          7
0078
0079 enum err_types {
0080     ERR_TYPE_CACHE = 0,
0081     ERR_TYPE_TLB,
0082     ERR_TYPE_BUS,
0083     ERR_TYPE_MS,
0084     N_ERR_TYPES
0085 };
0086
0087 static enum err_types cper_get_err_type(const guid_t *err_type)
0088 {
0089     if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_CACHE))
0090         return ERR_TYPE_CACHE;
0091     else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_TLB))
0092         return ERR_TYPE_TLB;
0093     else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_BUS))
0094         return ERR_TYPE_BUS;
0095     else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_MS))
0096         return ERR_TYPE_MS;
0097     else
0098         return N_ERR_TYPES;
0099 }
0100
0101 static const char * const ia_check_trans_type_strs[] = {
0102     "Instruction",
0103     "Data Access",
0104     "Generic",
0105 };
0106
0107 static const char * const ia_check_op_strs[] = {
0108     "generic error",
0109     "generic read",
0110     "generic write",
0111     "data read",
0112     "data write",
0113     "instruction fetch",
0114     "prefetch",
0115     "eviction",
0116     "snoop",
0117 };
0118
0119 static const char * const ia_check_bus_part_type_strs[] = {
0120     "Local Processor originated request",
0121     "Local Processor responded to request",
0122     "Local Processor observed",
0123     "Generic",
0124 };
0125
0126 static const char * const ia_check_bus_addr_space_strs[] = {
0127     "Memory Access",
0128     "Reserved",
0129     "I/O",
0130     "Other Transaction",
0131 };
0132
0133 static const char * const ia_check_ms_error_type_strs[] = {
0134     "No Error",
0135     "Unclassified",
0136     "Microcode ROM Parity Error",
0137     "External Error",
0138     "FRC Error",
0139     "Internal Unclassified",
0140 };
0141
0142 static const char * const ia_reg_ctx_strs[] = {
0143     "Unclassified Data",
0144     "MSR Registers (Machine Check and other MSRs)",
0145     "32-bit Mode Execution Context",
0146     "64-bit Mode Execution Context",
0147     "FXSAVE Context",
0148     "32-bit Mode Debug Registers (DR0-DR7)",
0149     "64-bit Mode Debug Registers (DR0-DR7)",
0150     "Memory Mapped Registers",
0151 };
0152
0153 static inline void print_bool(char *str, const char *pfx, u64 check, u64 bit)
0154 {
0155     printk("%s%s: %s\n", pfx, str, (check & bit) ? "true" : "false");
0156 }
0157
0158 static void print_err_info_ms(const char *pfx, u16 validation_bits, u64 check)
0159 {
0160     if (validation_bits & CHECK_VALID_MS_ERR_TYPE) {
0161         u8 err_type = CHECK_MS_ERR_TYPE(check);
0162
0163         printk("%sError Type: %u, %s\n", pfx, err_type,
0164                err_type < ARRAY_SIZE(ia_check_ms_error_type_strs) ?
0165                ia_check_ms_error_type_strs[err_type] : "unknown");
0166     }
0167
0168     if (validation_bits & CHECK_VALID_MS_PCC)
0169         print_bool("Processor Context Corrupt", pfx, check, CHECK_MS_PCC);
0170
0171     if (validation_bits & CHECK_VALID_MS_UNCORRECTED)
0172         print_bool("Uncorrected", pfx, check, CHECK_MS_UNCORRECTED);
0173
0174     if (validation_bits & CHECK_VALID_MS_PRECISE_IP)
0175         print_bool("Precise IP", pfx, check, CHECK_MS_PRECISE_IP);
0176
0177     if (validation_bits & CHECK_VALID_MS_RESTARTABLE_IP)
0178         print_bool("Restartable IP", pfx, check, CHECK_MS_RESTARTABLE_IP);
0179
0180     if (validation_bits & CHECK_VALID_MS_OVERFLOW)
0181         print_bool("Overflow", pfx, check, CHECK_MS_OVERFLOW);
0182 }
0183
0184 static void print_err_info(const char *pfx, u8 err_type, u64 check)
0185 {
0186     u16 validation_bits = CHECK_VALID_BITS(check);
0187
0188     /*
0189      * The MS Check structure varies a lot from the others, so use a
0190      * separate function for decoding.
0191      */
0192     if (err_type == ERR_TYPE_MS)
0193         return print_err_info_ms(pfx, validation_bits, check);
0194
0195     if (validation_bits & CHECK_VALID_TRANS_TYPE) {
0196         u8 trans_type = CHECK_TRANS_TYPE(check);
0197
0198         printk("%sTransaction Type: %u, %s\n", pfx, trans_type,
0199                trans_type < ARRAY_SIZE(ia_check_trans_type_strs) ?
0200                ia_check_trans_type_strs[trans_type] : "unknown");
0201     }
0202
0203     if (validation_bits & CHECK_VALID_OPERATION) {
0204         u8 op = CHECK_OPERATION(check);
0205
0206         /*
0207          * CACHE has more operation types than TLB or BUS, though the
0208          * name and the order are the same.
0209          */
0210         u8 max_ops = (err_type == ERR_TYPE_CACHE) ? 9 : 7;
0211
0212         printk("%sOperation: %u, %s\n", pfx, op,
0213                op < max_ops ? ia_check_op_strs[op] : "unknown");
0214     }
0215
0216     if (validation_bits & CHECK_VALID_LEVEL)
0217         printk("%sLevel: %llu\n", pfx, CHECK_LEVEL(check));
0218
0219     if (validation_bits & CHECK_VALID_PCC)
0220         print_bool("Processor Context Corrupt", pfx, check, CHECK_PCC);
0221
0222     if (validation_bits & CHECK_VALID_UNCORRECTED)
0223         print_bool("Uncorrected", pfx, check, CHECK_UNCORRECTED);
0224
0225     if (validation_bits & CHECK_VALID_PRECISE_IP)
0226         print_bool("Precise IP", pfx, check, CHECK_PRECISE_IP);
0227
0228     if (validation_bits & CHECK_VALID_RESTARTABLE_IP)
0229         print_bool("Restartable IP", pfx, check, CHECK_RESTARTABLE_IP);
0230
0231     if (validation_bits & CHECK_VALID_OVERFLOW)
0232         print_bool("Overflow", pfx, check, CHECK_OVERFLOW);
0233
0234     if (err_type != ERR_TYPE_BUS)
0235         return;
0236
0237     if (validation_bits & CHECK_VALID_BUS_PART_TYPE) {
0238         u8 part_type = CHECK_BUS_PART_TYPE(check);
0239
0240         printk("%sParticipation Type: %u, %s\n", pfx, part_type,
0241                part_type < ARRAY_SIZE(ia_check_bus_part_type_strs) ?
0242                ia_check_bus_part_type_strs[part_type] : "unknown");
0243     }
0244
0245     if (validation_bits & CHECK_VALID_BUS_TIME_OUT)
0246         print_bool("Time Out", pfx, check, CHECK_BUS_TIME_OUT);
0247
0248     if (validation_bits & CHECK_VALID_BUS_ADDR_SPACE) {
0249         u8 addr_space = CHECK_BUS_ADDR_SPACE(check);
0250
0251         printk("%sAddress Space: %u, %s\n", pfx, addr_space,
0252                addr_space < ARRAY_SIZE(ia_check_bus_addr_space_strs) ?
0253                ia_check_bus_addr_space_strs[addr_space] : "unknown");
0254     }
0255 }
0256
0257 void cper_print_proc_ia(const char *pfx, const struct cper_sec_proc_ia *proc)
0258 {
0259     int i;
0260     struct cper_ia_err_info *err_info;
0261     struct cper_ia_proc_ctx *ctx_info;
0262     char newpfx[64], infopfx[64];
0263     u8 err_type;
0264
0265     if (proc->validation_bits & VALID_LAPIC_ID)
0266         printk("%sLocal APIC_ID: 0x%llx\n", pfx, proc->lapic_id);
0267
0268     if (proc->validation_bits & VALID_CPUID_INFO) {
0269         printk("%sCPUID Info:\n", pfx);
0270         print_hex_dump(pfx, "", DUMP_PREFIX_OFFSET, 16, 4, proc->cpuid,
0271                    sizeof(proc->cpuid), 0);
0272     }
0273
0274     snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
0275
0276     err_info = (struct cper_ia_err_info *)(proc + 1);
0277     for (i = 0; i < VALID_PROC_ERR_INFO_NUM(proc->validation_bits); i++) {
0278         printk("%sError Information Structure %d:\n", pfx, i);
0279
0280         err_type = cper_get_err_type(&err_info->err_type);
0281         printk("%sError Structure Type: %s\n", newpfx,
0282                err_type < ARRAY_SIZE(cper_proc_error_type_strs) ?
0283                cper_proc_error_type_strs[err_type] : "unknown");
0284
0285         if (err_type >= N_ERR_TYPES) {
0286             printk("%sError Structure Type: %pUl\n", newpfx,
0287                    &err_info->err_type);
0288         }
0289
0290         if (err_info->validation_bits & INFO_VALID_CHECK_INFO) {
0291             printk("%sCheck Information: 0x%016llx\n", newpfx,
0292                    err_info->check_info);
0293
0294             if (err_type < N_ERR_TYPES) {
0295                 snprintf(infopfx, sizeof(infopfx), "%s ",
0296                      newpfx);
0297
0298                 print_err_info(infopfx, err_type,
0299                            err_info->check_info);
0300             }
0301         }
0302
0303         if (err_info->validation_bits & INFO_VALID_TARGET_ID) {
0304             printk("%sTarget Identifier: 0x%016llx\n",
0305                    newpfx, err_info->target_id);
0306         }
0307
0308         if (err_info->validation_bits & INFO_VALID_REQUESTOR_ID) {
0309             printk("%sRequestor Identifier: 0x%016llx\n",
0310                    newpfx, err_info->requestor_id);
0311         }
0312
0313         if (err_info->validation_bits & INFO_VALID_RESPONDER_ID) {
0314             printk("%sResponder Identifier: 0x%016llx\n",
0315                    newpfx, err_info->responder_id);
0316         }
0317
0318         if (err_info->validation_bits & INFO_VALID_IP) {
0319             printk("%sInstruction Pointer: 0x%016llx\n",
0320                    newpfx, err_info->ip);
0321         }
0322
0323         err_info++;
0324     }
0325
0326     ctx_info = (struct cper_ia_proc_ctx *)err_info;
0327     for (i = 0; i < VALID_PROC_CXT_INFO_NUM(proc->validation_bits); i++) {
0328         int size = sizeof(*ctx_info) + ctx_info->reg_arr_size;
0329         int groupsize = 4;
0330
0331         printk("%sContext Information Structure %d:\n", pfx, i);
0332
0333         printk("%sRegister Context Type: %s\n", newpfx,
0334                ctx_info->reg_ctx_type < ARRAY_SIZE(ia_reg_ctx_strs) ?
0335                ia_reg_ctx_strs[ctx_info->reg_ctx_type] : "unknown");
0336
0337         printk("%sRegister Array Size: 0x%04x\n", newpfx,
0338                ctx_info->reg_arr_size);
0339
0340         if (ctx_info->reg_ctx_type == CTX_TYPE_MSR) {
0341             groupsize = 8; /* MSRs are 8 bytes wide. */
0342             printk("%sMSR Address: 0x%08x\n", newpfx,
0343                    ctx_info->msr_addr);
0344         }
0345
0346         if (ctx_info->reg_ctx_type == CTX_TYPE_MMREG) {
0347             printk("%sMM Register Address: 0x%016llx\n", newpfx,
0348                    ctx_info->mm_reg_addr);
0349         }
0350
0351         if (ctx_info->reg_ctx_type != CTX_TYPE_MSR ||
0352             arch_apei_report_x86_error(ctx_info, proc->lapic_id)) {
0353             printk("%sRegister Array:\n", newpfx);
0354             print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16,
0355                        groupsize, (ctx_info + 1),
0356                        ctx_info->reg_arr_size, 0);
0357         }
0358
0359         ctx_info = (struct cper_ia_proc_ctx *)((long)ctx_info + size);
0360     }
0361 }