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0001 /*
0002  *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
0003  *  Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
0004  *  Copyright (C) 2006 Michael Buesch <m@bues.ch>
0005  *  Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
0006  *  Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
0007  *
0008  *  This program is free software; you can redistribute  it and/or modify it
0009  *  under  the terms of  the GNU General  Public License as published by the
0010  *  Free Software Foundation;  either version 2 of the  License, or (at your
0011  *  option) any later version.
0012  *
0013  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
0014  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
0015  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
0016  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
0017  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
0018  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
0019  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
0020  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
0021  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
0022  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0023  *
0024  *  You should have received a copy of the  GNU General Public License along
0025  *  with this program; if not, write  to the Free Software Foundation, Inc.,
0026  *  675 Mass Ave, Cambridge, MA 02139, USA.
0027  */
0028 
0029 #include <linux/bcm47xx_nvram.h>
0030 #include <linux/bcm47xx_sprom.h>
0031 #include <linux/bcma/bcma.h>
0032 #include <linux/etherdevice.h>
0033 #include <linux/if_ether.h>
0034 #include <linux/ssb/ssb.h>
0035 
0036 static void create_key(const char *prefix, const char *postfix,
0037                const char *name, char *buf, int len)
0038 {
0039     if (prefix && postfix)
0040         snprintf(buf, len, "%s%s%s", prefix, name, postfix);
0041     else if (prefix)
0042         snprintf(buf, len, "%s%s", prefix, name);
0043     else if (postfix)
0044         snprintf(buf, len, "%s%s", name, postfix);
0045     else
0046         snprintf(buf, len, "%s", name);
0047 }
0048 
0049 static int get_nvram_var(const char *prefix, const char *postfix,
0050              const char *name, char *buf, int len, bool fallback)
0051 {
0052     char key[40];
0053     int err;
0054 
0055     create_key(prefix, postfix, name, key, sizeof(key));
0056 
0057     err = bcm47xx_nvram_getenv(key, buf, len);
0058     if (fallback && err == -ENOENT && prefix) {
0059         create_key(NULL, postfix, name, key, sizeof(key));
0060         err = bcm47xx_nvram_getenv(key, buf, len);
0061     }
0062     return err;
0063 }
0064 
0065 #define NVRAM_READ_VAL(type)                        \
0066 static void nvram_read_ ## type(const char *prefix,         \
0067                 const char *postfix, const char *name,  \
0068                 type *val, type allset, bool fallback)  \
0069 {                                   \
0070     char buf[100];                          \
0071     int err;                            \
0072     type var;                           \
0073                                     \
0074     err = get_nvram_var(prefix, postfix, name, buf, sizeof(buf),    \
0075                 fallback);                  \
0076     if (err < 0)                            \
0077         return;                         \
0078     err = kstrto ## type(strim(buf), 0, &var);          \
0079     if (err) {                          \
0080         pr_warn("can not parse nvram name %s%s%s with value %s got %i\n",   \
0081             prefix, name, postfix, buf, err);       \
0082         return;                         \
0083     }                               \
0084     if (allset && var == allset)                    \
0085         return;                         \
0086     *val = var;                         \
0087 }
0088 
0089 NVRAM_READ_VAL(u8)
0090 NVRAM_READ_VAL(s8)
0091 NVRAM_READ_VAL(u16)
0092 NVRAM_READ_VAL(u32)
0093 
0094 #undef NVRAM_READ_VAL
0095 
0096 static void nvram_read_u32_2(const char *prefix, const char *name,
0097                  u16 *val_lo, u16 *val_hi, bool fallback)
0098 {
0099     char buf[100];
0100     int err;
0101     u32 val;
0102 
0103     err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
0104     if (err < 0)
0105         return;
0106     err = kstrtou32(strim(buf), 0, &val);
0107     if (err) {
0108         pr_warn("can not parse nvram name %s%s with value %s got %i\n",
0109             prefix, name, buf, err);
0110         return;
0111     }
0112     *val_lo = (val & 0x0000FFFFU);
0113     *val_hi = (val & 0xFFFF0000U) >> 16;
0114 }
0115 
0116 static void nvram_read_leddc(const char *prefix, const char *name,
0117                  u8 *leddc_on_time, u8 *leddc_off_time,
0118                  bool fallback)
0119 {
0120     char buf[100];
0121     int err;
0122     u32 val;
0123 
0124     err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
0125     if (err < 0)
0126         return;
0127     err = kstrtou32(strim(buf), 0, &val);
0128     if (err) {
0129         pr_warn("can not parse nvram name %s%s with value %s got %i\n",
0130             prefix, name, buf, err);
0131         return;
0132     }
0133 
0134     if (val == 0xffff || val == 0xffffffff)
0135         return;
0136 
0137     *leddc_on_time = val & 0xff;
0138     *leddc_off_time = (val >> 16) & 0xff;
0139 }
0140 
0141 static void nvram_read_macaddr(const char *prefix, const char *name,
0142                    u8 val[6], bool fallback)
0143 {
0144     char buf[100];
0145     int err;
0146 
0147     err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
0148     if (err < 0)
0149         return;
0150 
0151     strreplace(buf, '-', ':');
0152     if (!mac_pton(buf, val))
0153         pr_warn("Can not parse mac address: %s\n", buf);
0154 }
0155 
0156 static void nvram_read_alpha2(const char *prefix, const char *name,
0157                  char val[2], bool fallback)
0158 {
0159     char buf[10];
0160     int err;
0161 
0162     err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
0163     if (err < 0)
0164         return;
0165     if (buf[0] == '0')
0166         return;
0167     if (strlen(buf) > 2) {
0168         pr_warn("alpha2 is too long %s\n", buf);
0169         return;
0170     }
0171     memcpy(val, buf, 2);
0172 }
0173 
0174 /* This is one-function-only macro, it uses local "sprom" variable! */
0175 #define ENTRY(_revmask, _type, _prefix, _name, _val, _allset, _fallback) \
0176     if (_revmask & BIT(sprom->revision)) \
0177         nvram_read_ ## _type(_prefix, NULL, _name, &sprom->_val, \
0178                      _allset, _fallback)
0179 /*
0180  * Special version of filling function that can be safely called for any SPROM
0181  * revision. For every NVRAM to SPROM mapping it contains bitmask of revisions
0182  * for which the mapping is valid.
0183  * It obviously requires some hexadecimal/bitmasks knowledge, but allows
0184  * writing cleaner code (easy revisions handling).
0185  * Note that while SPROM revision 0 was never used, we still keep BIT(0)
0186  * reserved for it, just to keep numbering sane.
0187  */
0188 static void bcm47xx_sprom_fill_auto(struct ssb_sprom *sprom,
0189                     const char *prefix, bool fallback)
0190 {
0191     const char *pre = prefix;
0192     bool fb = fallback;
0193 
0194     /* Broadcom extracts it for rev 8+ but it was found on 2 and 4 too */
0195     ENTRY(0xfffffffe, u16, pre, "devid", dev_id, 0, fallback);
0196 
0197     ENTRY(0xfffffffe, u16, pre, "boardrev", board_rev, 0, true);
0198     ENTRY(0xfffffffe, u32, pre, "boardflags", boardflags, 0, fb);
0199     ENTRY(0xfffffff0, u32, pre, "boardflags2", boardflags2, 0, fb);
0200     ENTRY(0xfffff800, u32, pre, "boardflags3", boardflags3, 0, fb);
0201     ENTRY(0x00000002, u16, pre, "boardflags", boardflags_lo, 0, fb);
0202     ENTRY(0xfffffffc, u16, pre, "boardtype", board_type, 0, true);
0203     ENTRY(0xfffffffe, u16, pre, "boardnum", board_num, 0, fb);
0204     ENTRY(0x00000002, u8, pre, "cc", country_code, 0, fb);
0205     ENTRY(0xfffffff8, u8, pre, "regrev", regrev, 0, fb);
0206 
0207     ENTRY(0xfffffffe, u8, pre, "ledbh0", gpio0, 0xff, fb);
0208     ENTRY(0xfffffffe, u8, pre, "ledbh1", gpio1, 0xff, fb);
0209     ENTRY(0xfffffffe, u8, pre, "ledbh2", gpio2, 0xff, fb);
0210     ENTRY(0xfffffffe, u8, pre, "ledbh3", gpio3, 0xff, fb);
0211 
0212     ENTRY(0x0000070e, u16, pre, "pa0b0", pa0b0, 0, fb);
0213     ENTRY(0x0000070e, u16, pre, "pa0b1", pa0b1, 0, fb);
0214     ENTRY(0x0000070e, u16, pre, "pa0b2", pa0b2, 0, fb);
0215     ENTRY(0x0000070e, u8, pre, "pa0itssit", itssi_bg, 0, fb);
0216     ENTRY(0x0000070e, u8, pre, "pa0maxpwr", maxpwr_bg, 0, fb);
0217 
0218     ENTRY(0x0000070c, u8, pre, "opo", opo, 0, fb);
0219     ENTRY(0xfffffffe, u8, pre, "aa2g", ant_available_bg, 0, fb);
0220     ENTRY(0xfffffffe, u8, pre, "aa5g", ant_available_a, 0, fb);
0221     ENTRY(0x000007fe, s8, pre, "ag0", antenna_gain.a0, 0, fb);
0222     ENTRY(0x000007fe, s8, pre, "ag1", antenna_gain.a1, 0, fb);
0223     ENTRY(0x000007f0, s8, pre, "ag2", antenna_gain.a2, 0, fb);
0224     ENTRY(0x000007f0, s8, pre, "ag3", antenna_gain.a3, 0, fb);
0225 
0226     ENTRY(0x0000070e, u16, pre, "pa1b0", pa1b0, 0, fb);
0227     ENTRY(0x0000070e, u16, pre, "pa1b1", pa1b1, 0, fb);
0228     ENTRY(0x0000070e, u16, pre, "pa1b2", pa1b2, 0, fb);
0229     ENTRY(0x0000070c, u16, pre, "pa1lob0", pa1lob0, 0, fb);
0230     ENTRY(0x0000070c, u16, pre, "pa1lob1", pa1lob1, 0, fb);
0231     ENTRY(0x0000070c, u16, pre, "pa1lob2", pa1lob2, 0, fb);
0232     ENTRY(0x0000070c, u16, pre, "pa1hib0", pa1hib0, 0, fb);
0233     ENTRY(0x0000070c, u16, pre, "pa1hib1", pa1hib1, 0, fb);
0234     ENTRY(0x0000070c, u16, pre, "pa1hib2", pa1hib2, 0, fb);
0235     ENTRY(0x0000070e, u8, pre, "pa1itssit", itssi_a, 0, fb);
0236     ENTRY(0x0000070e, u8, pre, "pa1maxpwr", maxpwr_a, 0, fb);
0237     ENTRY(0x0000070c, u8, pre, "pa1lomaxpwr", maxpwr_al, 0, fb);
0238     ENTRY(0x0000070c, u8, pre, "pa1himaxpwr", maxpwr_ah, 0, fb);
0239 
0240     ENTRY(0x00000708, u8, pre, "bxa2g", bxa2g, 0, fb);
0241     ENTRY(0x00000708, u8, pre, "rssisav2g", rssisav2g, 0, fb);
0242     ENTRY(0x00000708, u8, pre, "rssismc2g", rssismc2g, 0, fb);
0243     ENTRY(0x00000708, u8, pre, "rssismf2g", rssismf2g, 0, fb);
0244     ENTRY(0x00000708, u8, pre, "bxa5g", bxa5g, 0, fb);
0245     ENTRY(0x00000708, u8, pre, "rssisav5g", rssisav5g, 0, fb);
0246     ENTRY(0x00000708, u8, pre, "rssismc5g", rssismc5g, 0, fb);
0247     ENTRY(0x00000708, u8, pre, "rssismf5g", rssismf5g, 0, fb);
0248     ENTRY(0x00000708, u8, pre, "tri2g", tri2g, 0, fb);
0249     ENTRY(0x00000708, u8, pre, "tri5g", tri5g, 0, fb);
0250     ENTRY(0x00000708, u8, pre, "tri5gl", tri5gl, 0, fb);
0251     ENTRY(0x00000708, u8, pre, "tri5gh", tri5gh, 0, fb);
0252     ENTRY(0x00000708, s8, pre, "rxpo2g", rxpo2g, 0, fb);
0253     ENTRY(0x00000708, s8, pre, "rxpo5g", rxpo5g, 0, fb);
0254     ENTRY(0xfffffff0, u8, pre, "txchain", txchain, 0xf, fb);
0255     ENTRY(0xfffffff0, u8, pre, "rxchain", rxchain, 0xf, fb);
0256     ENTRY(0xfffffff0, u8, pre, "antswitch", antswitch, 0xff, fb);
0257     ENTRY(0x00000700, u8, pre, "tssipos2g", fem.ghz2.tssipos, 0, fb);
0258     ENTRY(0x00000700, u8, pre, "extpagain2g", fem.ghz2.extpa_gain, 0, fb);
0259     ENTRY(0x00000700, u8, pre, "pdetrange2g", fem.ghz2.pdet_range, 0, fb);
0260     ENTRY(0x00000700, u8, pre, "triso2g", fem.ghz2.tr_iso, 0, fb);
0261     ENTRY(0x00000700, u8, pre, "antswctl2g", fem.ghz2.antswlut, 0, fb);
0262     ENTRY(0x00000700, u8, pre, "tssipos5g", fem.ghz5.tssipos, 0, fb);
0263     ENTRY(0x00000700, u8, pre, "extpagain5g", fem.ghz5.extpa_gain, 0, fb);
0264     ENTRY(0x00000700, u8, pre, "pdetrange5g", fem.ghz5.pdet_range, 0, fb);
0265     ENTRY(0x00000700, u8, pre, "triso5g", fem.ghz5.tr_iso, 0, fb);
0266     ENTRY(0x00000700, u8, pre, "antswctl5g", fem.ghz5.antswlut, 0, fb);
0267     ENTRY(0x000000f0, u8, pre, "txpid2ga0", txpid2g[0], 0, fb);
0268     ENTRY(0x000000f0, u8, pre, "txpid2ga1", txpid2g[1], 0, fb);
0269     ENTRY(0x000000f0, u8, pre, "txpid2ga2", txpid2g[2], 0, fb);
0270     ENTRY(0x000000f0, u8, pre, "txpid2ga3", txpid2g[3], 0, fb);
0271     ENTRY(0x000000f0, u8, pre, "txpid5ga0", txpid5g[0], 0, fb);
0272     ENTRY(0x000000f0, u8, pre, "txpid5ga1", txpid5g[1], 0, fb);
0273     ENTRY(0x000000f0, u8, pre, "txpid5ga2", txpid5g[2], 0, fb);
0274     ENTRY(0x000000f0, u8, pre, "txpid5ga3", txpid5g[3], 0, fb);
0275     ENTRY(0x000000f0, u8, pre, "txpid5gla0", txpid5gl[0], 0, fb);
0276     ENTRY(0x000000f0, u8, pre, "txpid5gla1", txpid5gl[1], 0, fb);
0277     ENTRY(0x000000f0, u8, pre, "txpid5gla2", txpid5gl[2], 0, fb);
0278     ENTRY(0x000000f0, u8, pre, "txpid5gla3", txpid5gl[3], 0, fb);
0279     ENTRY(0x000000f0, u8, pre, "txpid5gha0", txpid5gh[0], 0, fb);
0280     ENTRY(0x000000f0, u8, pre, "txpid5gha1", txpid5gh[1], 0, fb);
0281     ENTRY(0x000000f0, u8, pre, "txpid5gha2", txpid5gh[2], 0, fb);
0282     ENTRY(0x000000f0, u8, pre, "txpid5gha3", txpid5gh[3], 0, fb);
0283 
0284     ENTRY(0xffffff00, u8, pre, "tempthresh", tempthresh, 0, fb);
0285     ENTRY(0xffffff00, u8, pre, "tempoffset", tempoffset, 0, fb);
0286     ENTRY(0xffffff00, u16, pre, "rawtempsense", rawtempsense, 0, fb);
0287     ENTRY(0xffffff00, u8, pre, "measpower", measpower, 0, fb);
0288     ENTRY(0xffffff00, u8, pre, "tempsense_slope", tempsense_slope, 0, fb);
0289     ENTRY(0xffffff00, u8, pre, "tempcorrx", tempcorrx, 0, fb);
0290     ENTRY(0xffffff00, u8, pre, "tempsense_option", tempsense_option, 0, fb);
0291     ENTRY(0x00000700, u8, pre, "freqoffset_corr", freqoffset_corr, 0, fb);
0292     ENTRY(0x00000700, u8, pre, "iqcal_swp_dis", iqcal_swp_dis, 0, fb);
0293     ENTRY(0x00000700, u8, pre, "hw_iqcal_en", hw_iqcal_en, 0, fb);
0294     ENTRY(0x00000700, u8, pre, "elna2g", elna2g, 0, fb);
0295     ENTRY(0x00000700, u8, pre, "elna5g", elna5g, 0, fb);
0296     ENTRY(0xffffff00, u8, pre, "phycal_tempdelta", phycal_tempdelta, 0, fb);
0297     ENTRY(0xffffff00, u8, pre, "temps_period", temps_period, 0, fb);
0298     ENTRY(0xffffff00, u8, pre, "temps_hysteresis", temps_hysteresis, 0, fb);
0299     ENTRY(0xffffff00, u8, pre, "measpower1", measpower1, 0, fb);
0300     ENTRY(0xffffff00, u8, pre, "measpower2", measpower2, 0, fb);
0301 
0302     ENTRY(0x000001f0, u16, pre, "cck2gpo", cck2gpo, 0, fb);
0303     ENTRY(0x000001f0, u32, pre, "ofdm2gpo", ofdm2gpo, 0, fb);
0304     ENTRY(0x000001f0, u32, pre, "ofdm5gpo", ofdm5gpo, 0, fb);
0305     ENTRY(0x000001f0, u32, pre, "ofdm5glpo", ofdm5glpo, 0, fb);
0306     ENTRY(0x000001f0, u32, pre, "ofdm5ghpo", ofdm5ghpo, 0, fb);
0307     ENTRY(0x000001f0, u16, pre, "mcs2gpo0", mcs2gpo[0], 0, fb);
0308     ENTRY(0x000001f0, u16, pre, "mcs2gpo1", mcs2gpo[1], 0, fb);
0309     ENTRY(0x000001f0, u16, pre, "mcs2gpo2", mcs2gpo[2], 0, fb);
0310     ENTRY(0x000001f0, u16, pre, "mcs2gpo3", mcs2gpo[3], 0, fb);
0311     ENTRY(0x000001f0, u16, pre, "mcs2gpo4", mcs2gpo[4], 0, fb);
0312     ENTRY(0x000001f0, u16, pre, "mcs2gpo5", mcs2gpo[5], 0, fb);
0313     ENTRY(0x000001f0, u16, pre, "mcs2gpo6", mcs2gpo[6], 0, fb);
0314     ENTRY(0x000001f0, u16, pre, "mcs2gpo7", mcs2gpo[7], 0, fb);
0315     ENTRY(0x000001f0, u16, pre, "mcs5gpo0", mcs5gpo[0], 0, fb);
0316     ENTRY(0x000001f0, u16, pre, "mcs5gpo1", mcs5gpo[1], 0, fb);
0317     ENTRY(0x000001f0, u16, pre, "mcs5gpo2", mcs5gpo[2], 0, fb);
0318     ENTRY(0x000001f0, u16, pre, "mcs5gpo3", mcs5gpo[3], 0, fb);
0319     ENTRY(0x000001f0, u16, pre, "mcs5gpo4", mcs5gpo[4], 0, fb);
0320     ENTRY(0x000001f0, u16, pre, "mcs5gpo5", mcs5gpo[5], 0, fb);
0321     ENTRY(0x000001f0, u16, pre, "mcs5gpo6", mcs5gpo[6], 0, fb);
0322     ENTRY(0x000001f0, u16, pre, "mcs5gpo7", mcs5gpo[7], 0, fb);
0323     ENTRY(0x000001f0, u16, pre, "mcs5glpo0", mcs5glpo[0], 0, fb);
0324     ENTRY(0x000001f0, u16, pre, "mcs5glpo1", mcs5glpo[1], 0, fb);
0325     ENTRY(0x000001f0, u16, pre, "mcs5glpo2", mcs5glpo[2], 0, fb);
0326     ENTRY(0x000001f0, u16, pre, "mcs5glpo3", mcs5glpo[3], 0, fb);
0327     ENTRY(0x000001f0, u16, pre, "mcs5glpo4", mcs5glpo[4], 0, fb);
0328     ENTRY(0x000001f0, u16, pre, "mcs5glpo5", mcs5glpo[5], 0, fb);
0329     ENTRY(0x000001f0, u16, pre, "mcs5glpo6", mcs5glpo[6], 0, fb);
0330     ENTRY(0x000001f0, u16, pre, "mcs5glpo7", mcs5glpo[7], 0, fb);
0331     ENTRY(0x000001f0, u16, pre, "mcs5ghpo0", mcs5ghpo[0], 0, fb);
0332     ENTRY(0x000001f0, u16, pre, "mcs5ghpo1", mcs5ghpo[1], 0, fb);
0333     ENTRY(0x000001f0, u16, pre, "mcs5ghpo2", mcs5ghpo[2], 0, fb);
0334     ENTRY(0x000001f0, u16, pre, "mcs5ghpo3", mcs5ghpo[3], 0, fb);
0335     ENTRY(0x000001f0, u16, pre, "mcs5ghpo4", mcs5ghpo[4], 0, fb);
0336     ENTRY(0x000001f0, u16, pre, "mcs5ghpo5", mcs5ghpo[5], 0, fb);
0337     ENTRY(0x000001f0, u16, pre, "mcs5ghpo6", mcs5ghpo[6], 0, fb);
0338     ENTRY(0x000001f0, u16, pre, "mcs5ghpo7", mcs5ghpo[7], 0, fb);
0339     ENTRY(0x000001f0, u16, pre, "cddpo", cddpo, 0, fb);
0340     ENTRY(0x000001f0, u16, pre, "stbcpo", stbcpo, 0, fb);
0341     ENTRY(0x000001f0, u16, pre, "bw40po", bw40po, 0, fb);
0342     ENTRY(0x000001f0, u16, pre, "bwduppo", bwduppo, 0, fb);
0343 
0344     ENTRY(0xfffffe00, u16, pre, "cckbw202gpo", cckbw202gpo, 0, fb);
0345     ENTRY(0xfffffe00, u16, pre, "cckbw20ul2gpo", cckbw20ul2gpo, 0, fb);
0346     ENTRY(0x00000600, u32, pre, "legofdmbw202gpo", legofdmbw202gpo, 0, fb);
0347     ENTRY(0x00000600, u32, pre, "legofdmbw20ul2gpo", legofdmbw20ul2gpo, 0, fb);
0348     ENTRY(0x00000600, u32, pre, "legofdmbw205glpo", legofdmbw205glpo, 0, fb);
0349     ENTRY(0x00000600, u32, pre, "legofdmbw20ul5glpo", legofdmbw20ul5glpo, 0, fb);
0350     ENTRY(0x00000600, u32, pre, "legofdmbw205gmpo", legofdmbw205gmpo, 0, fb);
0351     ENTRY(0x00000600, u32, pre, "legofdmbw20ul5gmpo", legofdmbw20ul5gmpo, 0, fb);
0352     ENTRY(0x00000600, u32, pre, "legofdmbw205ghpo", legofdmbw205ghpo, 0, fb);
0353     ENTRY(0x00000600, u32, pre, "legofdmbw20ul5ghpo", legofdmbw20ul5ghpo, 0, fb);
0354     ENTRY(0xfffffe00, u32, pre, "mcsbw202gpo", mcsbw202gpo, 0, fb);
0355     ENTRY(0x00000600, u32, pre, "mcsbw20ul2gpo", mcsbw20ul2gpo, 0, fb);
0356     ENTRY(0xfffffe00, u32, pre, "mcsbw402gpo", mcsbw402gpo, 0, fb);
0357     ENTRY(0xfffffe00, u32, pre, "mcsbw205glpo", mcsbw205glpo, 0, fb);
0358     ENTRY(0x00000600, u32, pre, "mcsbw20ul5glpo", mcsbw20ul5glpo, 0, fb);
0359     ENTRY(0xfffffe00, u32, pre, "mcsbw405glpo", mcsbw405glpo, 0, fb);
0360     ENTRY(0xfffffe00, u32, pre, "mcsbw205gmpo", mcsbw205gmpo, 0, fb);
0361     ENTRY(0x00000600, u32, pre, "mcsbw20ul5gmpo", mcsbw20ul5gmpo, 0, fb);
0362     ENTRY(0xfffffe00, u32, pre, "mcsbw405gmpo", mcsbw405gmpo, 0, fb);
0363     ENTRY(0xfffffe00, u32, pre, "mcsbw205ghpo", mcsbw205ghpo, 0, fb);
0364     ENTRY(0x00000600, u32, pre, "mcsbw20ul5ghpo", mcsbw20ul5ghpo, 0, fb);
0365     ENTRY(0xfffffe00, u32, pre, "mcsbw405ghpo", mcsbw405ghpo, 0, fb);
0366     ENTRY(0x00000600, u16, pre, "mcs32po", mcs32po, 0, fb);
0367     ENTRY(0x00000600, u16, pre, "legofdm40duppo", legofdm40duppo, 0, fb);
0368     ENTRY(0x00000700, u8, pre, "pcieingress_war", pcieingress_war, 0, fb);
0369 
0370     /* TODO: rev 11 support */
0371     ENTRY(0x00000700, u8, pre, "rxgainerr2ga0", rxgainerr2ga[0], 0, fb);
0372     ENTRY(0x00000700, u8, pre, "rxgainerr2ga1", rxgainerr2ga[1], 0, fb);
0373     ENTRY(0x00000700, u8, pre, "rxgainerr2ga2", rxgainerr2ga[2], 0, fb);
0374     ENTRY(0x00000700, u8, pre, "rxgainerr5gla0", rxgainerr5gla[0], 0, fb);
0375     ENTRY(0x00000700, u8, pre, "rxgainerr5gla1", rxgainerr5gla[1], 0, fb);
0376     ENTRY(0x00000700, u8, pre, "rxgainerr5gla2", rxgainerr5gla[2], 0, fb);
0377     ENTRY(0x00000700, u8, pre, "rxgainerr5gma0", rxgainerr5gma[0], 0, fb);
0378     ENTRY(0x00000700, u8, pre, "rxgainerr5gma1", rxgainerr5gma[1], 0, fb);
0379     ENTRY(0x00000700, u8, pre, "rxgainerr5gma2", rxgainerr5gma[2], 0, fb);
0380     ENTRY(0x00000700, u8, pre, "rxgainerr5gha0", rxgainerr5gha[0], 0, fb);
0381     ENTRY(0x00000700, u8, pre, "rxgainerr5gha1", rxgainerr5gha[1], 0, fb);
0382     ENTRY(0x00000700, u8, pre, "rxgainerr5gha2", rxgainerr5gha[2], 0, fb);
0383     ENTRY(0x00000700, u8, pre, "rxgainerr5gua0", rxgainerr5gua[0], 0, fb);
0384     ENTRY(0x00000700, u8, pre, "rxgainerr5gua1", rxgainerr5gua[1], 0, fb);
0385     ENTRY(0x00000700, u8, pre, "rxgainerr5gua2", rxgainerr5gua[2], 0, fb);
0386 
0387     ENTRY(0xfffffe00, u8, pre, "sar2g", sar2g, 0, fb);
0388     ENTRY(0xfffffe00, u8, pre, "sar5g", sar5g, 0, fb);
0389 
0390     /* TODO: rev 11 support */
0391     ENTRY(0x00000700, u8, pre, "noiselvl2ga0", noiselvl2ga[0], 0, fb);
0392     ENTRY(0x00000700, u8, pre, "noiselvl2ga1", noiselvl2ga[1], 0, fb);
0393     ENTRY(0x00000700, u8, pre, "noiselvl2ga2", noiselvl2ga[2], 0, fb);
0394     ENTRY(0x00000700, u8, pre, "noiselvl5gla0", noiselvl5gla[0], 0, fb);
0395     ENTRY(0x00000700, u8, pre, "noiselvl5gla1", noiselvl5gla[1], 0, fb);
0396     ENTRY(0x00000700, u8, pre, "noiselvl5gla2", noiselvl5gla[2], 0, fb);
0397     ENTRY(0x00000700, u8, pre, "noiselvl5gma0", noiselvl5gma[0], 0, fb);
0398     ENTRY(0x00000700, u8, pre, "noiselvl5gma1", noiselvl5gma[1], 0, fb);
0399     ENTRY(0x00000700, u8, pre, "noiselvl5gma2", noiselvl5gma[2], 0, fb);
0400     ENTRY(0x00000700, u8, pre, "noiselvl5gha0", noiselvl5gha[0], 0, fb);
0401     ENTRY(0x00000700, u8, pre, "noiselvl5gha1", noiselvl5gha[1], 0, fb);
0402     ENTRY(0x00000700, u8, pre, "noiselvl5gha2", noiselvl5gha[2], 0, fb);
0403     ENTRY(0x00000700, u8, pre, "noiselvl5gua0", noiselvl5gua[0], 0, fb);
0404     ENTRY(0x00000700, u8, pre, "noiselvl5gua1", noiselvl5gua[1], 0, fb);
0405     ENTRY(0x00000700, u8, pre, "noiselvl5gua2", noiselvl5gua[2], 0, fb);
0406 }
0407 #undef ENTRY /* It's specififc, uses local variable, don't use it (again). */
0408 
0409 static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
0410                       const char *prefix, bool fallback)
0411 {
0412     char postfix[2];
0413     int i;
0414 
0415     for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
0416         struct ssb_sprom_core_pwr_info *pwr_info;
0417 
0418         pwr_info = &sprom->core_pwr_info[i];
0419 
0420         snprintf(postfix, sizeof(postfix), "%i", i);
0421         nvram_read_u8(prefix, postfix, "maxp2ga",
0422                   &pwr_info->maxpwr_2g, 0, fallback);
0423         nvram_read_u8(prefix, postfix, "itt2ga",
0424                   &pwr_info->itssi_2g, 0, fallback);
0425         nvram_read_u8(prefix, postfix, "itt5ga",
0426                   &pwr_info->itssi_5g, 0, fallback);
0427         nvram_read_u16(prefix, postfix, "pa2gw0a",
0428                    &pwr_info->pa_2g[0], 0, fallback);
0429         nvram_read_u16(prefix, postfix, "pa2gw1a",
0430                    &pwr_info->pa_2g[1], 0, fallback);
0431         nvram_read_u16(prefix, postfix, "pa2gw2a",
0432                    &pwr_info->pa_2g[2], 0, fallback);
0433         nvram_read_u8(prefix, postfix, "maxp5ga",
0434                   &pwr_info->maxpwr_5g, 0, fallback);
0435         nvram_read_u8(prefix, postfix, "maxp5gha",
0436                   &pwr_info->maxpwr_5gh, 0, fallback);
0437         nvram_read_u8(prefix, postfix, "maxp5gla",
0438                   &pwr_info->maxpwr_5gl, 0, fallback);
0439         nvram_read_u16(prefix, postfix, "pa5gw0a",
0440                    &pwr_info->pa_5g[0], 0, fallback);
0441         nvram_read_u16(prefix, postfix, "pa5gw1a",
0442                    &pwr_info->pa_5g[1], 0, fallback);
0443         nvram_read_u16(prefix, postfix, "pa5gw2a",
0444                    &pwr_info->pa_5g[2], 0, fallback);
0445         nvram_read_u16(prefix, postfix, "pa5glw0a",
0446                    &pwr_info->pa_5gl[0], 0, fallback);
0447         nvram_read_u16(prefix, postfix, "pa5glw1a",
0448                    &pwr_info->pa_5gl[1], 0, fallback);
0449         nvram_read_u16(prefix, postfix, "pa5glw2a",
0450                    &pwr_info->pa_5gl[2], 0, fallback);
0451         nvram_read_u16(prefix, postfix, "pa5ghw0a",
0452                    &pwr_info->pa_5gh[0], 0, fallback);
0453         nvram_read_u16(prefix, postfix, "pa5ghw1a",
0454                    &pwr_info->pa_5gh[1], 0, fallback);
0455         nvram_read_u16(prefix, postfix, "pa5ghw2a",
0456                    &pwr_info->pa_5gh[2], 0, fallback);
0457     }
0458 }
0459 
0460 static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
0461                     const char *prefix, bool fallback)
0462 {
0463     char postfix[2];
0464     int i;
0465 
0466     for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
0467         struct ssb_sprom_core_pwr_info *pwr_info;
0468 
0469         pwr_info = &sprom->core_pwr_info[i];
0470 
0471         snprintf(postfix, sizeof(postfix), "%i", i);
0472         nvram_read_u16(prefix, postfix, "pa2gw3a",
0473                    &pwr_info->pa_2g[3], 0, fallback);
0474         nvram_read_u16(prefix, postfix, "pa5gw3a",
0475                    &pwr_info->pa_5g[3], 0, fallback);
0476         nvram_read_u16(prefix, postfix, "pa5glw3a",
0477                    &pwr_info->pa_5gl[3], 0, fallback);
0478         nvram_read_u16(prefix, postfix, "pa5ghw3a",
0479                    &pwr_info->pa_5gh[3], 0, fallback);
0480     }
0481 }
0482 
0483 static bool bcm47xx_is_valid_mac(u8 *mac)
0484 {
0485     return mac && !(mac[0] == 0x00 && mac[1] == 0x90 && mac[2] == 0x4c);
0486 }
0487 
0488 static int bcm47xx_increase_mac_addr(u8 *mac, u8 num)
0489 {
0490     u8 *oui = mac + ETH_ALEN/2 - 1;
0491     u8 *p = mac + ETH_ALEN - 1;
0492 
0493     do {
0494         (*p) += num;
0495         if (*p > num)
0496             break;
0497         p--;
0498         num = 1;
0499     } while (p != oui);
0500 
0501     if (p == oui) {
0502         pr_err("unable to fetch mac address\n");
0503         return -ENOENT;
0504     }
0505     return 0;
0506 }
0507 
0508 static int mac_addr_used = 2;
0509 
0510 static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
0511                     const char *prefix, bool fallback)
0512 {
0513     bool fb = fallback;
0514 
0515     nvram_read_macaddr(prefix, "et0macaddr", sprom->et0mac, fallback);
0516     nvram_read_u8(prefix, NULL, "et0mdcport", &sprom->et0mdcport, 0,
0517               fallback);
0518     nvram_read_u8(prefix, NULL, "et0phyaddr", &sprom->et0phyaddr, 0,
0519               fallback);
0520 
0521     nvram_read_macaddr(prefix, "et1macaddr", sprom->et1mac, fallback);
0522     nvram_read_u8(prefix, NULL, "et1mdcport", &sprom->et1mdcport, 0,
0523               fallback);
0524     nvram_read_u8(prefix, NULL, "et1phyaddr", &sprom->et1phyaddr, 0,
0525               fallback);
0526 
0527     nvram_read_macaddr(prefix, "et2macaddr", sprom->et2mac, fb);
0528     nvram_read_u8(prefix, NULL, "et2mdcport", &sprom->et2mdcport, 0, fb);
0529     nvram_read_u8(prefix, NULL, "et2phyaddr", &sprom->et2phyaddr, 0, fb);
0530 
0531     nvram_read_macaddr(prefix, "macaddr", sprom->il0mac, fallback);
0532     nvram_read_macaddr(prefix, "il0macaddr", sprom->il0mac, fallback);
0533 
0534     /* The address prefix 00:90:4C is used by Broadcom in their initial
0535      * configuration. When a mac address with the prefix 00:90:4C is used
0536      * all devices from the same series are sharing the same mac address.
0537      * To prevent mac address collisions we replace them with a mac address
0538      * based on the base address.
0539      */
0540     if (!bcm47xx_is_valid_mac(sprom->il0mac)) {
0541         u8 mac[6];
0542 
0543         nvram_read_macaddr(NULL, "et0macaddr", mac, false);
0544         if (bcm47xx_is_valid_mac(mac)) {
0545             int err = bcm47xx_increase_mac_addr(mac, mac_addr_used);
0546 
0547             if (!err) {
0548                 ether_addr_copy(sprom->il0mac, mac);
0549                 mac_addr_used++;
0550             }
0551         }
0552     }
0553 }
0554 
0555 static void bcm47xx_fill_board_data(struct ssb_sprom *sprom, const char *prefix,
0556                     bool fallback)
0557 {
0558     nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
0559              &sprom->boardflags_hi, fallback);
0560     nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo,
0561              &sprom->boardflags2_hi, fallback);
0562 }
0563 
0564 void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,
0565             bool fallback)
0566 {
0567     bcm47xx_fill_sprom_ethernet(sprom, prefix, fallback);
0568     bcm47xx_fill_board_data(sprom, prefix, fallback);
0569 
0570     nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0, fallback);
0571 
0572     /* Entries requiring custom functions */
0573     nvram_read_alpha2(prefix, "ccode", sprom->alpha2, fallback);
0574     if (sprom->revision >= 3)
0575         nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
0576                  &sprom->leddc_off_time, fallback);
0577 
0578     switch (sprom->revision) {
0579     case 4:
0580     case 5:
0581         bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
0582         bcm47xx_fill_sprom_path_r45(sprom, prefix, fallback);
0583         break;
0584     case 8:
0585     case 9:
0586         bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
0587         break;
0588     }
0589 
0590     bcm47xx_sprom_fill_auto(sprom, prefix, fallback);
0591 }
0592 
0593 #if IS_BUILTIN(CONFIG_SSB) && IS_ENABLED(CONFIG_SSB_SPROM)
0594 static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)
0595 {
0596     char prefix[10];
0597 
0598     switch (bus->bustype) {
0599     case SSB_BUSTYPE_SSB:
0600         bcm47xx_fill_sprom(out, NULL, false);
0601         return 0;
0602     case SSB_BUSTYPE_PCI:
0603         memset(out, 0, sizeof(struct ssb_sprom));
0604         snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
0605              bus->host_pci->bus->number + 1,
0606              PCI_SLOT(bus->host_pci->devfn));
0607         bcm47xx_fill_sprom(out, prefix, false);
0608         return 0;
0609     default:
0610         pr_warn("Unable to fill SPROM for given bustype.\n");
0611         return -EINVAL;
0612     }
0613 }
0614 #endif
0615 
0616 #if IS_BUILTIN(CONFIG_BCMA)
0617 /*
0618  * Having many NVRAM entries for PCI devices led to repeating prefixes like
0619  * pci/1/1/ all the time and wasting flash space. So at some point Broadcom
0620  * decided to introduce prefixes like 0: 1: 2: etc.
0621  * If we find e.g. devpath0=pci/2/1 or devpath0=pci/2/1/ we should use 0:
0622  * instead of pci/2/1/.
0623  */
0624 static void bcm47xx_sprom_apply_prefix_alias(char *prefix, size_t prefix_size)
0625 {
0626     size_t prefix_len = strlen(prefix);
0627     size_t short_len = prefix_len - 1;
0628     char nvram_var[10];
0629     char buf[20];
0630     int i;
0631 
0632     /* Passed prefix has to end with a slash */
0633     if (prefix_len <= 0 || prefix[prefix_len - 1] != '/')
0634         return;
0635 
0636     for (i = 0; i < 3; i++) {
0637         if (snprintf(nvram_var, sizeof(nvram_var), "devpath%d", i) <= 0)
0638             continue;
0639         if (bcm47xx_nvram_getenv(nvram_var, buf, sizeof(buf)) < 0)
0640             continue;
0641         if (!strcmp(buf, prefix) ||
0642             (short_len && strlen(buf) == short_len && !strncmp(buf, prefix, short_len))) {
0643             snprintf(prefix, prefix_size, "%d:", i);
0644             return;
0645         }
0646     }
0647 }
0648 
0649 static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)
0650 {
0651     struct bcma_boardinfo *binfo = &bus->boardinfo;
0652     struct bcma_device *core;
0653     char buf[10];
0654     char *prefix;
0655     bool fallback = false;
0656 
0657     switch (bus->hosttype) {
0658     case BCMA_HOSTTYPE_PCI:
0659         memset(out, 0, sizeof(struct ssb_sprom));
0660         /* On BCM47XX all PCI buses share the same domain */
0661         if (IS_ENABLED(CONFIG_BCM47XX))
0662             snprintf(buf, sizeof(buf), "pci/%u/%u/",
0663                  bus->host_pci->bus->number + 1,
0664                  PCI_SLOT(bus->host_pci->devfn));
0665         else
0666             snprintf(buf, sizeof(buf), "pci/%u/%u/",
0667                  pci_domain_nr(bus->host_pci->bus) + 1,
0668                  bus->host_pci->bus->number);
0669         bcm47xx_sprom_apply_prefix_alias(buf, sizeof(buf));
0670         prefix = buf;
0671         break;
0672     case BCMA_HOSTTYPE_SOC:
0673         memset(out, 0, sizeof(struct ssb_sprom));
0674         core = bcma_find_core(bus, BCMA_CORE_80211);
0675         if (core) {
0676             snprintf(buf, sizeof(buf), "sb/%u/",
0677                  core->core_index);
0678             prefix = buf;
0679             fallback = true;
0680         } else {
0681             prefix = NULL;
0682         }
0683         break;
0684     default:
0685         pr_warn("Unable to fill SPROM for given bustype.\n");
0686         return -EINVAL;
0687     }
0688 
0689     nvram_read_u16(prefix, NULL, "boardvendor", &binfo->vendor, 0, true);
0690     if (!binfo->vendor)
0691         binfo->vendor = SSB_BOARDVENDOR_BCM;
0692     nvram_read_u16(prefix, NULL, "boardtype", &binfo->type, 0, true);
0693 
0694     bcm47xx_fill_sprom(out, prefix, fallback);
0695 
0696     return 0;
0697 }
0698 #endif
0699 
0700 static unsigned int bcm47xx_sprom_registered;
0701 
0702 /*
0703  * On bcm47xx we need to register SPROM fallback handler very early, so we can't
0704  * use anything like platform device / driver for this.
0705  */
0706 int bcm47xx_sprom_register_fallbacks(void)
0707 {
0708     if (bcm47xx_sprom_registered)
0709         return 0;
0710 
0711 #if IS_BUILTIN(CONFIG_SSB) && IS_ENABLED(CONFIG_SSB_SPROM)
0712     if (ssb_arch_register_fallback_sprom(&bcm47xx_get_sprom_ssb))
0713         pr_warn("Failed to register ssb SPROM handler\n");
0714 #endif
0715 
0716 #if IS_BUILTIN(CONFIG_BCMA)
0717     if (bcma_arch_register_fallback_sprom(&bcm47xx_get_sprom_bcma))
0718         pr_warn("Failed to register bcma SPROM handler\n");
0719 #endif
0720 
0721     bcm47xx_sprom_registered = 1;
0722 
0723     return 0;
0724 }
0725 
0726 fs_initcall(bcm47xx_sprom_register_fallbacks);
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