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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Minimalist driver for a generic PCI-to-EISA bridge.
0004  *
0005  * (C) 2003 Marc Zyngier <maz@wild-wind.fr.eu.org>
0006  *
0007  * Ivan Kokshaysky <ink@jurassic.park.msu.ru> :
0008  * Generalisation from i82375 to PCI_CLASS_BRIDGE_EISA.
0009  */
0010 
0011 #include <linux/kernel.h>
0012 #include <linux/device.h>
0013 #include <linux/eisa.h>
0014 #include <linux/pci.h>
0015 #include <linux/module.h>
0016 #include <linux/init.h>
0017 
0018 /* There is only *one* pci_eisa device per machine, right ? */
0019 static struct eisa_root_device pci_eisa_root;
0020 
0021 static int __init pci_eisa_init(struct pci_dev *pdev)
0022 {
0023     int rc, i;
0024     struct resource *res, *bus_res = NULL;
0025 
0026     if ((rc = pci_enable_device (pdev))) {
0027         dev_err(&pdev->dev, "Could not enable device\n");
0028         return rc;
0029     }
0030 
0031     /*
0032      * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
0033      * device, so the resources available on EISA are the same as those
0034      * available on the 82375 bus.  This works the same as a PCI-PCI
0035      * bridge in subtractive-decode mode (see pci_read_bridge_bases()).
0036      * We assume other PCI-EISA bridges are similar.
0037      *
0038      * eisa_root_register() can only deal with a single io port resource,
0039     *  so we use the first valid io port resource.
0040      */
0041     pci_bus_for_each_resource(pdev->bus, res, i)
0042         if (res && (res->flags & IORESOURCE_IO)) {
0043             bus_res = res;
0044             break;
0045         }
0046 
0047     if (!bus_res) {
0048         dev_err(&pdev->dev, "No resources available\n");
0049         return -1;
0050     }
0051 
0052     pci_eisa_root.dev       = &pdev->dev;
0053     pci_eisa_root.res       = bus_res;
0054     pci_eisa_root.bus_base_addr = bus_res->start;
0055     pci_eisa_root.slots     = EISA_MAX_SLOTS;
0056     pci_eisa_root.dma_mask      = pdev->dma_mask;
0057     dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
0058 
0059     if (eisa_root_register (&pci_eisa_root)) {
0060         dev_err(&pdev->dev, "Could not register EISA root\n");
0061         return -1;
0062     }
0063 
0064     return 0;
0065 }
0066 
0067 /*
0068  * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
0069  *   Otherwise pnp resource will get enabled early and could prevent eisa
0070  *   to be initialized.
0071  * Also need to make sure pci_eisa_init_early() is called after
0072  * x86/pci_subsys_init().
0073  * So need to use subsys_initcall_sync with it.
0074  */
0075 static int __init pci_eisa_init_early(void)
0076 {
0077     struct pci_dev *dev = NULL;
0078     int ret;
0079 
0080     for_each_pci_dev(dev)
0081         if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
0082             ret = pci_eisa_init(dev);
0083             if (ret)
0084                 return ret;
0085         }
0086 
0087     return 0;
0088 }
0089 subsys_initcall_sync(pci_eisa_init_early);