drivers/edac/layerscape_edac.c

0001 /*
0002  * Freescale Memory Controller kernel module
0003  *
0004  * Author: York Sun <york.sun@nxp.com>
0005  *
0006  * Copyright 2016 NXP Semiconductor
0007  *
0008  * Derived from mpc85xx_edac.c
0009  * Author: Dave Jiang <djiang@mvista.com>
0010  *
0011  * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
0012  * the terms of the GNU General Public License version 2. This program
0013  * is licensed "as is" without any warranty of any kind, whether express
0014  * or implied.
0015  */
0016
0017 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0018
0019 #include "edac_module.h"
0020 #include "fsl_ddr_edac.h"
0021
0022 static const struct of_device_id fsl_ddr_mc_err_of_match[] = {
0023     { .compatible = "fsl,qoriq-memory-controller", },
0024     {},
0025 };
0026 MODULE_DEVICE_TABLE(of, fsl_ddr_mc_err_of_match);
0027
0028 static struct platform_driver fsl_ddr_mc_err_driver = {
0029     .probe = fsl_mc_err_probe,
0030     .remove = fsl_mc_err_remove,
0031     .driver = {
0032         .name = "fsl_ddr_mc_err",
0033         .of_match_table = fsl_ddr_mc_err_of_match,
0034     },
0035 };
0036
0037 static int __init fsl_ddr_mc_init(void)
0038 {
0039     int res;
0040
0041     /* make sure error reporting method is sane */
0042     switch (edac_op_state) {
0043     case EDAC_OPSTATE_POLL:
0044     case EDAC_OPSTATE_INT:
0045         break;
0046     default:
0047         edac_op_state = EDAC_OPSTATE_INT;
0048         break;
0049     }
0050
0051     res = platform_driver_register(&fsl_ddr_mc_err_driver);
0052     if (res) {
0053         pr_err("MC fails to register\n");
0054         return res;
0055     }
0056
0057     return 0;
0058 }
0059
0060 module_init(fsl_ddr_mc_init);
0061
0062 static void __exit fsl_ddr_mc_exit(void)
0063 {
0064     platform_driver_unregister(&fsl_ddr_mc_err_driver);
0065 }
0066
0067 module_exit(fsl_ddr_mc_exit);
0068
0069 MODULE_LICENSE("GPL");
0070 MODULE_AUTHOR("NXP Semiconductor");
0071 module_param(edac_op_state, int, 0444);
0072 MODULE_PARM_DESC(edac_op_state,
0073          "EDAC Error Reporting state: 0=Poll, 2=Interrupt");