dma/ti/k3-psil-j721s2.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  *  Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com
0004  */
0005
0006 #include <linux/kernel.h>
0007
0008 #include "k3-psil-priv.h"
0009
0010 #define PSIL_PDMA_XY_TR(x)              \
0011     {                       \
0012         .thread_id = x,             \
0013         .ep_config = {              \
0014             .ep_type = PSIL_EP_PDMA_XY, \
0015         },                  \
0016     }
0017
0018 #define PSIL_PDMA_XY_PKT(x)             \
0019     {                       \
0020         .thread_id = x,             \
0021         .ep_config = {              \
0022             .ep_type = PSIL_EP_PDMA_XY, \
0023             .pkt_mode = 1,          \
0024         },                  \
0025     }
0026
0027 #define PSIL_PDMA_MCASP(x)              \
0028     {                       \
0029         .thread_id = x,             \
0030         .ep_config = {              \
0031             .ep_type = PSIL_EP_PDMA_XY, \
0032             .pdma_acc32 = 1,        \
0033             .pdma_burst = 1,        \
0034         },                  \
0035     }
0036
0037 #define PSIL_ETHERNET(x)                \
0038     {                       \
0039         .thread_id = x,             \
0040         .ep_config = {              \
0041             .ep_type = PSIL_EP_NATIVE,  \
0042             .pkt_mode = 1,          \
0043             .needs_epib = 1,        \
0044             .psd_size = 16,         \
0045         },                  \
0046     }
0047
0048 #define PSIL_SA2UL(x, tx)               \
0049     {                       \
0050         .thread_id = x,             \
0051         .ep_config = {              \
0052             .ep_type = PSIL_EP_NATIVE,  \
0053             .pkt_mode = 1,          \
0054             .needs_epib = 1,        \
0055             .psd_size = 64,         \
0056             .notdpkt = tx,          \
0057         },                  \
0058     }
0059
0060 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
0061 static struct psil_ep j721s2_src_ep_map[] = {
0062     /* PDMA_MCASP - McASP0-4 */
0063     PSIL_PDMA_MCASP(0x4400),
0064     PSIL_PDMA_MCASP(0x4401),
0065     PSIL_PDMA_MCASP(0x4402),
0066     PSIL_PDMA_MCASP(0x4403),
0067     PSIL_PDMA_MCASP(0x4404),
0068     /* PDMA_SPI_G0 - SPI0-3 */
0069     PSIL_PDMA_XY_PKT(0x4600),
0070     PSIL_PDMA_XY_PKT(0x4601),
0071     PSIL_PDMA_XY_PKT(0x4602),
0072     PSIL_PDMA_XY_PKT(0x4603),
0073     PSIL_PDMA_XY_PKT(0x4604),
0074     PSIL_PDMA_XY_PKT(0x4605),
0075     PSIL_PDMA_XY_PKT(0x4606),
0076     PSIL_PDMA_XY_PKT(0x4607),
0077     PSIL_PDMA_XY_PKT(0x4608),
0078     PSIL_PDMA_XY_PKT(0x4609),
0079     PSIL_PDMA_XY_PKT(0x460a),
0080     PSIL_PDMA_XY_PKT(0x460b),
0081     PSIL_PDMA_XY_PKT(0x460c),
0082     PSIL_PDMA_XY_PKT(0x460d),
0083     PSIL_PDMA_XY_PKT(0x460e),
0084     PSIL_PDMA_XY_PKT(0x460f),
0085     /* PDMA_SPI_G1 - SPI4-7 */
0086     PSIL_PDMA_XY_PKT(0x4610),
0087     PSIL_PDMA_XY_PKT(0x4611),
0088     PSIL_PDMA_XY_PKT(0x4612),
0089     PSIL_PDMA_XY_PKT(0x4613),
0090     PSIL_PDMA_XY_PKT(0x4614),
0091     PSIL_PDMA_XY_PKT(0x4615),
0092     PSIL_PDMA_XY_PKT(0x4616),
0093     PSIL_PDMA_XY_PKT(0x4617),
0094     PSIL_PDMA_XY_PKT(0x4618),
0095     PSIL_PDMA_XY_PKT(0x4619),
0096     PSIL_PDMA_XY_PKT(0x461a),
0097     PSIL_PDMA_XY_PKT(0x461b),
0098     PSIL_PDMA_XY_PKT(0x461c),
0099     PSIL_PDMA_XY_PKT(0x461d),
0100     PSIL_PDMA_XY_PKT(0x461e),
0101     PSIL_PDMA_XY_PKT(0x461f),
0102     /* PDMA_USART_G0 - UART0-1 */
0103     PSIL_PDMA_XY_PKT(0x4700),
0104     PSIL_PDMA_XY_PKT(0x4701),
0105     /* PDMA_USART_G1 - UART2-3 */
0106     PSIL_PDMA_XY_PKT(0x4702),
0107     PSIL_PDMA_XY_PKT(0x4703),
0108     /* PDMA_USART_G2 - UART4-9 */
0109     PSIL_PDMA_XY_PKT(0x4704),
0110     PSIL_PDMA_XY_PKT(0x4705),
0111     PSIL_PDMA_XY_PKT(0x4706),
0112     PSIL_PDMA_XY_PKT(0x4707),
0113     PSIL_PDMA_XY_PKT(0x4708),
0114     PSIL_PDMA_XY_PKT(0x4709),
0115     /* MAIN SA2UL */
0116     PSIL_SA2UL(0x4a40, 0),
0117     PSIL_SA2UL(0x4a41, 0),
0118     PSIL_SA2UL(0x4a42, 0),
0119     PSIL_SA2UL(0x4a43, 0),
0120     /* CPSW0 */
0121     PSIL_ETHERNET(0x7000),
0122     /* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */
0123     PSIL_PDMA_XY_PKT(0x7100),
0124     PSIL_PDMA_XY_PKT(0x7101),
0125     PSIL_PDMA_XY_PKT(0x7102),
0126     PSIL_PDMA_XY_PKT(0x7103),
0127     /* MCU_PDMA1 (MCU_PDMA_MISC_G1) - SPI1-2 */
0128     PSIL_PDMA_XY_PKT(0x7200),
0129     PSIL_PDMA_XY_PKT(0x7201),
0130     PSIL_PDMA_XY_PKT(0x7202),
0131     PSIL_PDMA_XY_PKT(0x7203),
0132     PSIL_PDMA_XY_PKT(0x7204),
0133     PSIL_PDMA_XY_PKT(0x7205),
0134     PSIL_PDMA_XY_PKT(0x7206),
0135     PSIL_PDMA_XY_PKT(0x7207),
0136     /* MCU_PDMA2 (MCU_PDMA_MISC_G2) - UART0 */
0137     PSIL_PDMA_XY_PKT(0x7300),
0138     /* MCU_PDMA_ADC - ADC0-1 */
0139     PSIL_PDMA_XY_TR(0x7400),
0140     PSIL_PDMA_XY_TR(0x7401),
0141     PSIL_PDMA_XY_TR(0x7402),
0142     PSIL_PDMA_XY_TR(0x7403),
0143     /* SA2UL */
0144     PSIL_SA2UL(0x7500, 0),
0145     PSIL_SA2UL(0x7501, 0),
0146     PSIL_SA2UL(0x7502, 0),
0147     PSIL_SA2UL(0x7503, 0),
0148 };
0149
0150 /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
0151 static struct psil_ep j721s2_dst_ep_map[] = {
0152     /* MAIN SA2UL */
0153     PSIL_SA2UL(0xca40, 1),
0154     PSIL_SA2UL(0xca41, 1),
0155     /* CPSW0 */
0156     PSIL_ETHERNET(0xf000),
0157     PSIL_ETHERNET(0xf001),
0158     PSIL_ETHERNET(0xf002),
0159     PSIL_ETHERNET(0xf003),
0160     PSIL_ETHERNET(0xf004),
0161     PSIL_ETHERNET(0xf005),
0162     PSIL_ETHERNET(0xf006),
0163     PSIL_ETHERNET(0xf007),
0164     /* SA2UL */
0165     PSIL_SA2UL(0xf500, 1),
0166     PSIL_SA2UL(0xf501, 1),
0167 };
0168
0169 struct psil_ep_map j721s2_ep_map = {
0170     .name = "j721s2",
0171     .src = j721s2_src_ep_map,
0172     .src_count = ARRAY_SIZE(j721s2_src_ep_map),
0173     .dst = j721s2_dst_ep_map,
0174     .dst_count = ARRAY_SIZE(j721s2_dst_ep_map),
0175 };