dma/sh/shdma-arm.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Renesas SuperH DMA Engine support
0004  *
0005  * Copyright (C) 2013 Renesas Electronics, Inc.
0006  */
0007
0008 #ifndef SHDMA_ARM_H
0009 #define SHDMA_ARM_H
0010
0011 #include "shdma.h"
0012
0013 /* Transmit sizes and respective CHCR register values */
0014 enum {
0015     XMIT_SZ_8BIT        = 0,
0016     XMIT_SZ_16BIT       = 1,
0017     XMIT_SZ_32BIT       = 2,
0018     XMIT_SZ_64BIT       = 7,
0019     XMIT_SZ_128BIT      = 3,
0020     XMIT_SZ_256BIT      = 4,
0021     XMIT_SZ_512BIT      = 5,
0022 };
0023
0024 /* log2(size / 8) - used to calculate number of transfers */
0025 #define SH_DMAE_TS_SHIFT {      \
0026     [XMIT_SZ_8BIT]      = 0,    \
0027     [XMIT_SZ_16BIT]     = 1,    \
0028     [XMIT_SZ_32BIT]     = 2,    \
0029     [XMIT_SZ_64BIT]     = 3,    \
0030     [XMIT_SZ_128BIT]    = 4,    \
0031     [XMIT_SZ_256BIT]    = 5,    \
0032     [XMIT_SZ_512BIT]    = 6,    \
0033 }
0034
0035 #define TS_LOW_BIT  0x3 /* --xx */
0036 #define TS_HI_BIT   0xc /* xx-- */
0037
0038 #define TS_LOW_SHIFT    (3)
0039 #define TS_HI_SHIFT (20 - 2)    /* 2 bits for shifted low TS */
0040
0041 #define TS_INDEX2VAL(i) \
0042     ((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\
0043      (((i) & TS_HI_BIT)  << TS_HI_SHIFT))
0044
0045 #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL((xmit_sz)))
0046 #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL((xmit_sz)))
0047
0048 #endif