dma/ioat/dca.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Intel I/OAT DMA Linux driver
0004  * Copyright(c) 2007 - 2009 Intel Corporation.
0005  */
0006
0007 #include <linux/kernel.h>
0008 #include <linux/pci.h>
0009 #include <linux/smp.h>
0010 #include <linux/interrupt.h>
0011 #include <linux/dca.h>
0012
0013 /* either a kernel change is needed, or we need something like this in kernel */
0014 #ifndef CONFIG_SMP
0015 #include <asm/smp.h>
0016 #undef cpu_physical_id
0017 #define cpu_physical_id(cpu) (cpuid_ebx(1) >> 24)
0018 #endif
0019
0020 #include "dma.h"
0021 #include "registers.h"
0022
0023 /*
0024  * Bit 7 of a tag map entry is the "valid" bit, if it is set then bits 0:6
0025  * contain the bit number of the APIC ID to map into the DCA tag.  If the valid
0026  * bit is not set, then the value must be 0 or 1 and defines the bit in the tag.
0027  */
0028 #define DCA_TAG_MAP_VALID 0x80
0029
0030 #define DCA3_TAG_MAP_BIT_TO_INV 0x80
0031 #define DCA3_TAG_MAP_BIT_TO_SEL 0x40
0032 #define DCA3_TAG_MAP_LITERAL_VAL 0x1
0033
0034 #define DCA_TAG_MAP_MASK 0xDF
0035
0036 /* expected tag map bytes for I/OAT ver.2 */
0037 #define DCA2_TAG_MAP_BYTE0 0x80
0038 #define DCA2_TAG_MAP_BYTE1 0x0
0039 #define DCA2_TAG_MAP_BYTE2 0x81
0040 #define DCA2_TAG_MAP_BYTE3 0x82
0041 #define DCA2_TAG_MAP_BYTE4 0x82
0042
0043 /*
0044  * "Legacy" DCA systems do not implement the DCA register set in the
0045  * I/OAT device.  Software needs direct support for their tag mappings.
0046  */
0047
0048 #define APICID_BIT(x)       (DCA_TAG_MAP_VALID | (x))
0049 #define IOAT_TAG_MAP_LEN    8
0050
0051 /* pack PCI B/D/F into a u16 */
0052 static inline u16 dcaid_from_pcidev(struct pci_dev *pci)
0053 {
0054     return (pci->bus->number << 8) | pci->devfn;
0055 }
0056
0057 static int dca_enabled_in_bios(struct pci_dev *pdev)
0058 {
0059     /* CPUID level 9 returns DCA configuration */
0060     /* Bit 0 indicates DCA enabled by the BIOS */
0061     unsigned long cpuid_level_9;
0062     int res;
0063
0064     cpuid_level_9 = cpuid_eax(9);
0065     res = test_bit(0, &cpuid_level_9);
0066     if (!res)
0067         dev_dbg(&pdev->dev, "DCA is disabled in BIOS\n");
0068
0069     return res;
0070 }
0071
0072 int system_has_dca_enabled(struct pci_dev *pdev)
0073 {
0074     if (boot_cpu_has(X86_FEATURE_DCA))
0075         return dca_enabled_in_bios(pdev);
0076
0077     dev_dbg(&pdev->dev, "boot cpu doesn't have X86_FEATURE_DCA\n");
0078     return 0;
0079 }
0080
0081 struct ioat_dca_slot {
0082     struct pci_dev *pdev;   /* requester device */
0083     u16 rid;        /* requester id, as used by IOAT */
0084 };
0085
0086 #define IOAT_DCA_MAX_REQ 6
0087 #define IOAT3_DCA_MAX_REQ 2
0088
0089 struct ioat_dca_priv {
0090     void __iomem        *iobase;
0091     void __iomem        *dca_base;
0092     int          max_requesters;
0093     int          requester_count;
0094     u8           tag_map[IOAT_TAG_MAP_LEN];
0095     struct ioat_dca_slot     req_slots[];
0096 };
0097
0098 static int ioat_dca_dev_managed(struct dca_provider *dca,
0099                 struct device *dev)
0100 {
0101     struct ioat_dca_priv *ioatdca = dca_priv(dca);
0102     struct pci_dev *pdev;
0103     int i;
0104
0105     pdev = to_pci_dev(dev);
0106     for (i = 0; i < ioatdca->max_requesters; i++) {
0107         if (ioatdca->req_slots[i].pdev == pdev)
0108             return 1;
0109     }
0110     return 0;
0111 }
0112
0113 static int ioat_dca_add_requester(struct dca_provider *dca, struct device *dev)
0114 {
0115     struct ioat_dca_priv *ioatdca = dca_priv(dca);
0116     struct pci_dev *pdev;
0117     int i;
0118     u16 id;
0119     u16 global_req_table;
0120
0121     /* This implementation only supports PCI-Express */
0122     if (!dev_is_pci(dev))
0123         return -ENODEV;
0124     pdev = to_pci_dev(dev);
0125     id = dcaid_from_pcidev(pdev);
0126
0127     if (ioatdca->requester_count == ioatdca->max_requesters)
0128         return -ENODEV;
0129
0130     for (i = 0; i < ioatdca->max_requesters; i++) {
0131         if (ioatdca->req_slots[i].pdev == NULL) {
0132             /* found an empty slot */
0133             ioatdca->requester_count++;
0134             ioatdca->req_slots[i].pdev = pdev;
0135             ioatdca->req_slots[i].rid = id;
0136             global_req_table =
0137                   readw(ioatdca->dca_base + IOAT3_DCA_GREQID_OFFSET);
0138             writel(id | IOAT_DCA_GREQID_VALID,
0139                    ioatdca->iobase + global_req_table + (i * 4));
0140             return i;
0141         }
0142     }
0143     /* Error, ioatdma->requester_count is out of whack */
0144     return -EFAULT;
0145 }
0146
0147 static int ioat_dca_remove_requester(struct dca_provider *dca,
0148                       struct device *dev)
0149 {
0150     struct ioat_dca_priv *ioatdca = dca_priv(dca);
0151     struct pci_dev *pdev;
0152     int i;
0153     u16 global_req_table;
0154
0155     /* This implementation only supports PCI-Express */
0156     if (!dev_is_pci(dev))
0157         return -ENODEV;
0158     pdev = to_pci_dev(dev);
0159
0160     for (i = 0; i < ioatdca->max_requesters; i++) {
0161         if (ioatdca->req_slots[i].pdev == pdev) {
0162             global_req_table =
0163                   readw(ioatdca->dca_base + IOAT3_DCA_GREQID_OFFSET);
0164             writel(0, ioatdca->iobase + global_req_table + (i * 4));
0165             ioatdca->req_slots[i].pdev = NULL;
0166             ioatdca->req_slots[i].rid = 0;
0167             ioatdca->requester_count--;
0168             return i;
0169         }
0170     }
0171     return -ENODEV;
0172 }
0173
0174 static u8 ioat_dca_get_tag(struct dca_provider *dca,
0175                 struct device *dev,
0176                 int cpu)
0177 {
0178     u8 tag;
0179
0180     struct ioat_dca_priv *ioatdca = dca_priv(dca);
0181     int i, apic_id, bit, value;
0182     u8 entry;
0183
0184     tag = 0;
0185     apic_id = cpu_physical_id(cpu);
0186
0187     for (i = 0; i < IOAT_TAG_MAP_LEN; i++) {
0188         entry = ioatdca->tag_map[i];
0189         if (entry & DCA3_TAG_MAP_BIT_TO_SEL) {
0190             bit = entry &
0191                 ~(DCA3_TAG_MAP_BIT_TO_SEL | DCA3_TAG_MAP_BIT_TO_INV);
0192             value = (apic_id & (1 << bit)) ? 1 : 0;
0193         } else if (entry & DCA3_TAG_MAP_BIT_TO_INV) {
0194             bit = entry & ~DCA3_TAG_MAP_BIT_TO_INV;
0195             value = (apic_id & (1 << bit)) ? 0 : 1;
0196         } else {
0197             value = (entry & DCA3_TAG_MAP_LITERAL_VAL) ? 1 : 0;
0198         }
0199         tag |= (value << i);
0200     }
0201
0202     return tag;
0203 }
0204
0205 static const struct dca_ops ioat_dca_ops = {
0206     .add_requester      = ioat_dca_add_requester,
0207     .remove_requester   = ioat_dca_remove_requester,
0208     .get_tag        = ioat_dca_get_tag,
0209     .dev_managed        = ioat_dca_dev_managed,
0210 };
0211
0212 static int ioat_dca_count_dca_slots(void *iobase, u16 dca_offset)
0213 {
0214     int slots = 0;
0215     u32 req;
0216     u16 global_req_table;
0217
0218     global_req_table = readw(iobase + dca_offset + IOAT3_DCA_GREQID_OFFSET);
0219     if (global_req_table == 0)
0220         return 0;
0221
0222     do {
0223         req = readl(iobase + global_req_table + (slots * sizeof(u32)));
0224         slots++;
0225     } while ((req & IOAT_DCA_GREQID_LASTID) == 0);
0226
0227     return slots;
0228 }
0229
0230 static inline int dca3_tag_map_invalid(u8 *tag_map)
0231 {
0232     /*
0233      * If the tag map is not programmed by the BIOS the default is:
0234      * 0x80 0x80 0x80 0x80 0x80 0x00 0x00 0x00
0235      *
0236      * This an invalid map and will result in only 2 possible tags
0237      * 0x1F and 0x00.  0x00 is an invalid DCA tag so we know that
0238      * this entire definition is invalid.
0239      */
0240     return ((tag_map[0] == DCA_TAG_MAP_VALID) &&
0241         (tag_map[1] == DCA_TAG_MAP_VALID) &&
0242         (tag_map[2] == DCA_TAG_MAP_VALID) &&
0243         (tag_map[3] == DCA_TAG_MAP_VALID) &&
0244         (tag_map[4] == DCA_TAG_MAP_VALID));
0245 }
0246
0247 struct dca_provider *ioat_dca_init(struct pci_dev *pdev, void __iomem *iobase)
0248 {
0249     struct dca_provider *dca;
0250     struct ioat_dca_priv *ioatdca;
0251     int slots;
0252     int i;
0253     int err;
0254     u16 dca_offset;
0255     u16 csi_fsb_control;
0256     u16 pcie_control;
0257     u8 bit;
0258
0259     union {
0260         u64 full;
0261         struct {
0262             u32 low;
0263             u32 high;
0264         };
0265     } tag_map;
0266
0267     if (!system_has_dca_enabled(pdev))
0268         return NULL;
0269
0270     dca_offset = readw(iobase + IOAT_DCAOFFSET_OFFSET);
0271     if (dca_offset == 0)
0272         return NULL;
0273
0274     slots = ioat_dca_count_dca_slots(iobase, dca_offset);
0275     if (slots == 0)
0276         return NULL;
0277
0278     dca = alloc_dca_provider(&ioat_dca_ops,
0279                  struct_size(ioatdca, req_slots, slots));
0280     if (!dca)
0281         return NULL;
0282
0283     ioatdca = dca_priv(dca);
0284     ioatdca->iobase = iobase;
0285     ioatdca->dca_base = iobase + dca_offset;
0286     ioatdca->max_requesters = slots;
0287
0288     /* some bios might not know to turn these on */
0289     csi_fsb_control = readw(ioatdca->dca_base + IOAT3_CSI_CONTROL_OFFSET);
0290     if ((csi_fsb_control & IOAT3_CSI_CONTROL_PREFETCH) == 0) {
0291         csi_fsb_control |= IOAT3_CSI_CONTROL_PREFETCH;
0292         writew(csi_fsb_control,
0293                ioatdca->dca_base + IOAT3_CSI_CONTROL_OFFSET);
0294     }
0295     pcie_control = readw(ioatdca->dca_base + IOAT3_PCI_CONTROL_OFFSET);
0296     if ((pcie_control & IOAT3_PCI_CONTROL_MEMWR) == 0) {
0297         pcie_control |= IOAT3_PCI_CONTROL_MEMWR;
0298         writew(pcie_control,
0299                ioatdca->dca_base + IOAT3_PCI_CONTROL_OFFSET);
0300     }
0301
0302
0303     /* TODO version, compatibility and configuration checks */
0304
0305     /* copy out the APIC to DCA tag map */
0306     tag_map.low =
0307         readl(ioatdca->dca_base + IOAT3_APICID_TAG_MAP_OFFSET_LOW);
0308     tag_map.high =
0309         readl(ioatdca->dca_base + IOAT3_APICID_TAG_MAP_OFFSET_HIGH);
0310     for (i = 0; i < 8; i++) {
0311         bit = tag_map.full >> (8 * i);
0312         ioatdca->tag_map[i] = bit & DCA_TAG_MAP_MASK;
0313     }
0314
0315     if (dca3_tag_map_invalid(ioatdca->tag_map)) {
0316         add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
0317         pr_warn_once("%s %s: APICID_TAG_MAP set incorrectly by BIOS, disabling DCA\n",
0318                  dev_driver_string(&pdev->dev),
0319                  dev_name(&pdev->dev));
0320         free_dca_provider(dca);
0321         return NULL;
0322     }
0323
0324     err = register_dca_provider(dca, &pdev->dev);
0325     if (err) {
0326         free_dca_provider(dca);
0327         return NULL;
0328     }
0329
0330     return dca;
0331 }