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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Bestcomm FEC TX task microcode
0004  *
0005  * Copyright (c) 2004 Freescale Semiconductor, Inc.
0006  *
0007  * Automatically created based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex
0008  * on Tue Mar 22 11:19:29 2005 GMT
0009  */
0010 
0011 #include <asm/types.h>
0012 
0013 /*
0014  * The header consists of the following fields:
0015  *  u32 magic;
0016  *  u8  desc_size;
0017  *  u8  var_size;
0018  *  u8  inc_size;
0019  *  u8  first_var;
0020  *  u8  reserved[8];
0021  *
0022  * The size fields contain the number of 32-bit words.
0023  */
0024 
0025 u32 bcom_fec_tx_task[] = {
0026     /* header */
0027     0x4243544b,
0028     0x2407070d,
0029     0x00000000,
0030     0x00000000,
0031 
0032     /* Task descriptors */
0033     0x8018001b, /* LCD: idx0 = var0; idx0 <= var0; idx0 += inc3 */
0034     0x60000005, /*   DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */
0035     0x01ccfc0d, /*   DRD2B1: var7 = EU3(); EU3(*idx0,var13)  */
0036     0x8082a123, /* LCD: idx0 = var1, idx1 = var5; idx1 <= var4; idx0 += inc4, idx1 += inc3 */
0037     0x10801418, /*   DRD1A: var5 = var3; FN=0 MORE init=4 WS=0 RS=0 */
0038     0xf88103a4, /*   LCDEXT: idx2 = *idx1, idx3 = var2; idx2 < var14; idx2 += inc4, idx3 += inc4 */
0039     0x801a6024, /*   LCD: idx4 = var0; ; idx4 += inc4 */
0040     0x10001708, /*     DRD1A: var5 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
0041     0x60140002, /*     DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */
0042     0x0cccfccf, /*     DRD2B1: *idx3 = EU3(); EU3(*idx3,var15)  */
0043     0x991a002c, /*   LCD: idx2 = idx2, idx3 = idx4; idx2 once var0; idx2 += inc5, idx3 += inc4 */
0044     0x70000002, /*     DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */
0045     0x024cfc4d, /*     DRD2B1: var9 = EU3(); EU3(*idx1,var13)  */
0046     0x60000003, /*     DRD2A: EU0=0 EU1=0 EU2=0 EU3=3 EXT init=0 WS=0 RS=0 */
0047     0x0cccf247, /*     DRD2B1: *idx3 = EU3(); EU3(var9,var7)  */
0048     0x80004000, /*   LCDEXT: idx2 = 0x00000000; ; */
0049     0xb8c80029, /*   LCD: idx3 = *(idx1 + var0000001a); idx3 once var0; idx3 += inc5 */
0050     0x70000002, /*     DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */
0051     0x088cf8d1, /*     DRD2B1: idx2 = EU3(); EU3(idx3,var17)  */
0052     0x00002f10, /*     DRD1A: var11 = idx2; FN=0 init=0 WS=0 RS=0 */
0053     0x99198432, /*   LCD: idx2 = idx2, idx3 = idx3; idx2 > var16; idx2 += inc6, idx3 += inc2 */
0054     0x008ac398, /*     DRD1A: *idx0 = *idx3; FN=0 init=4 WS=1 RS=1 */
0055     0x80004000, /*   LCDEXT: idx2 = 0x00000000; ; */
0056     0x9999802d, /*   LCD: idx3 = idx3; idx3 once var0; idx3 += inc5 */
0057     0x70000002, /*     DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */
0058     0x048cfc53, /*     DRD2B1: var18 = EU3(); EU3(*idx1,var19)  */
0059     0x60000008, /*     DRD2A: EU0=0 EU1=0 EU2=0 EU3=8 EXT init=0 WS=0 RS=0 */
0060     0x088cf48b, /*     DRD2B1: idx2 = EU3(); EU3(var18,var11)  */
0061     0x99198481, /*   LCD: idx2 = idx2, idx3 = idx3; idx2 > var18; idx2 += inc0, idx3 += inc1 */
0062     0x009ec398, /*     DRD1A: *idx0 = *idx3; FN=0 init=4 WS=3 RS=3 */
0063     0x991983b2, /*   LCD: idx2 = idx2, idx3 = idx3; idx2 > var14; idx2 += inc6, idx3 += inc2 */
0064     0x088ac398, /*     DRD1A: *idx0 = *idx3; FN=0 TFD init=4 WS=1 RS=1 */
0065     0x9919002d, /*   LCD: idx2 = idx2; idx2 once var0; idx2 += inc5 */
0066     0x60000005, /*     DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */
0067     0x0c4cf88e, /*     DRD2B1: *idx1 = EU3(); EU3(idx2,var14)  */
0068     0x000001f8, /*   NOP */
0069 
0070     /* VAR[13]-VAR[19] */
0071     0x0c000000,
0072     0x40000000,
0073     0x7fff7fff,
0074     0x00000000,
0075     0x00000003,
0076     0x40000004,
0077     0x43ffffff,
0078 
0079     /* INC[0]-INC[6] */
0080     0x40000000,
0081     0xe0000000,
0082     0xe0000000,
0083     0xa0000008,
0084     0x20000000,
0085     0x00000000,
0086     0x4000ffff,
0087 };
0088