devfreq/event/rockchip-dfi.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
0004  * Author: Lin Huang <hl@rock-chips.com>
0005  */
0006
0007 #include <linux/clk.h>
0008 #include <linux/devfreq-event.h>
0009 #include <linux/kernel.h>
0010 #include <linux/err.h>
0011 #include <linux/init.h>
0012 #include <linux/io.h>
0013 #include <linux/mfd/syscon.h>
0014 #include <linux/module.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/regmap.h>
0017 #include <linux/slab.h>
0018 #include <linux/list.h>
0019 #include <linux/of.h>
0020
0021 #include <soc/rockchip/rk3399_grf.h>
0022
0023 #define RK3399_DMC_NUM_CH   2
0024
0025 /* DDRMON_CTRL */
0026 #define DDRMON_CTRL 0x04
0027 #define CLR_DDRMON_CTRL (0x1f0000 << 0)
0028 #define LPDDR4_EN   (0x10001 << 4)
0029 #define HARDWARE_EN (0x10001 << 3)
0030 #define LPDDR3_EN   (0x10001 << 2)
0031 #define SOFTWARE_EN (0x10001 << 1)
0032 #define SOFTWARE_DIS    (0x10000 << 1)
0033 #define TIME_CNT_EN (0x10001 << 0)
0034
0035 #define DDRMON_CH0_COUNT_NUM        0x28
0036 #define DDRMON_CH0_DFI_ACCESS_NUM   0x2c
0037 #define DDRMON_CH1_COUNT_NUM        0x3c
0038 #define DDRMON_CH1_DFI_ACCESS_NUM   0x40
0039
0040 struct dmc_usage {
0041     u32 access;
0042     u32 total;
0043 };
0044
0045 /*
0046  * The dfi controller can monitor DDR load. It has an upper and lower threshold
0047  * for the operating points. Whenever the usage leaves these bounds an event is
0048  * generated to indicate the DDR frequency should be changed.
0049  */
0050 struct rockchip_dfi {
0051     struct devfreq_event_dev *edev;
0052     struct devfreq_event_desc *desc;
0053     struct dmc_usage ch_usage[RK3399_DMC_NUM_CH];
0054     struct device *dev;
0055     void __iomem *regs;
0056     struct regmap *regmap_pmu;
0057     struct clk *clk;
0058 };
0059
0060 static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
0061 {
0062     struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
0063     void __iomem *dfi_regs = info->regs;
0064     u32 val;
0065     u32 ddr_type;
0066
0067     /* get ddr type */
0068     regmap_read(info->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
0069     ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
0070             RK3399_PMUGRF_DDRTYPE_MASK;
0071
0072     /* clear DDRMON_CTRL setting */
0073     writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
0074
0075     /* set ddr type to dfi */
0076     if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3)
0077         writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
0078     else if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4)
0079         writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
0080
0081     /* enable count, use software mode */
0082     writel_relaxed(SOFTWARE_EN, dfi_regs + DDRMON_CTRL);
0083 }
0084
0085 static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
0086 {
0087     struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
0088     void __iomem *dfi_regs = info->regs;
0089
0090     writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL);
0091 }
0092
0093 static int rockchip_dfi_get_busier_ch(struct devfreq_event_dev *edev)
0094 {
0095     struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
0096     u32 tmp, max = 0;
0097     u32 i, busier_ch = 0;
0098     void __iomem *dfi_regs = info->regs;
0099
0100     rockchip_dfi_stop_hardware_counter(edev);
0101
0102     /* Find out which channel is busier */
0103     for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
0104         info->ch_usage[i].access = readl_relaxed(dfi_regs +
0105                 DDRMON_CH0_DFI_ACCESS_NUM + i * 20) * 4;
0106         info->ch_usage[i].total = readl_relaxed(dfi_regs +
0107                 DDRMON_CH0_COUNT_NUM + i * 20);
0108         tmp = info->ch_usage[i].access;
0109         if (tmp > max) {
0110             busier_ch = i;
0111             max = tmp;
0112         }
0113     }
0114     rockchip_dfi_start_hardware_counter(edev);
0115
0116     return busier_ch;
0117 }
0118
0119 static int rockchip_dfi_disable(struct devfreq_event_dev *edev)
0120 {
0121     struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
0122
0123     rockchip_dfi_stop_hardware_counter(edev);
0124     clk_disable_unprepare(info->clk);
0125
0126     return 0;
0127 }
0128
0129 static int rockchip_dfi_enable(struct devfreq_event_dev *edev)
0130 {
0131     struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
0132     int ret;
0133
0134     ret = clk_prepare_enable(info->clk);
0135     if (ret) {
0136         dev_err(&edev->dev, "failed to enable dfi clk: %d\n", ret);
0137         return ret;
0138     }
0139
0140     rockchip_dfi_start_hardware_counter(edev);
0141     return 0;
0142 }
0143
0144 static int rockchip_dfi_set_event(struct devfreq_event_dev *edev)
0145 {
0146     return 0;
0147 }
0148
0149 static int rockchip_dfi_get_event(struct devfreq_event_dev *edev,
0150                   struct devfreq_event_data *edata)
0151 {
0152     struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
0153     int busier_ch;
0154
0155     busier_ch = rockchip_dfi_get_busier_ch(edev);
0156
0157     edata->load_count = info->ch_usage[busier_ch].access;
0158     edata->total_count = info->ch_usage[busier_ch].total;
0159
0160     return 0;
0161 }
0162
0163 static const struct devfreq_event_ops rockchip_dfi_ops = {
0164     .disable = rockchip_dfi_disable,
0165     .enable = rockchip_dfi_enable,
0166     .get_event = rockchip_dfi_get_event,
0167     .set_event = rockchip_dfi_set_event,
0168 };
0169
0170 static const struct of_device_id rockchip_dfi_id_match[] = {
0171     { .compatible = "rockchip,rk3399-dfi" },
0172     { },
0173 };
0174 MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match);
0175
0176 static int rockchip_dfi_probe(struct platform_device *pdev)
0177 {
0178     struct device *dev = &pdev->dev;
0179     struct rockchip_dfi *data;
0180     struct devfreq_event_desc *desc;
0181     struct device_node *np = pdev->dev.of_node, *node;
0182
0183     data = devm_kzalloc(dev, sizeof(struct rockchip_dfi), GFP_KERNEL);
0184     if (!data)
0185         return -ENOMEM;
0186
0187     data->regs = devm_platform_ioremap_resource(pdev, 0);
0188     if (IS_ERR(data->regs))
0189         return PTR_ERR(data->regs);
0190
0191     data->clk = devm_clk_get(dev, "pclk_ddr_mon");
0192     if (IS_ERR(data->clk)) {
0193         dev_err(dev, "Cannot get the clk dmc_clk\n");
0194         return PTR_ERR(data->clk);
0195     }
0196
0197     /* try to find the optional reference to the pmu syscon */
0198     node = of_parse_phandle(np, "rockchip,pmu", 0);
0199     if (node) {
0200         data->regmap_pmu = syscon_node_to_regmap(node);
0201         of_node_put(node);
0202         if (IS_ERR(data->regmap_pmu))
0203             return PTR_ERR(data->regmap_pmu);
0204     }
0205     data->dev = dev;
0206
0207     desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
0208     if (!desc)
0209         return -ENOMEM;
0210
0211     desc->ops = &rockchip_dfi_ops;
0212     desc->driver_data = data;
0213     desc->name = np->name;
0214     data->desc = desc;
0215
0216     data->edev = devm_devfreq_event_add_edev(&pdev->dev, desc);
0217     if (IS_ERR(data->edev)) {
0218         dev_err(&pdev->dev,
0219             "failed to add devfreq-event device\n");
0220         return PTR_ERR(data->edev);
0221     }
0222
0223     platform_set_drvdata(pdev, data);
0224
0225     return 0;
0226 }
0227
0228 static struct platform_driver rockchip_dfi_driver = {
0229     .probe  = rockchip_dfi_probe,
0230     .driver = {
0231         .name   = "rockchip-dfi",
0232         .of_match_table = rockchip_dfi_id_match,
0233     },
0234 };
0235 module_platform_driver(rockchip_dfi_driver);
0236
0237 MODULE_LICENSE("GPL v2");
0238 MODULE_AUTHOR("Lin Huang <hl@rock-chips.com>");
0239 MODULE_DESCRIPTION("Rockchip DFI driver");