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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Crypto acceleration support for Rockchip RK3288
0004  *
0005  * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
0006  *
0007  * Author: Zain Wang <zain.wang@rock-chips.com>
0008  *
0009  * Some ideas are from marvell/cesa.c and s5p-sss.c driver.
0010  */
0011 #include <linux/device.h>
0012 #include "rk3288_crypto.h"
0013 
0014 /*
0015  * IC can not process zero message hash,
0016  * so we put the fixed hash out when met zero message.
0017  */
0018 
0019 static int zero_message_process(struct ahash_request *req)
0020 {
0021     struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
0022     int rk_digest_size = crypto_ahash_digestsize(tfm);
0023 
0024     switch (rk_digest_size) {
0025     case SHA1_DIGEST_SIZE:
0026         memcpy(req->result, sha1_zero_message_hash, rk_digest_size);
0027         break;
0028     case SHA256_DIGEST_SIZE:
0029         memcpy(req->result, sha256_zero_message_hash, rk_digest_size);
0030         break;
0031     case MD5_DIGEST_SIZE:
0032         memcpy(req->result, md5_zero_message_hash, rk_digest_size);
0033         break;
0034     default:
0035         return -EINVAL;
0036     }
0037 
0038     return 0;
0039 }
0040 
0041 static void rk_ahash_crypto_complete(struct crypto_async_request *base, int err)
0042 {
0043     if (base->complete)
0044         base->complete(base, err);
0045 }
0046 
0047 static void rk_ahash_reg_init(struct rk_crypto_info *dev)
0048 {
0049     struct ahash_request *req = ahash_request_cast(dev->async_req);
0050     struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
0051     int reg_status;
0052 
0053     reg_status = CRYPTO_READ(dev, RK_CRYPTO_CTRL) |
0054              RK_CRYPTO_HASH_FLUSH | _SBF(0xffff, 16);
0055     CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, reg_status);
0056 
0057     reg_status = CRYPTO_READ(dev, RK_CRYPTO_CTRL);
0058     reg_status &= (~RK_CRYPTO_HASH_FLUSH);
0059     reg_status |= _SBF(0xffff, 16);
0060     CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, reg_status);
0061 
0062     memset_io(dev->reg + RK_CRYPTO_HASH_DOUT_0, 0, 32);
0063 
0064     CRYPTO_WRITE(dev, RK_CRYPTO_INTENA, RK_CRYPTO_HRDMA_ERR_ENA |
0065                         RK_CRYPTO_HRDMA_DONE_ENA);
0066 
0067     CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, RK_CRYPTO_HRDMA_ERR_INT |
0068                         RK_CRYPTO_HRDMA_DONE_INT);
0069 
0070     CRYPTO_WRITE(dev, RK_CRYPTO_HASH_CTRL, rctx->mode |
0071                            RK_CRYPTO_HASH_SWAP_DO);
0072 
0073     CRYPTO_WRITE(dev, RK_CRYPTO_CONF, RK_CRYPTO_BYTESWAP_HRFIFO |
0074                       RK_CRYPTO_BYTESWAP_BRFIFO |
0075                       RK_CRYPTO_BYTESWAP_BTFIFO);
0076 
0077     CRYPTO_WRITE(dev, RK_CRYPTO_HASH_MSG_LEN, dev->total);
0078 }
0079 
0080 static int rk_ahash_init(struct ahash_request *req)
0081 {
0082     struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
0083     struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
0084     struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
0085 
0086     ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
0087     rctx->fallback_req.base.flags = req->base.flags &
0088                     CRYPTO_TFM_REQ_MAY_SLEEP;
0089 
0090     return crypto_ahash_init(&rctx->fallback_req);
0091 }
0092 
0093 static int rk_ahash_update(struct ahash_request *req)
0094 {
0095     struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
0096     struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
0097     struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
0098 
0099     ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
0100     rctx->fallback_req.base.flags = req->base.flags &
0101                     CRYPTO_TFM_REQ_MAY_SLEEP;
0102     rctx->fallback_req.nbytes = req->nbytes;
0103     rctx->fallback_req.src = req->src;
0104 
0105     return crypto_ahash_update(&rctx->fallback_req);
0106 }
0107 
0108 static int rk_ahash_final(struct ahash_request *req)
0109 {
0110     struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
0111     struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
0112     struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
0113 
0114     ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
0115     rctx->fallback_req.base.flags = req->base.flags &
0116                     CRYPTO_TFM_REQ_MAY_SLEEP;
0117     rctx->fallback_req.result = req->result;
0118 
0119     return crypto_ahash_final(&rctx->fallback_req);
0120 }
0121 
0122 static int rk_ahash_finup(struct ahash_request *req)
0123 {
0124     struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
0125     struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
0126     struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
0127 
0128     ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
0129     rctx->fallback_req.base.flags = req->base.flags &
0130                     CRYPTO_TFM_REQ_MAY_SLEEP;
0131 
0132     rctx->fallback_req.nbytes = req->nbytes;
0133     rctx->fallback_req.src = req->src;
0134     rctx->fallback_req.result = req->result;
0135 
0136     return crypto_ahash_finup(&rctx->fallback_req);
0137 }
0138 
0139 static int rk_ahash_import(struct ahash_request *req, const void *in)
0140 {
0141     struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
0142     struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
0143     struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
0144 
0145     ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
0146     rctx->fallback_req.base.flags = req->base.flags &
0147                     CRYPTO_TFM_REQ_MAY_SLEEP;
0148 
0149     return crypto_ahash_import(&rctx->fallback_req, in);
0150 }
0151 
0152 static int rk_ahash_export(struct ahash_request *req, void *out)
0153 {
0154     struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
0155     struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
0156     struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
0157 
0158     ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
0159     rctx->fallback_req.base.flags = req->base.flags &
0160                     CRYPTO_TFM_REQ_MAY_SLEEP;
0161 
0162     return crypto_ahash_export(&rctx->fallback_req, out);
0163 }
0164 
0165 static int rk_ahash_digest(struct ahash_request *req)
0166 {
0167     struct rk_ahash_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
0168     struct rk_crypto_info *dev = tctx->dev;
0169 
0170     if (!req->nbytes)
0171         return zero_message_process(req);
0172     else
0173         return dev->enqueue(dev, &req->base);
0174 }
0175 
0176 static void crypto_ahash_dma_start(struct rk_crypto_info *dev)
0177 {
0178     CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAS, dev->addr_in);
0179     CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAL, (dev->count + 3) / 4);
0180     CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, RK_CRYPTO_HASH_START |
0181                       (RK_CRYPTO_HASH_START << 16));
0182 }
0183 
0184 static int rk_ahash_set_data_start(struct rk_crypto_info *dev)
0185 {
0186     int err;
0187 
0188     err = dev->load_data(dev, dev->sg_src, NULL);
0189     if (!err)
0190         crypto_ahash_dma_start(dev);
0191     return err;
0192 }
0193 
0194 static int rk_ahash_start(struct rk_crypto_info *dev)
0195 {
0196     struct ahash_request *req = ahash_request_cast(dev->async_req);
0197     struct crypto_ahash *tfm;
0198     struct rk_ahash_rctx *rctx;
0199 
0200     dev->total = req->nbytes;
0201     dev->left_bytes = req->nbytes;
0202     dev->aligned = 0;
0203     dev->align_size = 4;
0204     dev->sg_dst = NULL;
0205     dev->sg_src = req->src;
0206     dev->first = req->src;
0207     dev->src_nents = sg_nents(req->src);
0208     rctx = ahash_request_ctx(req);
0209     rctx->mode = 0;
0210 
0211     tfm = crypto_ahash_reqtfm(req);
0212     switch (crypto_ahash_digestsize(tfm)) {
0213     case SHA1_DIGEST_SIZE:
0214         rctx->mode = RK_CRYPTO_HASH_SHA1;
0215         break;
0216     case SHA256_DIGEST_SIZE:
0217         rctx->mode = RK_CRYPTO_HASH_SHA256;
0218         break;
0219     case MD5_DIGEST_SIZE:
0220         rctx->mode = RK_CRYPTO_HASH_MD5;
0221         break;
0222     default:
0223         return -EINVAL;
0224     }
0225 
0226     rk_ahash_reg_init(dev);
0227     return rk_ahash_set_data_start(dev);
0228 }
0229 
0230 static int rk_ahash_crypto_rx(struct rk_crypto_info *dev)
0231 {
0232     int err = 0;
0233     struct ahash_request *req = ahash_request_cast(dev->async_req);
0234     struct crypto_ahash *tfm;
0235 
0236     dev->unload_data(dev);
0237     if (dev->left_bytes) {
0238         if (dev->aligned) {
0239             if (sg_is_last(dev->sg_src)) {
0240                 dev_warn(dev->dev, "[%s:%d], Lack of data\n",
0241                      __func__, __LINE__);
0242                 err = -ENOMEM;
0243                 goto out_rx;
0244             }
0245             dev->sg_src = sg_next(dev->sg_src);
0246         }
0247         err = rk_ahash_set_data_start(dev);
0248     } else {
0249         /*
0250          * it will take some time to process date after last dma
0251          * transmission.
0252          *
0253          * waiting time is relative with the last date len,
0254          * so cannot set a fixed time here.
0255          * 10us makes system not call here frequently wasting
0256          * efficiency, and make it response quickly when dma
0257          * complete.
0258          */
0259         while (!CRYPTO_READ(dev, RK_CRYPTO_HASH_STS))
0260             udelay(10);
0261 
0262         tfm = crypto_ahash_reqtfm(req);
0263         memcpy_fromio(req->result, dev->reg + RK_CRYPTO_HASH_DOUT_0,
0264                   crypto_ahash_digestsize(tfm));
0265         dev->complete(dev->async_req, 0);
0266         tasklet_schedule(&dev->queue_task);
0267     }
0268 
0269 out_rx:
0270     return err;
0271 }
0272 
0273 static int rk_cra_hash_init(struct crypto_tfm *tfm)
0274 {
0275     struct rk_ahash_ctx *tctx = crypto_tfm_ctx(tfm);
0276     struct rk_crypto_tmp *algt;
0277     struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg);
0278 
0279     const char *alg_name = crypto_tfm_alg_name(tfm);
0280 
0281     algt = container_of(alg, struct rk_crypto_tmp, alg.hash);
0282 
0283     tctx->dev = algt->dev;
0284     tctx->dev->addr_vir = (void *)__get_free_page(GFP_KERNEL);
0285     if (!tctx->dev->addr_vir) {
0286         dev_err(tctx->dev->dev, "failed to kmalloc for addr_vir\n");
0287         return -ENOMEM;
0288     }
0289     tctx->dev->start = rk_ahash_start;
0290     tctx->dev->update = rk_ahash_crypto_rx;
0291     tctx->dev->complete = rk_ahash_crypto_complete;
0292 
0293     /* for fallback */
0294     tctx->fallback_tfm = crypto_alloc_ahash(alg_name, 0,
0295                            CRYPTO_ALG_NEED_FALLBACK);
0296     if (IS_ERR(tctx->fallback_tfm)) {
0297         dev_err(tctx->dev->dev, "Could not load fallback driver.\n");
0298         return PTR_ERR(tctx->fallback_tfm);
0299     }
0300     crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
0301                  sizeof(struct rk_ahash_rctx) +
0302                  crypto_ahash_reqsize(tctx->fallback_tfm));
0303 
0304     return tctx->dev->enable_clk(tctx->dev);
0305 }
0306 
0307 static void rk_cra_hash_exit(struct crypto_tfm *tfm)
0308 {
0309     struct rk_ahash_ctx *tctx = crypto_tfm_ctx(tfm);
0310 
0311     free_page((unsigned long)tctx->dev->addr_vir);
0312     return tctx->dev->disable_clk(tctx->dev);
0313 }
0314 
0315 struct rk_crypto_tmp rk_ahash_sha1 = {
0316     .type = ALG_TYPE_HASH,
0317     .alg.hash = {
0318         .init = rk_ahash_init,
0319         .update = rk_ahash_update,
0320         .final = rk_ahash_final,
0321         .finup = rk_ahash_finup,
0322         .export = rk_ahash_export,
0323         .import = rk_ahash_import,
0324         .digest = rk_ahash_digest,
0325         .halg = {
0326              .digestsize = SHA1_DIGEST_SIZE,
0327              .statesize = sizeof(struct sha1_state),
0328              .base = {
0329                   .cra_name = "sha1",
0330                   .cra_driver_name = "rk-sha1",
0331                   .cra_priority = 300,
0332                   .cra_flags = CRYPTO_ALG_ASYNC |
0333                            CRYPTO_ALG_NEED_FALLBACK,
0334                   .cra_blocksize = SHA1_BLOCK_SIZE,
0335                   .cra_ctxsize = sizeof(struct rk_ahash_ctx),
0336                   .cra_alignmask = 3,
0337                   .cra_init = rk_cra_hash_init,
0338                   .cra_exit = rk_cra_hash_exit,
0339                   .cra_module = THIS_MODULE,
0340                   }
0341              }
0342     }
0343 };
0344 
0345 struct rk_crypto_tmp rk_ahash_sha256 = {
0346     .type = ALG_TYPE_HASH,
0347     .alg.hash = {
0348         .init = rk_ahash_init,
0349         .update = rk_ahash_update,
0350         .final = rk_ahash_final,
0351         .finup = rk_ahash_finup,
0352         .export = rk_ahash_export,
0353         .import = rk_ahash_import,
0354         .digest = rk_ahash_digest,
0355         .halg = {
0356              .digestsize = SHA256_DIGEST_SIZE,
0357              .statesize = sizeof(struct sha256_state),
0358              .base = {
0359                   .cra_name = "sha256",
0360                   .cra_driver_name = "rk-sha256",
0361                   .cra_priority = 300,
0362                   .cra_flags = CRYPTO_ALG_ASYNC |
0363                            CRYPTO_ALG_NEED_FALLBACK,
0364                   .cra_blocksize = SHA256_BLOCK_SIZE,
0365                   .cra_ctxsize = sizeof(struct rk_ahash_ctx),
0366                   .cra_alignmask = 3,
0367                   .cra_init = rk_cra_hash_init,
0368                   .cra_exit = rk_cra_hash_exit,
0369                   .cra_module = THIS_MODULE,
0370                   }
0371              }
0372     }
0373 };
0374 
0375 struct rk_crypto_tmp rk_ahash_md5 = {
0376     .type = ALG_TYPE_HASH,
0377     .alg.hash = {
0378         .init = rk_ahash_init,
0379         .update = rk_ahash_update,
0380         .final = rk_ahash_final,
0381         .finup = rk_ahash_finup,
0382         .export = rk_ahash_export,
0383         .import = rk_ahash_import,
0384         .digest = rk_ahash_digest,
0385         .halg = {
0386              .digestsize = MD5_DIGEST_SIZE,
0387              .statesize = sizeof(struct md5_state),
0388              .base = {
0389                   .cra_name = "md5",
0390                   .cra_driver_name = "rk-md5",
0391                   .cra_priority = 300,
0392                   .cra_flags = CRYPTO_ALG_ASYNC |
0393                            CRYPTO_ALG_NEED_FALLBACK,
0394                   .cra_blocksize = SHA1_BLOCK_SIZE,
0395                   .cra_ctxsize = sizeof(struct rk_ahash_ctx),
0396                   .cra_alignmask = 3,
0397                   .cra_init = rk_cra_hash_init,
0398                   .cra_exit = rk_cra_hash_exit,
0399                   .cra_module = THIS_MODULE,
0400                   }
0401             }
0402     }
0403 };
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