crypto/nx/nx-aes-ctr.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * AES CTR routines supporting the Power 7+ Nest Accelerators driver
0004  *
0005  * Copyright (C) 2011-2012 International Business Machines Inc.
0006  *
0007  * Author: Kent Yoder <yoder1@us.ibm.com>
0008  */
0009
0010 #include <crypto/aes.h>
0011 #include <crypto/ctr.h>
0012 #include <crypto/algapi.h>
0013 #include <linux/module.h>
0014 #include <linux/types.h>
0015 #include <linux/crypto.h>
0016 #include <asm/vio.h>
0017
0018 #include "nx_csbcpb.h"
0019 #include "nx.h"
0020
0021
0022 static int ctr_aes_nx_set_key(struct crypto_skcipher *tfm,
0023                   const u8               *in_key,
0024                   unsigned int            key_len)
0025 {
0026     struct nx_crypto_ctx *nx_ctx = crypto_skcipher_ctx(tfm);
0027     struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
0028
0029     nx_ctx_init(nx_ctx, HCOP_FC_AES);
0030
0031     switch (key_len) {
0032     case AES_KEYSIZE_128:
0033         NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);
0034         nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_128];
0035         break;
0036     case AES_KEYSIZE_192:
0037         NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);
0038         nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_192];
0039         break;
0040     case AES_KEYSIZE_256:
0041         NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);
0042         nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_256];
0043         break;
0044     default:
0045         return -EINVAL;
0046     }
0047
0048     csbcpb->cpb.hdr.mode = NX_MODE_AES_CTR;
0049     memcpy(csbcpb->cpb.aes_ctr.key, in_key, key_len);
0050
0051     return 0;
0052 }
0053
0054 static int ctr3686_aes_nx_set_key(struct crypto_skcipher *tfm,
0055                   const u8               *in_key,
0056                   unsigned int            key_len)
0057 {
0058     struct nx_crypto_ctx *nx_ctx = crypto_skcipher_ctx(tfm);
0059
0060     if (key_len < CTR_RFC3686_NONCE_SIZE)
0061         return -EINVAL;
0062
0063     memcpy(nx_ctx->priv.ctr.nonce,
0064            in_key + key_len - CTR_RFC3686_NONCE_SIZE,
0065            CTR_RFC3686_NONCE_SIZE);
0066
0067     key_len -= CTR_RFC3686_NONCE_SIZE;
0068
0069     return ctr_aes_nx_set_key(tfm, in_key, key_len);
0070 }
0071
0072 static int ctr_aes_nx_crypt(struct skcipher_request *req, u8 *iv)
0073 {
0074     struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
0075     struct nx_crypto_ctx *nx_ctx = crypto_skcipher_ctx(tfm);
0076     struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
0077     unsigned long irq_flags;
0078     unsigned int processed = 0, to_process;
0079     int rc;
0080
0081     spin_lock_irqsave(&nx_ctx->lock, irq_flags);
0082
0083     do {
0084         to_process = req->cryptlen - processed;
0085
0086         rc = nx_build_sg_lists(nx_ctx, iv, req->dst, req->src,
0087                        &to_process, processed,
0088                        csbcpb->cpb.aes_ctr.iv);
0089         if (rc)
0090             goto out;
0091
0092         if (!nx_ctx->op.inlen || !nx_ctx->op.outlen) {
0093             rc = -EINVAL;
0094             goto out;
0095         }
0096
0097         rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
0098                    req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
0099         if (rc)
0100             goto out;
0101
0102         memcpy(iv, csbcpb->cpb.aes_cbc.cv, AES_BLOCK_SIZE);
0103
0104         atomic_inc(&(nx_ctx->stats->aes_ops));
0105         atomic64_add(be32_to_cpu(csbcpb->csb.processed_byte_count),
0106                  &(nx_ctx->stats->aes_bytes));
0107
0108         processed += to_process;
0109     } while (processed < req->cryptlen);
0110 out:
0111     spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
0112     return rc;
0113 }
0114
0115 static int ctr3686_aes_nx_crypt(struct skcipher_request *req)
0116 {
0117     struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
0118     struct nx_crypto_ctx *nx_ctx = crypto_skcipher_ctx(tfm);
0119     u8 iv[16];
0120
0121     memcpy(iv, nx_ctx->priv.ctr.nonce, CTR_RFC3686_NONCE_SIZE);
0122     memcpy(iv + CTR_RFC3686_NONCE_SIZE, req->iv, CTR_RFC3686_IV_SIZE);
0123     iv[12] = iv[13] = iv[14] = 0;
0124     iv[15] = 1;
0125
0126     return ctr_aes_nx_crypt(req, iv);
0127 }
0128
0129 struct skcipher_alg nx_ctr3686_aes_alg = {
0130     .base.cra_name      = "rfc3686(ctr(aes))",
0131     .base.cra_driver_name   = "rfc3686-ctr-aes-nx",
0132     .base.cra_priority  = 300,
0133     .base.cra_blocksize = 1,
0134     .base.cra_ctxsize   = sizeof(struct nx_crypto_ctx),
0135     .base.cra_module    = THIS_MODULE,
0136     .init           = nx_crypto_ctx_aes_ctr_init,
0137     .exit           = nx_crypto_ctx_skcipher_exit,
0138     .min_keysize        = AES_MIN_KEY_SIZE + CTR_RFC3686_NONCE_SIZE,
0139     .max_keysize        = AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE,
0140     .ivsize         = CTR_RFC3686_IV_SIZE,
0141     .setkey         = ctr3686_aes_nx_set_key,
0142     .encrypt        = ctr3686_aes_nx_crypt,
0143     .decrypt        = ctr3686_aes_nx_crypt,
0144     .chunksize      = AES_BLOCK_SIZE,
0145 };