crypto/nx/nx-842.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002
0003 #ifndef __NX_842_H__
0004 #define __NX_842_H__
0005
0006 #include <linux/kernel.h>
0007 #include <linux/init.h>
0008 #include <linux/module.h>
0009 #include <linux/crypto.h>
0010 #include <linux/of.h>
0011 #include <linux/slab.h>
0012 #include <linux/io.h>
0013 #include <linux/mm.h>
0014 #include <linux/ratelimit.h>
0015
0016 /* Restrictions on Data Descriptor List (DDL) and Entry (DDE) buffers
0017  *
0018  * From NX P8 workbook, sec 4.9.1 "842 details"
0019  *   Each DDE buffer is 128 byte aligned
0020  *   Each DDE buffer size is a multiple of 32 bytes (except the last)
0021  *   The last DDE buffer size is a multiple of 8 bytes
0022  */
0023 #define DDE_BUFFER_ALIGN    (128)
0024 #define DDE_BUFFER_SIZE_MULT    (32)
0025 #define DDE_BUFFER_LAST_MULT    (8)
0026
0027 /* Arbitrary DDL length limit
0028  * Allows max buffer size of MAX-1 to MAX pages
0029  * (depending on alignment)
0030  */
0031 #define DDL_LEN_MAX     (17)
0032
0033 /* CCW 842 CI/FC masks
0034  * NX P8 workbook, section 4.3.1, figure 4-6
0035  * "CI/FC Boundary by NX CT type"
0036  */
0037 #define CCW_CI_842      (0x00003ff8)
0038 #define CCW_FC_842      (0x00000007)
0039
0040 /* CCW Function Codes (FC) for 842
0041  * NX P8 workbook, section 4.9, table 4-28
0042  * "Function Code Definitions for 842 Memory Compression"
0043  */
0044 #define CCW_FC_842_COMP_NOCRC   (0)
0045 #define CCW_FC_842_COMP_CRC (1)
0046 #define CCW_FC_842_DECOMP_NOCRC (2)
0047 #define CCW_FC_842_DECOMP_CRC   (3)
0048 #define CCW_FC_842_MOVE     (4)
0049
0050 /* CSB CC Error Types for 842
0051  * NX P8 workbook, section 4.10.3, table 4-30
0052  * "Reported Error Types Summary Table"
0053  */
0054 /* These are all duplicates of existing codes defined in icswx.h. */
0055 #define CSB_CC_TRANSLATION_DUP1 (80)
0056 #define CSB_CC_TRANSLATION_DUP2 (82)
0057 #define CSB_CC_TRANSLATION_DUP3 (84)
0058 #define CSB_CC_TRANSLATION_DUP4 (86)
0059 #define CSB_CC_TRANSLATION_DUP5 (92)
0060 #define CSB_CC_TRANSLATION_DUP6 (94)
0061 #define CSB_CC_PROTECTION_DUP1  (81)
0062 #define CSB_CC_PROTECTION_DUP2  (83)
0063 #define CSB_CC_PROTECTION_DUP3  (85)
0064 #define CSB_CC_PROTECTION_DUP4  (87)
0065 #define CSB_CC_PROTECTION_DUP5  (93)
0066 #define CSB_CC_PROTECTION_DUP6  (95)
0067 #define CSB_CC_RD_EXTERNAL_DUP1 (89)
0068 #define CSB_CC_RD_EXTERNAL_DUP2 (90)
0069 #define CSB_CC_RD_EXTERNAL_DUP3 (91)
0070 /* These are specific to NX */
0071 /* 842 codes */
0072 #define CSB_CC_TPBC_GT_SPBC (64) /* no error, but >1 comp ratio */
0073 #define CSB_CC_CRC_MISMATCH (65) /* decomp crc mismatch */
0074 #define CSB_CC_TEMPL_INVALID    (66) /* decomp invalid template value */
0075 #define CSB_CC_TEMPL_OVERFLOW   (67) /* decomp template shows data after end */
0076 /* sym crypt codes */
0077 #define CSB_CC_DECRYPT_OVERFLOW (64)
0078 /* asym crypt codes */
0079 #define CSB_CC_MINV_OVERFLOW    (128)
0080 /*
0081  * HW error - Job did not finish in the maximum time allowed.
0082  * Job terminated.
0083  */
0084 #define CSB_CC_HW_EXPIRED_TIMER     (224)
0085 /* These are reserved for hypervisor use */
0086 #define CSB_CC_HYP_RESERVE_START    (240)
0087 #define CSB_CC_HYP_RESERVE_END      (253)
0088 #define CSB_CC_HYP_RESERVE_P9_END   (251)
0089 /* No valid interrupt server (P9 or later). */
0090 #define CSB_CC_HYP_RESERVE_NO_INTR_SERVER   (252)
0091 #define CSB_CC_HYP_NO_HW        (254)
0092 #define CSB_CC_HYP_HANG_ABORTED     (255)
0093
0094 /* CCB Completion Modes (CM) for 842
0095  * NX P8 workbook, section 4.3, figure 4-5
0096  * "CRB Details - Normal Cop_Req (CL=00, C=1)"
0097  */
0098 #define CCB_CM_EXTRA_WRITE  (CCB_CM0_ALL_COMPLETIONS & CCB_CM12_STORE)
0099 #define CCB_CM_INTERRUPT    (CCB_CM0_ALL_COMPLETIONS & CCB_CM12_INTERRUPT)
0100
0101 #define LEN_ON_SIZE(pa, size)   ((size) - ((pa) & ((size) - 1)))
0102 #define LEN_ON_PAGE(pa)     LEN_ON_SIZE(pa, PAGE_SIZE)
0103
0104 static inline unsigned long nx842_get_pa(void *addr)
0105 {
0106     if (!is_vmalloc_addr(addr))
0107         return __pa(addr);
0108
0109     return page_to_phys(vmalloc_to_page(addr)) + offset_in_page(addr);
0110 }
0111
0112 /**
0113  * This provides the driver's constraints.  Different nx842 implementations
0114  * may have varying requirements.  The constraints are:
0115  *   @alignment:    All buffers should be aligned to this
0116  *   @multiple:     All buffer lengths should be a multiple of this
0117  *   @minimum:      Buffer lengths must not be less than this amount
0118  *   @maximum:      Buffer lengths must not be more than this amount
0119  *
0120  * The constraints apply to all buffers and lengths, both input and output,
0121  * for both compression and decompression, except for the minimum which
0122  * only applies to compression input and decompression output; the
0123  * compressed data can be less than the minimum constraint.  It can be
0124  * assumed that compressed data will always adhere to the multiple
0125  * constraint.
0126  *
0127  * The driver may succeed even if these constraints are violated;
0128  * however the driver can return failure or suffer reduced performance
0129  * if any constraint is not met.
0130  */
0131 struct nx842_constraints {
0132     int alignment;
0133     int multiple;
0134     int minimum;
0135     int maximum;
0136 };
0137
0138 struct nx842_driver {
0139     char *name;
0140     struct module *owner;
0141     size_t workmem_size;
0142
0143     struct nx842_constraints *constraints;
0144
0145     int (*compress)(const unsigned char *in, unsigned int in_len,
0146             unsigned char *out, unsigned int *out_len,
0147             void *wrkmem);
0148     int (*decompress)(const unsigned char *in, unsigned int in_len,
0149               unsigned char *out, unsigned int *out_len,
0150               void *wrkmem);
0151 };
0152
0153 struct nx842_crypto_header_group {
0154     __be16 padding;         /* unused bytes at start of group */
0155     __be32 compressed_length;   /* compressed bytes in group */
0156     __be32 uncompressed_length; /* bytes after decompression */
0157 } __packed;
0158
0159 struct nx842_crypto_header {
0160     __be16 magic;       /* NX842_CRYPTO_MAGIC */
0161     __be16 ignore;      /* decompressed end bytes to ignore */
0162     u8 groups;      /* total groups in this header */
0163     struct nx842_crypto_header_group group[];
0164 } __packed;
0165
0166 #define NX842_CRYPTO_GROUP_MAX  (0x20)
0167
0168 struct nx842_crypto_ctx {
0169     spinlock_t lock;
0170
0171     u8 *wmem;
0172     u8 *sbounce, *dbounce;
0173
0174     struct nx842_crypto_header header;
0175     struct nx842_crypto_header_group group[NX842_CRYPTO_GROUP_MAX];
0176
0177     struct nx842_driver *driver;
0178 };
0179
0180 int nx842_crypto_init(struct crypto_tfm *tfm, struct nx842_driver *driver);
0181 void nx842_crypto_exit(struct crypto_tfm *tfm);
0182 int nx842_crypto_compress(struct crypto_tfm *tfm,
0183               const u8 *src, unsigned int slen,
0184               u8 *dst, unsigned int *dlen);
0185 int nx842_crypto_decompress(struct crypto_tfm *tfm,
0186                 const u8 *src, unsigned int slen,
0187                 u8 *dst, unsigned int *dlen);
0188
0189 #endif /* __NX_842_H__ */