marvell/octeontx2/otx2_cpt_devlink.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /* Copyright (C) 2021 Marvell. */
0003
0004 #include "otx2_cpt_devlink.h"
0005
0006 static int otx2_cpt_dl_egrp_create(struct devlink *dl, u32 id,
0007                    struct devlink_param_gset_ctx *ctx)
0008 {
0009     struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl);
0010     struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf;
0011
0012     return otx2_cpt_dl_custom_egrp_create(cptpf, ctx);
0013 }
0014
0015 static int otx2_cpt_dl_egrp_delete(struct devlink *dl, u32 id,
0016                    struct devlink_param_gset_ctx *ctx)
0017 {
0018     struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl);
0019     struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf;
0020
0021     return otx2_cpt_dl_custom_egrp_delete(cptpf, ctx);
0022 }
0023
0024 static int otx2_cpt_dl_uc_info(struct devlink *dl, u32 id,
0025                    struct devlink_param_gset_ctx *ctx)
0026 {
0027     struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl);
0028     struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf;
0029
0030     otx2_cpt_print_uc_dbg_info(cptpf);
0031
0032     return 0;
0033 }
0034
0035 enum otx2_cpt_dl_param_id {
0036     OTX2_CPT_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
0037     OTX2_CPT_DEVLINK_PARAM_ID_EGRP_CREATE,
0038     OTX2_CPT_DEVLINK_PARAM_ID_EGRP_DELETE,
0039 };
0040
0041 static const struct devlink_param otx2_cpt_dl_params[] = {
0042     DEVLINK_PARAM_DRIVER(OTX2_CPT_DEVLINK_PARAM_ID_EGRP_CREATE,
0043                  "egrp_create", DEVLINK_PARAM_TYPE_STRING,
0044                  BIT(DEVLINK_PARAM_CMODE_RUNTIME),
0045                  otx2_cpt_dl_uc_info, otx2_cpt_dl_egrp_create,
0046                  NULL),
0047     DEVLINK_PARAM_DRIVER(OTX2_CPT_DEVLINK_PARAM_ID_EGRP_DELETE,
0048                  "egrp_delete", DEVLINK_PARAM_TYPE_STRING,
0049                  BIT(DEVLINK_PARAM_CMODE_RUNTIME),
0050                  otx2_cpt_dl_uc_info, otx2_cpt_dl_egrp_delete,
0051                  NULL),
0052 };
0053
0054 static int otx2_cpt_dl_info_firmware_version_put(struct devlink_info_req *req,
0055                          struct otx2_cpt_eng_grp_info grp[],
0056                          const char *ver_name, int eng_type)
0057 {
0058     struct otx2_cpt_engs_rsvd *eng;
0059     int i;
0060
0061     for (i = 0; i < OTX2_CPT_MAX_ENGINE_GROUPS; i++) {
0062         eng = find_engines_by_type(&grp[i], eng_type);
0063         if (eng)
0064             return devlink_info_version_running_put(req, ver_name,
0065                                 eng->ucode->ver_str);
0066     }
0067
0068     return 0;
0069 }
0070
0071 static int otx2_cpt_devlink_info_get(struct devlink *dl,
0072                      struct devlink_info_req *req,
0073                      struct netlink_ext_ack *extack)
0074 {
0075     struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl);
0076     struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf;
0077     int err;
0078
0079     err = devlink_info_driver_name_put(req, "rvu_cptpf");
0080     if (err)
0081         return err;
0082
0083     err = otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp,
0084                             "fw.ae", OTX2_CPT_AE_TYPES);
0085     if (err)
0086         return err;
0087
0088     err = otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp,
0089                             "fw.se", OTX2_CPT_SE_TYPES);
0090     if (err)
0091         return err;
0092
0093     return otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp,
0094                             "fw.ie", OTX2_CPT_IE_TYPES);
0095 }
0096
0097 static const struct devlink_ops otx2_cpt_devlink_ops = {
0098     .info_get = otx2_cpt_devlink_info_get,
0099 };
0100
0101 int otx2_cpt_register_dl(struct otx2_cptpf_dev *cptpf)
0102 {
0103     struct device *dev = &cptpf->pdev->dev;
0104     struct otx2_cpt_devlink *cpt_dl;
0105     struct devlink *dl;
0106     int ret;
0107
0108     dl = devlink_alloc(&otx2_cpt_devlink_ops,
0109                sizeof(struct otx2_cpt_devlink), dev);
0110     if (!dl) {
0111         dev_warn(dev, "devlink_alloc failed\n");
0112         return -ENOMEM;
0113     }
0114
0115     cpt_dl = devlink_priv(dl);
0116     cpt_dl->dl = dl;
0117     cpt_dl->cptpf = cptpf;
0118     cptpf->dl = dl;
0119     ret = devlink_params_register(dl, otx2_cpt_dl_params,
0120                       ARRAY_SIZE(otx2_cpt_dl_params));
0121     if (ret) {
0122         dev_err(dev, "devlink params register failed with error %d",
0123             ret);
0124         devlink_free(dl);
0125         return ret;
0126     }
0127
0128     devlink_register(dl);
0129
0130     return 0;
0131 }
0132
0133 void otx2_cpt_unregister_dl(struct otx2_cptpf_dev *cptpf)
0134 {
0135     struct devlink *dl = cptpf->dl;
0136
0137     if (!dl)
0138         return;
0139
0140     devlink_unregister(dl);
0141     devlink_params_unregister(dl, otx2_cpt_dl_params,
0142                   ARRAY_SIZE(otx2_cpt_dl_params));
0143     devlink_free(dl);
0144 }